1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 */
5
6#include <common.h>
7#include <asm/arch/device.h>
8#include <asm/arch/msg_port.h>
9#include <asm/arch/quark.h>
10
11void msg_port_setup(int op, int port, int reg)
12{
13	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_REG,
14				   (((op) << 24) | ((port) << 16) |
15				   (((reg) << 8) & 0xff00) | MSG_BYTE_ENABLE));
16}
17
18u32 msg_port_read(u8 port, u32 reg)
19{
20	u32 value;
21
22	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
23				   reg & 0xffffff00);
24	msg_port_setup(MSG_OP_READ, port, reg);
25	qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
26
27	return value;
28}
29
30void msg_port_write(u8 port, u32 reg, u32 value)
31{
32	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
33	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
34				   reg & 0xffffff00);
35	msg_port_setup(MSG_OP_WRITE, port, reg);
36}
37
38u32 msg_port_alt_read(u8 port, u32 reg)
39{
40	u32 value;
41
42	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
43				   reg & 0xffffff00);
44	msg_port_setup(MSG_OP_ALT_READ, port, reg);
45	qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
46
47	return value;
48}
49
50void msg_port_alt_write(u8 port, u32 reg, u32 value)
51{
52	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
53	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
54				   reg & 0xffffff00);
55	msg_port_setup(MSG_OP_ALT_WRITE, port, reg);
56}
57
58u32 msg_port_io_read(u8 port, u32 reg)
59{
60	u32 value;
61
62	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
63				   reg & 0xffffff00);
64	msg_port_setup(MSG_OP_IO_READ, port, reg);
65	qrk_pci_read_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, &value);
66
67	return value;
68}
69
70void msg_port_io_write(u8 port, u32 reg, u32 value)
71{
72	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_DATA_REG, value);
73	qrk_pci_write_config_dword(QUARK_HOST_BRIDGE, MSG_CTRL_EXT_REG,
74				   reg & 0xffffff00);
75	msg_port_setup(MSG_OP_IO_WRITE, port, reg);
76}
77