1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
4 */
5
6#include <cpu_func.h>
7
8/*
9 * dcache.ipa rs1 (invalidate)
10 * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
11 *   0000001    01010      rs1       000      00000  0001011
12 *
13 * dcache.cpa rs1 (clean)
14 * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
15 *   0000001    01001      rs1       000      00000  0001011
16 *
17 * dcache.cipa rs1 (clean then invalidate)
18 * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
19 *   0000001    01011      rs1       000      00000  0001011
20 *
21 * sync.s
22 * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
23 *   0000000    11001     00000      000      00000  0001011
24 */
25#define DCACHE_IPA_A0	".long 0x02a5000b"
26#define DCACHE_CPA_A0	".long 0x0295000b"
27#define DCACHE_CIPA_A0	".long 0x02b5000b"
28
29#define SYNC_S		".long 0x0190000b"
30
31void invalidate_dcache_range(unsigned long start, unsigned long end)
32{
33	register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
34	for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
35		__asm__ __volatile__(DCACHE_IPA_A0);
36	__asm__ __volatile__(SYNC_S);
37}
38
39void flush_dcache_range(unsigned long start, unsigned long end)
40{
41	register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
42	for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
43		__asm__ __volatile__(DCACHE_CPA_A0);
44	__asm__ __volatile__(SYNC_S);
45}
46