1275970Scy/* SPDX-License-Identifier: GPL-2.0+ */ 2275970Scy/* 3275970Scy * Intel HDA audio codec config. This is a mechanicm to configure codecs when 4275970Scy * using Intel HDA audio. 5275970Scy * 6275970Scy * Copyright 2018 Google LLC 7275970Scy * Written by Simon Glass <sjg@chromium.org> 8275970Scy */ 9275970Scy 10275970Scy#ifndef __AZALIA_H 11275970Scy#define __AZALIA_H 12275970Scy 13275970Scy#define AZALIA_CODEC_SHIFT 28 14275970Scy#define AZALIA_NID_SHIFT 20 15275970Scy#define AZALIA_VERB_SHIFT 8 16275970Scy 17275970Scy/* Supported opcodes */ 18275970Scy#define AZALIA_OPCODE_CONFIG_DEFAULT 0x71c 19275970Scy#define AZALIA_OPCODE_IMPL_ID 0x720 20275970Scy#define AZALIA_OPCODE_READ_PARAM 0xf00 21275970Scy 22275970Scy#define AZALIA_PARAM_VENDOR_ID 0 23275970Scy 24275970Scy/* Generate the register value to write a particular byte of a 32-bit value */ 25275970Scy#define AZALIA_SET_BYTE(codec, nid, opcode, val, byte) \ 26275970Scy ((codec) << AZALIA_CODEC_SHIFT | \ 27275970Scy (nid) << AZALIA_NID_SHIFT | \ 28275970Scy ((opcode) + (byte)) << AZALIA_VERB_SHIFT | \ 29275970Scy (((val) >> ((byte) * 8)) & 0xff)) 30275970Scy 31275970Scy/* Generate the register value to write all bytes of a 32-bit value */ 32275970Scy#define AZALIA_WORD(codec, nid, opcode, val) \ 33275970Scy (AZALIA_SET_BYTE(codec, nid, opcode, val, 0) | \ 34275970Scy AZALIA_SET_BYTE(codec, nid, opcode, val, 1) | \ 35275970Scy AZALIA_SET_BYTE(codec, nid, opcode, val, 2) | \ 36275970Scy AZALIA_SET_BYTE(codec, nid, opcode, val, 3)) 37275970Scy 38275970Scy#define AZALIA_PIN_CFG(codec, nid, val) \ 39275970Scy AZALIA_WORD(codec, nid, AZALIA_OPCODE_CONFIG_DEFAULT, val) 40275970Scy 41275970Scy#define AZALIA_SUBVENDOR(codec, val) \ 42275970Scy AZALIA_WORD(codec, 1, AZALIA_OPCODE_IMPL_ID, val) 43275970Scy 44#endif /* __AZALIA_H */ 45