1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * (C) Copyright 2014 - 2015 Xilinx, Inc. 4 * Michal Simek <michal.simek@amd.com> 5 */ 6 7#include <common.h> 8#include <init.h> 9#include <time.h> 10#include <asm/arch/clk.h> 11#include <asm/arch/hardware.h> 12#include <asm/arch/sys_proto.h> 13#include <asm/global_data.h> 14 15DECLARE_GLOBAL_DATA_PTR; 16 17unsigned long zynqmp_get_system_timer_freq(void) 18{ 19 u32 ver = zynqmp_get_silicon_version(); 20 21 switch (ver) { 22 case ZYNQMP_CSU_VERSION_QEMU: 23 return 50000000; 24 } 25 26 return 100000000; 27} 28 29#ifdef CONFIG_CLOCKS 30/** 31 * set_cpu_clk_info() - Initialize clock framework 32 * Always returns zero. 33 * 34 * This function is called from common code after relocation and sets up the 35 * clock framework. The framework must not be used before this function had been 36 * called. 37 */ 38int set_cpu_clk_info(void) 39{ 40 gd->cpu_clk = get_tbclk(); 41 42 gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; 43 44 gd->bd->bi_dsp_freq = 0; 45 46 return 0; 47} 48#endif 49