1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include <cpu_func.h>
7#include <debug_uart.h>
8#include <dm.h>
9#include <hang.h>
10#include <image.h>
11#include <init.h>
12#include <log.h>
13#include <ram.h>
14#include <spl.h>
15#include <asm/arch-rockchip/bootrom.h>
16#include <asm/global_data.h>
17#include <asm/io.h>
18#include <linux/bitops.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22int board_return_to_bootrom(struct spl_image_info *spl_image,
23			    struct spl_boot_device *bootdev)
24{
25	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
26
27	return 0;
28}
29
30__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
31};
32
33const char *board_spl_was_booted_from(void)
34{
35	static u32 brom_bootsource_id_cache = BROM_BOOTSOURCE_UNKNOWN;
36	u32 bootdevice_brom_id;
37	const char *bootdevice_ofpath = NULL;
38
39	if (brom_bootsource_id_cache != BROM_BOOTSOURCE_UNKNOWN)
40		bootdevice_brom_id = brom_bootsource_id_cache;
41	else
42		bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
43
44	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
45		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
46
47	if (bootdevice_ofpath) {
48		brom_bootsource_id_cache = bootdevice_brom_id;
49		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
50		      __func__, bootdevice_brom_id, bootdevice_ofpath);
51	} else {
52		debug("%s: failed to resolve brom_bootdevice_id %x\n",
53		      __func__, bootdevice_brom_id);
54	}
55
56	return bootdevice_ofpath;
57}
58
59u32 spl_boot_device(void)
60{
61	u32 boot_device = BOOT_DEVICE_MMC1;
62
63#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
64		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
65		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
66		defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \
67		defined(CONFIG_TARGET_CHROMEBOOK_BOB) || \
68		defined(CONFIG_TARGET_CHROMEBOOK_KEVIN)
69	return BOOT_DEVICE_SPI;
70#endif
71	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
72		return BOOT_DEVICE_BOOTROM;
73
74	return boot_device;
75}
76
77u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
78{
79	return MMCSD_MODE_RAW;
80}
81
82#define TIMER_LOAD_COUNT_L	0x00
83#define TIMER_LOAD_COUNT_H	0x04
84#define TIMER_CONTROL_REG	0x10
85#define TIMER_EN	0x1
86#define	TIMER_FMODE	BIT(0)
87#define	TIMER_RMODE	BIT(1)
88
89__weak void rockchip_stimer_init(void)
90{
91#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
92	/* If Timer already enabled, don't re-init it */
93	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
94
95	if (reg & TIMER_EN)
96		return;
97#ifndef CONFIG_ARM64
98	asm volatile("mcr p15, 0, %0, c14, c0, 0"
99		     : : "r"(CONFIG_COUNTER_FREQUENCY));
100#endif
101	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
102	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
103	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
104	writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
105	       TIMER_CONTROL_REG);
106#endif
107}
108
109__weak int board_early_init_f(void)
110{
111	return 0;
112}
113
114__weak int arch_cpu_init(void)
115{
116	return 0;
117}
118
119void board_init_f(ulong dummy)
120{
121	int ret;
122
123	board_early_init_f();
124
125	ret = spl_early_init();
126	if (ret) {
127		printf("spl_early_init() failed: %d\n", ret);
128		hang();
129	}
130	arch_cpu_init();
131
132	rockchip_stimer_init();
133
134#ifdef CONFIG_SYS_ARCH_TIMER
135	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
136	timer_init();
137#endif
138#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM)
139	debug("\nspl:init dram\n");
140	ret = dram_init();
141	if (ret) {
142		printf("DRAM init failed: %d\n", ret);
143		return;
144	}
145	gd->ram_top = gd->ram_base + get_effective_memsize();
146	gd->ram_top = board_get_usable_ram_top(gd->ram_size);
147
148	if (IS_ENABLED(CONFIG_ARM64) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) {
149		gd->relocaddr = gd->ram_top;
150		arch_reserve_mmu();
151		enable_caches();
152	}
153#endif
154	preloader_console_init();
155}
156
157void spl_board_prepare_for_boot(void)
158{
159	if (!IS_ENABLED(CONFIG_ARM64) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
160		return;
161
162	cleanup_before_linux();
163}
164