1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * boot-common.c 4 * 5 * Common bootmode functions for omap based boards 6 * 7 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ 8 */ 9 10#include <common.h> 11#include <ahci.h> 12#include <log.h> 13#include <dm/uclass.h> 14#include <fs_loader.h> 15#include <spl.h> 16#include <asm/global_data.h> 17#include <asm/omap_common.h> 18#include <asm/omap_sec_common.h> 19#include <asm/arch/omap.h> 20#include <asm/arch/mmc_host_def.h> 21#include <asm/arch/sys_proto.h> 22#include <watchdog.h> 23#include <scsi.h> 24#include <i2c.h> 25#include <remoteproc.h> 26#include <image.h> 27 28DECLARE_GLOBAL_DATA_PTR; 29 30#define IPU1_LOAD_ADDR (0xa17ff000) 31#define MAX_REMOTECORE_BIN_SIZE (8 * 0x100000) 32#define IPU2_LOAD_ADDR (IPU1_LOAD_ADDR + MAX_REMOTECORE_BIN_SIZE) 33 34__weak u32 omap_sys_boot_device(void) 35{ 36 return BOOT_DEVICE_NONE; 37} 38 39void save_omap_boot_params(void) 40{ 41 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS); 42 struct omap_boot_parameters *omap_boot_params; 43 int sys_boot_device = 0; 44 u32 boot_device; 45 u32 boot_mode; 46 47 if ((boot_params < NON_SECURE_SRAM_START) || 48 (boot_params > NON_SECURE_SRAM_END)) 49 return; 50 51 omap_boot_params = (struct omap_boot_parameters *)boot_params; 52 53 boot_device = omap_boot_params->boot_device; 54 boot_mode = MMCSD_MODE_UNDEFINED; 55 56 /* Boot device */ 57 58#ifdef BOOT_DEVICE_NAND_I2C 59 /* 60 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device. 61 * Otherwise the SPL boot IF can't handle this device correctly. 62 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens 63 * Draco leads to this boot-device passed to SPL from the BootROM. 64 */ 65 if (boot_device == BOOT_DEVICE_NAND_I2C) 66 boot_device = BOOT_DEVICE_NAND; 67#endif 68#ifdef BOOT_DEVICE_QSPI_4 69 /* 70 * We get different values for QSPI_1 and QSPI_4 being used, but 71 * don't actually care about this difference. Rather than 72 * mangle the later code, if we're coming in as QSPI_4 just 73 * change to the QSPI_1 value. 74 */ 75 if (boot_device == BOOT_DEVICE_QSPI_4) 76 boot_device = BOOT_DEVICE_SPI; 77#endif 78 /* 79 * When booting from peripheral booting, the boot device is not usable 80 * as-is (unless there is support for it), so the boot device is instead 81 * figured out using the SYS_BOOT pins. 82 */ 83 switch (boot_device) { 84#if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT) 85 case BOOT_DEVICE_UART: 86 sys_boot_device = 1; 87 break; 88#endif 89#if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_STORAGE) 90 case BOOT_DEVICE_USB: 91 sys_boot_device = 1; 92 break; 93#endif 94#if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER) 95 case BOOT_DEVICE_USBETH: 96 sys_boot_device = 1; 97 break; 98#endif 99#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH) 100 case BOOT_DEVICE_CPGMAC: 101 sys_boot_device = 1; 102 break; 103#endif 104#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU) 105 case BOOT_DEVICE_DFU: 106 sys_boot_device = 1; 107 break; 108#endif 109 } 110 111 if (sys_boot_device) { 112 boot_device = omap_sys_boot_device(); 113 114 /* MMC raw mode will fallback to FS mode. */ 115 if ((boot_device >= MMC_BOOT_DEVICES_START) && 116 (boot_device <= MMC_BOOT_DEVICES_END)) 117 boot_mode = MMCSD_MODE_RAW; 118 } 119 120 gd->arch.omap_boot_device = boot_device; 121 122 /* Boot mode */ 123 124#ifdef CONFIG_OMAP34XX 125 if ((boot_device >= MMC_BOOT_DEVICES_START) && 126 (boot_device <= MMC_BOOT_DEVICES_END)) { 127 switch (boot_device) { 128 case BOOT_DEVICE_MMC1: 129 boot_mode = MMCSD_MODE_FS; 130 break; 131 case BOOT_DEVICE_MMC2: 132 boot_mode = MMCSD_MODE_RAW; 133 break; 134 } 135 } 136#else 137 /* 138 * If the boot device was dynamically changed and doesn't match what 139 * the bootrom initially booted, we cannot use the boot device 140 * descriptor to figure out the boot mode. 141 */ 142 if ((boot_device == omap_boot_params->boot_device) && 143 (boot_device >= MMC_BOOT_DEVICES_START) && 144 (boot_device <= MMC_BOOT_DEVICES_END)) { 145 boot_params = omap_boot_params->boot_device_descriptor; 146 if ((boot_params < NON_SECURE_SRAM_START) || 147 (boot_params > NON_SECURE_SRAM_END)) 148 return; 149 150 boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET)); 151 if ((boot_params < NON_SECURE_SRAM_START) || 152 (boot_params > NON_SECURE_SRAM_END)) 153 return; 154 155 boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET)); 156 157 if (boot_mode != MMCSD_MODE_FS && 158 boot_mode != MMCSD_MODE_RAW) 159#ifdef CONFIG_SUPPORT_EMMC_BOOT 160 boot_mode = MMCSD_MODE_EMMCBOOT; 161#else 162 boot_mode = MMCSD_MODE_UNDEFINED; 163#endif 164 } 165#endif 166 167 gd->arch.omap_boot_mode = boot_mode; 168 169#if !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX) 170 171 /* CH flags */ 172 173 gd->arch.omap_ch_flags = omap_boot_params->ch_flags; 174#endif 175} 176 177#ifdef CONFIG_SPL_BUILD 178u32 spl_boot_device(void) 179{ 180 return gd->arch.omap_boot_device; 181} 182 183u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) 184{ 185 return gd->arch.omap_boot_mode; 186} 187 188int load_firmware(char *name_fw, u32 *loadaddr) 189{ 190 struct udevice *fsdev; 191 int size = 0; 192 193 if (!CONFIG_IS_ENABLED(FS_LOADER)) 194 return 0; 195 196 if (!*loadaddr) 197 return 0; 198 199 if (!get_fs_loader(&fsdev)) { 200 size = request_firmware_into_buf(fsdev, name_fw, 201 (void *)*loadaddr, 0, 0); 202 } 203 204 return size; 205} 206 207void spl_boot_ipu(void) 208{ 209 int ret, size; 210 u32 loadaddr = IPU1_LOAD_ADDR; 211 212 if (!IS_ENABLED(CONFIG_SPL_BUILD) || 213 !IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU)) 214 return; 215 216 size = load_firmware("dra7-ipu1-fw.xem4", &loadaddr); 217 if (size <= 0) { 218 pr_err("Firmware loading failed\n"); 219 goto skip_ipu1; 220 } 221 222 enable_ipu1_clocks(); 223 ret = rproc_dev_init(0); 224 if (ret) { 225 debug("%s: IPU1 failed to initialize on rproc (%d)\n", 226 __func__, ret); 227 goto skip_ipu1; 228 } 229 230 ret = rproc_load(0, IPU1_LOAD_ADDR, 0x2000000); 231 if (ret) { 232 debug("%s: IPU1 failed to load on rproc (%d)\n", __func__, 233 ret); 234 goto skip_ipu1; 235 } 236 237 debug("Starting IPU1...\n"); 238 239 ret = rproc_start(0); 240 if (ret) 241 debug("%s: IPU1 failed to start (%d)\n", __func__, ret); 242 243skip_ipu1: 244 loadaddr = IPU2_LOAD_ADDR; 245 size = load_firmware("dra7-ipu2-fw.xem4", &loadaddr); 246 if (size <= 0) { 247 pr_err("Firmware loading failed for ipu2\n"); 248 return; 249 } 250 251 enable_ipu2_clocks(); 252 ret = rproc_dev_init(1); 253 if (ret) { 254 debug("%s: IPU2 failed to initialize on rproc (%d)\n", __func__, 255 ret); 256 return; 257 } 258 259 ret = rproc_load(1, IPU2_LOAD_ADDR, 0x2000000); 260 if (ret) { 261 debug("%s: IPU2 failed to load on rproc (%d)\n", __func__, 262 ret); 263 return; 264 } 265 266 debug("Starting IPU2...\n"); 267 268 ret = rproc_start(1); 269 if (ret) 270 debug("%s: IPU2 failed to start (%d)\n", __func__, ret); 271} 272 273void spl_board_init(void) 274{ 275 /* Prepare console output */ 276 preloader_console_init(); 277 278#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT) 279 gpmc_init(); 280#endif 281#if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C) 282 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 283#endif 284#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW) 285 arch_misc_init(); 286#endif 287#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) 288 hw_watchdog_init(); 289#endif 290#ifdef CONFIG_AM33XX 291 am33xx_spl_board_init(); 292#endif 293 if (IS_ENABLED(CONFIG_SPL_BUILD) && 294 IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU)) 295 spl_boot_ipu(); 296} 297 298void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 299{ 300 typedef void __noreturn (*image_entry_noargs_t)(u32 *); 301 image_entry_noargs_t image_entry = 302 (image_entry_noargs_t) spl_image->entry_point; 303 304 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS); 305 306 debug("image entry point: 0x%lX\n", spl_image->entry_point); 307 /* Pass the saved boot_params from rom code */ 308 image_entry((u32 *)boot_params); 309} 310#endif 311 312#ifdef CONFIG_TI_SECURE_DEVICE 313void board_fit_image_post_process(const void *fit, int node, void **p_image, 314 size_t *p_size) 315{ 316 secure_boot_verify_image(p_image, p_size); 317} 318 319static void tee_image_process(ulong tee_image, size_t tee_size) 320{ 321 secure_tee_install((u32)tee_image); 322} 323U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, tee_image_process); 324#endif 325