1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2011
4 * Marvell Semiconductor <www.marvell.com>
5 * Written-by: Lei Wen <leiwen@marvell.com>
6 */
7
8/*
9 * This file should be included in board config header file.
10 *
11 * It supports common definitions for Kirkwood platform
12 */
13
14#ifndef _KW_CONFIG_H
15#define _KW_CONFIG_H
16
17#if defined (CONFIG_KW88F6281)
18#include <asm/arch/kw88f6281.h>
19#elif defined (CONFIG_KW88F6192)
20#include <asm/arch/kw88f6192.h>
21#else
22#error "SOC Name not defined"
23#endif /* CONFIG_KW88F6281 */
24
25#include <asm/arch/soc.h>
26
27#define CFG_I2C_MVTWSI_BASE0	KW_TWSI_BASE
28#define MV_UART_CONSOLE_BASE	KW_UART0_BASE
29#define MV_SATA_BASE		KW_SATA_BASE
30#define MV_SATA_PORT0_OFFSET	KW_SATA_PORT0_OFFSET
31#define MV_SATA_PORT1_OFFSET	KW_SATA_PORT1_OFFSET
32
33/*
34 * NAND configuration
35 */
36#ifdef CONFIG_CMD_NAND
37#define CFG_SYS_NAND_BASE		0xD8000000	/* MV_DEFADR_NANDF */
38#define NAND_ALLOW_ERASE_ALL		1
39#endif
40
41/*
42 * IDE Support on SATA ports
43 */
44#ifdef CONFIG_IDE
45#define __io
46/* Data, registers and alternate blocks are at the same offset */
47/* Each 8-bit ATA register is aligned to a 4-bytes address */
48/* CONFIG_IDE requires some #defines for ATA registers */
49/* ATA registers base is at SATA controller base */
50#endif /* CONFIG_IDE */
51
52/* Use common timer */
53#ifndef CONFIG_TIMER
54#define CFG_SYS_TIMER_COUNTER	(MVEBU_TIMER_BASE + 0x14)
55#define CFG_SYS_TIMER_RATE		CFG_SYS_TCLK
56#endif
57
58#endif /* _KW_CONFIG_H */
59