13016Swollman// SPDX-License-Identifier: GPL-2.0 23016Swollman/* 33016Swollman * AM62A7: SoC specific initialization 43016Swollman * 53016Swollman * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 63016Swollman */ 73016Swollman 83016Swollman#include <spl.h> 93016Swollman#include <asm/io.h> 103016Swollman#include <asm/arch/hardware.h> 113016Swollman#include "sysfw-loader.h" 1290045Sobrien#include "common.h" 1390045Sobrien#include <dm.h> 143016Swollman#include <dm/uclass-internal.h> 153016Swollman#include <dm/pinctrl.h> 163016Swollman 173016Swollmanstruct fwl_data cbass_main_fwls[] = { 183016Swollman { "FSS_DAT_REG3", 7, 8 }, 193016Swollman}; 203016Swollman 213016Swollman/* 2290045Sobrien * This uninitialized global variable would normal end up in the .bss section, 233016Swollman * but the .bss is cleared between writing and reading this variable, so move 243016Swollman * it to the .data section. 253016Swollman */ 263016Swollmanu32 bootindex __section(".data"); 273016Swollmanstatic struct rom_extended_boot_data bootdata __section(".data"); 283016Swollman 293016Swollmanstatic void store_boot_info_from_rom(void) 303016Swollman{ 313016Swollman bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); 323016Swollman 33 if (IS_ENABLED(CONFIG_CPU_V7R)) { 34 memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO, 35 sizeof(struct rom_extended_boot_data)); 36 } 37} 38 39static void ctrl_mmr_unlock(void) 40{ 41 /* Unlock all WKUP_CTRL_MMR0 module registers */ 42 mmr_unlock(WKUP_CTRL_MMR0_BASE, 0); 43 mmr_unlock(WKUP_CTRL_MMR0_BASE, 1); 44 mmr_unlock(WKUP_CTRL_MMR0_BASE, 2); 45 mmr_unlock(WKUP_CTRL_MMR0_BASE, 3); 46 mmr_unlock(WKUP_CTRL_MMR0_BASE, 4); 47 mmr_unlock(WKUP_CTRL_MMR0_BASE, 5); 48 mmr_unlock(WKUP_CTRL_MMR0_BASE, 6); 49 mmr_unlock(WKUP_CTRL_MMR0_BASE, 7); 50 51 /* Unlock all CTRL_MMR0 module registers */ 52 mmr_unlock(CTRL_MMR0_BASE, 0); 53 mmr_unlock(CTRL_MMR0_BASE, 1); 54 mmr_unlock(CTRL_MMR0_BASE, 2); 55 mmr_unlock(CTRL_MMR0_BASE, 4); 56 mmr_unlock(CTRL_MMR0_BASE, 5); 57 mmr_unlock(CTRL_MMR0_BASE, 6); 58 59 /* Unlock all MCU_CTRL_MMR0 module registers */ 60 mmr_unlock(MCU_CTRL_MMR0_BASE, 0); 61 mmr_unlock(MCU_CTRL_MMR0_BASE, 1); 62 mmr_unlock(MCU_CTRL_MMR0_BASE, 2); 63 mmr_unlock(MCU_CTRL_MMR0_BASE, 3); 64 mmr_unlock(MCU_CTRL_MMR0_BASE, 4); 65 mmr_unlock(MCU_CTRL_MMR0_BASE, 6); 66 67 /* Unlock PADCFG_CTRL_MMR padconf registers */ 68 mmr_unlock(PADCFG_MMR0_BASE, 1); 69 mmr_unlock(PADCFG_MMR1_BASE, 1); 70} 71 72void board_init_f(ulong dummy) 73{ 74 struct udevice *dev; 75 int ret; 76 77#if defined(CONFIG_CPU_V7R) 78 setup_k3_mpu_regions(); 79#endif 80 81 /* 82 * Cannot delay this further as there is a chance that 83 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section. 84 */ 85 store_boot_info_from_rom(); 86 87 ctrl_mmr_unlock(); 88 89 /* Init DM early */ 90 spl_early_init(); 91 92 /* 93 * Process pinctrl for the serial0 and serial3, aka WKUP_UART0 and 94 * MAIN_UART1 modules and continue regardless of the result of pinctrl. 95 * Do this without probing the device, but instead by searching the 96 * device that would request the given sequence number if probed. The 97 * UARTs will be used by the DM firmware and TIFS firmware images 98 * respectively and the firmware depend on SPL to initialize the pin 99 * settings. 100 */ 101 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 0, &dev); 102 if (!ret) 103 pinctrl_select_state(dev, "default"); 104 105 ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev); 106 if (!ret) 107 pinctrl_select_state(dev, "default"); 108 109#ifdef CONFIG_K3_EARLY_CONS 110 /* 111 * Allow establishing an early console as required for example when 112 * doing a UART-based boot. Note that this console may not "survive" 113 * through a SYSFW PM-init step and will need a re-init in some way 114 * due to changing module clock frequencies. 115 */ 116 early_console_init(); 117#endif 118 119#if defined(CONFIG_K3_LOAD_SYSFW) 120 /* 121 * Configure and start up system controller firmware. Provide 122 * the U-Boot console init function to the SYSFW post-PM configuration 123 * callback hook, effectively switching on (or over) the console 124 * output. 125 */ 126 ret = is_rom_loaded_sysfw(&bootdata); 127 if (!ret) 128 panic("ROM has not loaded TIFS firmware\n"); 129 130 k3_sysfw_loader(true, NULL, NULL); 131 132 /* Disable ROM configured firewalls right after loading sysfw */ 133 remove_fwl_configs(cbass_main_fwls, ARRAY_SIZE(cbass_main_fwls)); 134#endif 135 136#if defined(CONFIG_CPU_V7R) 137 /* 138 * Relocate boot information to OCRAM (after TIFS has opend this 139 * region for us) so the next bootloader stages can keep access to 140 * primary vs backup bootmodes. 141 */ 142 writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM); 143#endif 144 145 /* 146 * Force probe of clk_k3 driver here to ensure basic default clock 147 * configuration is always done. 148 */ 149 if (IS_ENABLED(CONFIG_SPL_CLK_K3)) { 150 ret = uclass_get_device_by_driver(UCLASS_CLK, 151 DM_DRIVER_GET(ti_clk), 152 &dev); 153 if (ret) 154 printf("Failed to initialize clk-k3!\n"); 155 } 156 157 preloader_console_init(); 158 159 /* Output System Firmware version info */ 160 k3_sysfw_print_ver(); 161 162#if defined(CONFIG_K3_AM62A_DDRSS) 163 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 164 if (ret) 165 panic("DRAM init failed: %d\n", ret); 166#endif 167 168 setup_qos(); 169 170 debug("am62a_init: %s done\n", __func__); 171} 172 173static u32 __get_backup_bootmedia(u32 devstat) 174{ 175 u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> 176 MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; 177 u32 bkup_bootmode_cfg = 178 (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> 179 MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; 180 181 switch (bkup_bootmode) { 182 case BACKUP_BOOT_DEVICE_UART: 183 return BOOT_DEVICE_UART; 184 185 case BACKUP_BOOT_DEVICE_USB: 186 return BOOT_DEVICE_USB; 187 188 case BACKUP_BOOT_DEVICE_ETHERNET: 189 return BOOT_DEVICE_ETHERNET; 190 191 case BACKUP_BOOT_DEVICE_MMC: 192 if (bkup_bootmode_cfg) 193 return BOOT_DEVICE_MMC2; 194 return BOOT_DEVICE_MMC1; 195 196 case BACKUP_BOOT_DEVICE_SPI: 197 return BOOT_DEVICE_SPI; 198 199 case BACKUP_BOOT_DEVICE_I2C: 200 return BOOT_DEVICE_I2C; 201 202 case BACKUP_BOOT_DEVICE_DFU: 203 if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) 204 return BOOT_DEVICE_USB; 205 return BOOT_DEVICE_DFU; 206 }; 207 208 return BOOT_DEVICE_RAM; 209} 210 211static u32 __get_primary_bootmedia(u32 devstat) 212{ 213 u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> 214 MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; 215 u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> 216 MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; 217 218 switch (bootmode) { 219 case BOOT_DEVICE_OSPI: 220 fallthrough; 221 case BOOT_DEVICE_QSPI: 222 fallthrough; 223 case BOOT_DEVICE_XSPI: 224 fallthrough; 225 case BOOT_DEVICE_SPI: 226 return BOOT_DEVICE_SPI; 227 228 case BOOT_DEVICE_ETHERNET_RGMII: 229 fallthrough; 230 case BOOT_DEVICE_ETHERNET_RMII: 231 return BOOT_DEVICE_ETHERNET; 232 233 case BOOT_DEVICE_EMMC: 234 return BOOT_DEVICE_MMC1; 235 236 case BOOT_DEVICE_SPI_NAND: 237 return BOOT_DEVICE_SPINAND; 238 239 case BOOT_DEVICE_MMC: 240 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> 241 MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) 242 return BOOT_DEVICE_MMC2; 243 return BOOT_DEVICE_MMC1; 244 245 case BOOT_DEVICE_DFU: 246 if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> 247 MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) 248 return BOOT_DEVICE_USB; 249 return BOOT_DEVICE_DFU; 250 251 case BOOT_DEVICE_NOBOOT: 252 return BOOT_DEVICE_RAM; 253 } 254 255 return bootmode; 256} 257 258u32 spl_boot_device(void) 259{ 260 u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); 261 u32 bootmedia; 262 263 if (bootindex == K3_PRIMARY_BOOTMODE) 264 bootmedia = __get_primary_bootmedia(devstat); 265 else 266 bootmedia = __get_backup_bootmedia(devstat); 267 268 debug("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n", 269 __func__, devstat, bootmedia, bootindex); 270 return bootmedia; 271} 272