1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 *
5 * The file use ls102xa/timer.c as a reference.
6 */
7
8#include <common.h>
9#include <init.h>
10#include <time.h>
11#include <asm/global_data.h>
12#include <asm/io.h>
13#include <div64.h>
14#include <asm/arch/imx-regs.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/mach-imx/syscounter.h>
17#include <linux/delay.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21/*
22 * This function is intended for SHORT delays only.
23 * It will overflow at around 10 seconds @ 400MHz,
24 * or 20 seconds @ 200MHz.
25 */
26unsigned long usec2ticks(unsigned long usec)
27{
28	ulong ticks;
29
30	if (usec < 1000)
31		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
32	else
33		ticks = ((usec / 10) * (get_tbclk() / 100000));
34
35	return ticks;
36}
37
38static inline unsigned long long tick_to_time(unsigned long long tick)
39{
40	unsigned long freq;
41
42	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
43
44	tick *= CONFIG_SYS_HZ;
45	do_div(tick, freq);
46
47	return tick;
48}
49
50static inline unsigned long long us_to_tick(unsigned long long usec)
51{
52	unsigned long freq;
53
54	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
55
56	usec = usec * freq  + 999999;
57	do_div(usec, 1000000);
58
59	return usec;
60}
61
62#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || IS_ENABLED(CONFIG_SPL_BUILD)
63int timer_init(void)
64{
65	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
66	unsigned long val, freq;
67
68	freq = CFG_SC_TIMER_CLK;
69	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
70
71	writel(freq, &sctr->cntfid0);
72
73	/* Enable system counter */
74	val = readl(&sctr->cntcr);
75	val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
76	val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
77	writel(val, &sctr->cntcr);
78
79	gd->arch.tbl = 0;
80	gd->arch.tbu = 0;
81
82	gd->arch.timer_rate_hz = freq;
83	return 0;
84}
85#endif
86
87unsigned long long get_ticks(void)
88{
89	unsigned long long now;
90
91	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
92
93	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
94	gd->arch.tbu = (unsigned long)(now >> 32);
95
96	return now;
97}
98
99ulong get_timer(ulong base)
100{
101	return tick_to_time(get_ticks()) - base;
102}
103
104ulong timer_get_boot_us(void)
105{
106	if (!gd->arch.timer_rate_hz)
107		timer_init();
108
109	return tick_to_time(get_ticks());
110}
111
112void __udelay(unsigned long usec)
113{
114	unsigned long long tmp;
115	ulong tmo;
116
117	tmo = us_to_tick(usec);
118	tmp = get_ticks() + tmo;	/* get current timestamp */
119
120	while (get_ticks() < tmp)	/* loop till event */
121		 /*NOP*/;
122}
123
124/*
125 * This function is derived from PowerPC code (timebase clock frequency).
126 * On ARM it returns the number of timer ticks per second.
127 */
128ulong get_tbclk(void)
129{
130	unsigned long freq;
131
132	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
133
134	return freq;
135}
136