1124208Sdes/* SPDX-License-Identifier: GPL-2.0+ */ 2124208Sdes/* 3124208Sdes * da8xx-usb.h -- TI's DA8xx platform specific usb wrapper definitions. 4124208Sdes * 5124208Sdes * Author: Ajay Kumar Gupta <ajay.gupta@ti.com> 6124208Sdes * 7124208Sdes * Based on drivers/usb/musb/davinci.h 8124208Sdes * 9124208Sdes * Copyright (C) 2009 Texas Instruments Incorporated 10124208Sdes */ 11124208Sdes#ifndef __DA8XX_MUSB_H__ 12124208Sdes#define __DA8XX_MUSB_H__ 13124208Sdes 14124208Sdes#include <asm/arch/hardware.h> 15124208Sdes#include <asm/arch/gpio.h> 16124208Sdes 17124208Sdes/* Base address of da8xx usb0 wrapper */ 18124208Sdes#define DA8XX_USB_OTG_BASE 0x01E00000 19124208Sdes 20124208Sdes/* Base address of da8xx musb core */ 21124208Sdes#define DA8XX_USB_OTG_CORE_BASE (DA8XX_USB_OTG_BASE + 0x400) 22124208Sdes 23124208Sdes/* Timeout for DA8xx usb module */ 24124208Sdes#define DA8XX_USB_OTG_TIMEOUT 0x3FFFFFF 25124208Sdes 2698937Sdes/* 2798937Sdes * DA8xx platform USB wrapper register overlay. 28124208Sdes */ 29124208Sdesstruct da8xx_usb_regs { 30124208Sdes dv_reg revision; 3198937Sdes dv_reg control; 32162852Sdes dv_reg status; 33162852Sdes dv_reg emulation; 34162852Sdes dv_reg mode; 35162852Sdes dv_reg autoreq; 3698937Sdes dv_reg srpfixtime; 37124208Sdes dv_reg teardown; 3898937Sdes dv_reg intsrc; 3998937Sdes dv_reg intsrc_set; 40124208Sdes dv_reg intsrc_clr; 4198937Sdes dv_reg intmsk; 4298937Sdes dv_reg intmsk_set; 43124208Sdes dv_reg intmsk_clr; 4498937Sdes dv_reg intsrcmsk; 4598937Sdes dv_reg eoi; 4698937Sdes dv_reg intvector; 4798937Sdes dv_reg grndis_size[4]; 4898937Sdes}; 4998937Sdes 5098937Sdes#define da8xx_usb_regs ((struct da8xx_usb_regs *)DA8XX_USB_OTG_BASE) 51124208Sdes 5298937Sdes/* DA8XX interrupt bits definitions */ 5398937Sdes#define DA8XX_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ 54124208Sdes#define DA8XX_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ 5598937Sdes#define DA8XX_USB_TXINT_SHIFT 0 56124208Sdes#define DA8XX_USB_RXINT_SHIFT 8 5798937Sdes 5898937Sdes#define DA8XX_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ 5998937Sdes#define DA8XX_USB_TXINT_MASK \ 6098937Sdes (DA8XX_USB_TX_ENDPTS_MASK << DA8XX_USB_TXINT_SHIFT) 6198937Sdes#define DA8XX_USB_RXINT_MASK \ 6298937Sdes (DA8XX_USB_RX_ENDPTS_MASK << DA8XX_USB_RXINT_SHIFT) 6398937Sdes 6498937Sdes/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */ 6598937Sdes#define CFGCHIP2_PHYCLKGD (1 << 17) 6698937Sdes#define CFGCHIP2_VBUSSENSE (1 << 16) 6798937Sdes#define CFGCHIP2_RESET (1 << 15) 6898937Sdes#define CFGCHIP2_OTGMODE (3 << 13) 6998937Sdes#define CFGCHIP2_NO_OVERRIDE (0 << 13) 7098937Sdes#define CFGCHIP2_FORCE_HOST (1 << 13) 7198937Sdes#define CFGCHIP2_FORCE_DEVICE (2 << 13) 7298937Sdes#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13) 7398937Sdes#define CFGCHIP2_USB1PHYCLKMUX (1 << 12) 7498937Sdes#define CFGCHIP2_USB2PHYCLKMUX (1 << 11) 7598937Sdes#define CFGCHIP2_PHYPWRDN (1 << 10) 7698937Sdes#define CFGCHIP2_OTGPWRDN (1 << 9) 7798937Sdes#define CFGCHIP2_DATPOL (1 << 8) 7898937Sdes#define CFGCHIP2_USB1SUSPENDM (1 << 7) 7998937Sdes#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */ 8098937Sdes#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */ 8198937Sdes#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */ 8298937Sdes#define CFGCHIP2_REFFREQ (0xf << 0) 8398937Sdes#define CFGCHIP2_REFFREQ_12MHZ (1 << 0) 8498937Sdes#define CFGCHIP2_REFFREQ_24MHZ (2 << 0) 8598937Sdes#define CFGCHIP2_REFFREQ_48MHZ (3 << 0) 8698937Sdes 8798937Sdes#define DA8XX_USB_VBUS_GPIO (1 << 15) 8898937Sdes 8998937Sdes#endif /* __DA8XX_MUSB_H__ */ 9098937Sdes