1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h] 4 * 5 * (C) 2007 Atmel Corporation. 6 * (C) Copyright 2010 7 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de 8 * 9 * Definitions for the SoC: 10 * AT91SAM9263 11 */ 12 13#ifndef AT91SAM9263_H 14#define AT91SAM9263_H 15 16/* 17 * Peripheral identifiers/interrupts. 18 */ 19#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 20#define ATMEL_ID_SYS 1 /* System Peripherals */ 21#define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */ 22#define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */ 23#define ATMEL_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ 24/* Reserved: 5 */ 25/* Reserved: 6 */ 26#define ATMEL_ID_USART0 7 /* USART 0 */ 27#define ATMEL_ID_USART1 8 /* USART 1 */ 28#define ATMEL_ID_USART2 9 /* USART 2 */ 29#define ATMEL_ID_MCI0 10 /* Multimedia Card Interface 0 */ 30#define ATMEL_ID_MCI1 11 /* Multimedia Card Interface 1 */ 31#define ATMEL_ID_CAN 12 /* CAN */ 32#define ATMEL_ID_TWI 13 /* Two-Wire Interface */ 33#define ATMEL_ID_SPI0 14 /* Serial Peripheral Interface 0 */ 34#define ATMEL_ID_SPI1 15 /* Serial Peripheral Interface 1 */ 35#define ATMEL_ID_SSC0 16 /* Serial Synchronous Controller 0 */ 36#define ATMEL_ID_SSC1 17 /* Serial Synchronous Controller 1 */ 37#define ATMEL_ID_AC97C 18 /* AC97 Controller */ 38#define ATMEL_ID_TCB 19 /* Timer Counter 0, 1 and 2 */ 39#define ATMEL_ID_PWMC 20 /* Pulse Width Modulation Controller */ 40#define ATMEL_ID_EMAC 21 /* Ethernet */ 41/* Reserved: 22 */ 42#define ATMEL_ID_2DGE 23 /* 2D Graphic Engine */ 43#define ATMEL_ID_UDP 24 /* USB Device Port */ 44#define ATMEL_ID_ISI 25 /* Image Sensor Interface */ 45#define ATMEL_ID_LCDC 26 /* LCD Controller */ 46#define ATMEL_ID_DMA 27 /* DMA Controller */ 47/* Reserved: 28 */ 48#define ATMEL_ID_UHP 29 /* USB Host port */ 49#define ATMEL_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ 50#define ATMEL_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ 51 52/* 53 * User Peripherals physical base addresses. 54 */ 55#define ATMEL_BASE_UDP 0xfff78000 56#define ATMEL_BASE_TCB0 0xfff7c000 57#define ATMEL_BASE_TC0 0xfff7c000 58#define ATMEL_BASE_TC1 0xfff7c040 59#define ATMEL_BASE_TC2 0xfff7c080 60#define ATMEL_BASE_MCI0 0xfff80000 61#define ATMEL_BASE_MCI1 0xfff84000 62#define ATMEL_BASE_TWI 0xfff88000 63#define ATMEL_BASE_USART0 0xfff8c000 64#define ATMEL_BASE_USART1 0xfff90000 65#define ATMEL_BASE_USART2 0xfff94000 66#define ATMEL_BASE_SSC0 0xfff98000 67#define ATMEL_BASE_SSC1 0xfff9c000 68#define ATMEL_BASE_AC97C 0xfffa0000 69#define ATMEL_BASE_SPI0 0xfffa4000 70#define ATMEL_BASE_SPI1 0xfffa8000 71#define ATMEL_BASE_CAN 0xfffac000 72#define ATMEL_BASE_PWMC 0xfffb8000 73#define ATMEL_BASE_EMAC 0xfffbc000 74#define ATMEL_BASE_ISI 0xfffc4000 75#define ATMEL_BASE_2DGE 0xfffc8000 76 77/* 78 * System Peripherals physical base addresses. 79 */ 80#define ATMEL_BASE_ECC0 0xffffe000 81#define ATMEL_BASE_SDRAMC0 0xffffe200 82#define ATMEL_BASE_SMC0 0xffffe400 83#define ATMEL_BASE_ECC1 0xffffe600 84#define ATMEL_BASE_SDRAMC1 0xffffe800 85#define ATMEL_BASE_SMC1 0xffffea00 86#define ATMEL_BASE_MATRIX 0xffffec00 87#define ATMEL_BASE_CCFG 0xffffed10 88#define ATMEL_BASE_DBGU 0xffffee00 89#define ATMEL_BASE_AIC 0xfffff000 90#define ATMEL_BASE_PIOA 0xfffff200 91#define ATMEL_BASE_PIOB 0xfffff400 92#define ATMEL_BASE_PIOC 0xfffff600 93#define ATMEL_BASE_PIOD 0xfffff800 94#define ATMEL_BASE_PIOE 0xfffffa00 95#define ATMEL_BASE_PMC 0xfffffc00 96#define ATMEL_BASE_RSTC 0xfffffd00 97#define ATMEL_BASE_SHDWC 0xfffffd10 98#define ATMEL_BASE_RTT0 0xfffffd20 99#define ATMEL_BASE_PIT 0xfffffd30 100#define ATMEL_BASE_WDT 0xfffffd40 101#define ATMEL_BASE_RTT1 0xfffffd50 102#define ATMEL_BASE_GPBR 0xfffffd60 103 104/* 105 * Internal Memory. 106 */ 107#define ATMEL_BASE_SRAM0 0x00300000 /* Internal SRAM 0 */ 108 109#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM */ 110 111#define ATMEL_BASE_SRAM1 0x00500000 /* Internal SRAM 1 */ 112 113#define ATMEL_BASE_LCDC 0x00700000 /* LCD Controller */ 114#define ATMEL_BASE_DMAC 0x00800000 /* DMA Controller */ 115#define ATMEL_BASE_UHP 0x00a00000 /* USB Host controller */ 116 117/* 118 * External memory 119 */ 120#define ATMEL_BASE_CS0 0x10000000 /* typically NOR */ 121#define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ 122#define ATMEL_BASE_CS2 0x30000000 123#define ATMEL_BASE_CS3 0x40000000 /* typically NAND */ 124#define ATMEL_BASE_CS4 0x50000000 125#define ATMEL_BASE_CS5 0x60000000 126#define ATMEL_BASE_CS6 0x70000000 127#define ATMEL_BASE_CS7 0x80000000 128 129/* Timer */ 130#define CFG_SYS_TIMER_COUNTER 0xfffffd3c 131 132/* 133 * Other misc defines 134 */ 135#define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */ 136#define ATMEL_BASE_PIO ATMEL_BASE_PIOA 137#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 138 139/* 140 * Cpu Name 141 */ 142#define ATMEL_CPU_NAME "AT91SAM9263" 143 144#endif 145