1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
4 *
5 * This program is used to generate definitions needed by
6 * assembly language modules.
7 *
8 * We use the technique used in the OSF Mach kernel code:
9 * generate asm statements containing #defines,
10 * compile this file to assembler, and then extract the
11 * #defines from the assembly-language output.
12 *
13 * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
14 *
15 * Authors:
16 *   Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
17 */
18
19#include <common.h>
20#include <linux/kbuild.h>
21#include <linux/arm-smccc.h>
22
23#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
24#include <asm/arch/imx-regs.h>
25#endif
26
27int main(void)
28{
29	/*
30	 * TODO : Check if each entry in this file is really necessary.
31	 *   - struct esdramc_regs
32	 *   - struct max_regs
33	 *   - struct aips_regs
34	 *   - struct aipi_regs
35	 *   - struct clkctl
36	 *   - struct dpll
37	 * are used only for generating asm-offsets.h.
38	 * It means their offset addresses are referenced only from assembly
39	 * code. Is it better to define the macros directly in headers?
40	 */
41
42#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
43	/* Round up to make sure size gives nice stack alignment */
44	DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
45	DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
46	DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
47	DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
48	DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
49	DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
50	DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
51	DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
52	DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
53	DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
54	DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
55	DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
56	DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
57	DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
58	DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
59	DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
60	DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
61	DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
62	DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
63	DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
64	DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
65	DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
66	DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
67	DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
68	DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
69	DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
70	DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
71	DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
72	DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
73	DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
74	DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
75	DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
76	DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
77	DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
78#if defined(CONFIG_MX53)
79	DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
80#endif
81
82	/* DPLL */
83	DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
84	DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
85	DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
86	DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
87	DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
88	DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
89	DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
90	DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
91#endif
92
93#ifdef CONFIG_ARM_SMCCC
94	DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
95	DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
96	DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
97	DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
98#ifdef CONFIG_ARM64
99	DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS,	offsetof(struct arm_smccc_1_2_regs, a0));
100	DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS,	offsetof(struct arm_smccc_1_2_regs, a2));
101	DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS,	offsetof(struct arm_smccc_1_2_regs, a4));
102	DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS,	offsetof(struct arm_smccc_1_2_regs, a6));
103	DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS,	offsetof(struct arm_smccc_1_2_regs, a8));
104	DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS,	offsetof(struct arm_smccc_1_2_regs, a10));
105	DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS,	offsetof(struct arm_smccc_1_2_regs, a12));
106	DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS,	offsetof(struct arm_smccc_1_2_regs, a14));
107	DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS,	offsetof(struct arm_smccc_1_2_regs, a16));
108#endif
109#endif
110
111	return 0;
112}
113