1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2014 Freescale Semiconductor, Inc.
4 */
5
6#ifndef __ASM_ARCH_MX6SX_DDR_H__
7#define __ASM_ARCH_MX6SX_DDR_H__
8
9#ifndef CONFIG_MX6SX
10#error "wrong CPU"
11#endif
12
13#define MX6_IOM_DRAM_DQM0	0x020e02ec
14#define MX6_IOM_DRAM_DQM1	0x020e02f0
15#define MX6_IOM_DRAM_DQM2	0x020e02f4
16#define MX6_IOM_DRAM_DQM3	0x020e02f8
17
18#define MX6_IOM_DRAM_RAS	0x020e02fc
19#define MX6_IOM_DRAM_CAS	0x020e0300
20#define MX6_IOM_DRAM_SDODT0	0x020e0310
21#define MX6_IOM_DRAM_SDODT1	0x020e0314
22#define MX6_IOM_DRAM_SDBA2	0x020e0320
23#define MX6_IOM_DRAM_SDCKE0	0x020e0324
24#define MX6_IOM_DRAM_SDCKE1	0x020e0328
25#define MX6_IOM_DRAM_SDCLK_0	0x020e032c
26#define MX6_IOM_DRAM_RESET	0x020e0340
27
28#define MX6_IOM_DRAM_SDQS0	0x020e0330
29#define MX6_IOM_DRAM_SDQS1	0x020e0334
30#define MX6_IOM_DRAM_SDQS2	0x020e0338
31#define MX6_IOM_DRAM_SDQS3	0x020e033c
32
33#define MX6_IOM_GRP_ADDDS	0x020e05f4
34#define MX6_IOM_DDRMODE_CTL	0x020e05f8
35#define MX6_IOM_GRP_DDRPKE	0x020e05fc
36#define MX6_IOM_GRP_DDRMODE	0x020e0608
37#define MX6_IOM_GRP_B0DS	0x020e060c
38#define MX6_IOM_GRP_B1DS	0x020e0610
39#define MX6_IOM_GRP_CTLDS	0x020e0614
40#define MX6_IOM_GRP_DDR_TYPE	0x020e0618
41#define MX6_IOM_GRP_B2DS	0x020e061c
42#define MX6_IOM_GRP_B3DS	0x020e0620
43
44#endif	/*__ASM_ARCH_MX6SX_DDR_H__ */
45