1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2016 Freescale Semiconductor, Inc.
4 */
5
6#include <common.h>
7#include <asm/arch/fsl_serdes.h>
8#include <asm/arch/immap_lsch2.h>
9
10struct serdes_config {
11	u32 protocol;
12	u8 lanes[SRDS_MAX_LANES];
13};
14
15static struct serdes_config serdes1_cfg_tbl[] = {
16	{0x2208, {SGMII_2500_FM1_DTSEC1, SGMII_2500_FM1_DTSEC2, NONE, SATA1} },
17	{0x0008, {NONE, NONE, NONE, SATA1} },
18	{0x3508, {SGMII_FM1_DTSEC1, PCIE1, NONE, SATA1} },
19	{0x3305, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, NONE, PCIE1} },
20	{0x2205, {SGMII_2500_FM1_DTSEC1, SGMII_2500_FM1_DTSEC2, NONE, PCIE1} },
21	{0x2305, {SGMII_2500_FM1_DTSEC1, SGMII_FM1_DTSEC2, NONE, PCIE1} },
22	{0x9508, {TX_CLK, PCIE1, NONE, SATA1} },
23	{0x3905, {SGMII_FM1_DTSEC1, TX_CLK, NONE, PCIE1} },
24	{0x9305, {TX_CLK, SGMII_FM1_DTSEC2, NONE, PCIE1} },
25	{}
26};
27
28static struct serdes_config *serdes_cfg_tbl[] = {
29	serdes1_cfg_tbl,
30};
31
32enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
33{
34	struct serdes_config *ptr;
35
36	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
37		return 0;
38
39	ptr = serdes_cfg_tbl[serdes];
40	while (ptr->protocol) {
41		if (ptr->protocol == cfg)
42			return ptr->lanes[lane];
43		ptr++;
44	}
45
46	return 0;
47}
48
49int is_serdes_prtcl_valid(int serdes, u32 prtcl)
50{
51	int i;
52	struct serdes_config *ptr;
53
54	if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
55		return 0;
56
57	ptr = serdes_cfg_tbl[serdes];
58	while (ptr->protocol) {
59		if (ptr->protocol == prtcl)
60			break;
61		ptr++;
62	}
63
64	if (!ptr->protocol)
65		return 0;
66
67	for (i = 0; i < SRDS_MAX_LANES; i++) {
68		if (ptr->lanes[i] != NONE)
69			return 1;
70	}
71
72	return 0;
73}
74