1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 compatible = "nvidia,p2371-2180\0nvidia,tegra210"; 15 interrupt-parent = < 0x01 >; 16 #address-cells = < 0x02 >; 17 #size-cells = < 0x02 >; 18 model = "NVIDIA Jetson TX1 Developer Kit"; 19 20 pcie@1003000 { 21 compatible = "nvidia,tegra210-pcie"; 22 device_type = "pci"; 23 reg = < 0x00 0x1003000 0x00 0x800 0x00 0x1003800 0x00 0x800 0x00 0x2000000 0x00 0x10000000 >; 24 reg-names = "pads\0afi\0cs"; 25 interrupts = < 0x00 0x62 0x04 0x00 0x63 0x04 >; 26 interrupt-names = "intr\0msi"; 27 #interrupt-cells = < 0x01 >; 28 interrupt-map-mask = < 0x00 0x00 0x00 0x00 >; 29 interrupt-map = < 0x00 0x00 0x00 0x00 0x02 0x00 0x62 0x04 >; 30 bus-range = < 0x00 0xff >; 31 #address-cells = < 0x03 >; 32 #size-cells = < 0x02 >; 33 ranges = < 0x82000000 0x00 0x1000000 0x00 0x1000000 0x00 0x1000 0x82000000 0x00 0x1001000 0x00 0x1001000 0x00 0x1000 0x81000000 0x00 0x00 0x00 0x12000000 0x00 0x10000 0x82000000 0x00 0x13000000 0x00 0x13000000 0x00 0xd000000 0xc2000000 0x00 0x20000000 0x00 0x20000000 0x00 0x20000000 >; 34 clocks = < 0x03 0x46 0x03 0x48 0x03 0x107 0x03 0x12c >; 35 clock-names = "pex\0afi\0pll_e\0cml"; 36 resets = < 0x03 0x46 0x03 0x48 0x03 0x4a >; 37 reset-names = "pex\0afi\0pcie_x"; 38 status = "okay"; 39 avdd-pll-uerefe-supply = < 0x04 >; 40 hvddio-pex-supply = < 0x05 >; 41 dvddio-pex-supply = < 0x06 >; 42 dvdd-pex-pll-supply = < 0x06 >; 43 hvdd-pex-pll-e-supply = < 0x05 >; 44 vddio-pex-ctl-supply = < 0x05 >; 45 46 pci@1,0 { 47 device_type = "pci"; 48 assigned-addresses = < 0x82000800 0x00 0x1000000 0x00 0x1000 >; 49 reg = < 0x800 0x00 0x00 0x00 0x00 >; 50 bus-range = < 0x00 0xff >; 51 status = "okay"; 52 #address-cells = < 0x03 >; 53 #size-cells = < 0x02 >; 54 ranges; 55 nvidia,num-lanes = < 0x04 >; 56 phys = < 0x07 0x08 0x09 0x0a >; 57 phy-names = "pcie-0\0pcie-1\0pcie-2\0pcie-3"; 58 }; 59 60 pci@2,0 { 61 device_type = "pci"; 62 assigned-addresses = < 0x82001000 0x00 0x1001000 0x00 0x1000 >; 63 reg = < 0x1000 0x00 0x00 0x00 0x00 >; 64 bus-range = < 0x00 0xff >; 65 status = "okay"; 66 #address-cells = < 0x03 >; 67 #size-cells = < 0x02 >; 68 ranges; 69 nvidia,num-lanes = < 0x01 >; 70 phys = < 0x0b >; 71 phy-names = "pcie-0"; 72 }; 73 }; 74 75 host1x@50000000 { 76 compatible = "nvidia,tegra210-host1x\0simple-bus"; 77 reg = < 0x00 0x50000000 0x00 0x34000 >; 78 interrupts = < 0x00 0x41 0x04 0x00 0x43 0x04 >; 79 clocks = < 0x03 0x1c >; 80 clock-names = "host1x"; 81 resets = < 0x03 0x1c >; 82 reset-names = "host1x"; 83 #address-cells = < 0x02 >; 84 #size-cells = < 0x02 >; 85 ranges = < 0x00 0x54000000 0x00 0x54000000 0x00 0x1000000 >; 86 iommus = < 0x0c 0x06 >; 87 88 dpaux@54040000 { 89 compatible = "nvidia,tegra210-dpaux"; 90 reg = < 0x00 0x54040000 0x00 0x40000 >; 91 interrupts = < 0x00 0x0b 0x04 >; 92 clocks = < 0x03 0xcf 0x03 0x12f >; 93 clock-names = "dpaux\0parent"; 94 resets = < 0x03 0xcf >; 95 reset-names = "dpaux"; 96 power-domains = < 0x0d >; 97 status = "okay"; 98 99 pinmux-aux { 100 groups = "dpaux-io"; 101 function = "aux"; 102 phandle = < 0x17 >; 103 }; 104 105 pinmux-i2c { 106 groups = "dpaux-io"; 107 function = "i2c"; 108 phandle = < 0x18 >; 109 }; 110 111 pinmux-off { 112 groups = "dpaux-io"; 113 function = "off"; 114 phandle = < 0x19 >; 115 }; 116 117 i2c-bus { 118 #address-cells = < 0x01 >; 119 #size-cells = < 0x00 >; 120 }; 121 }; 122 123 vi@54080000 { 124 compatible = "nvidia,tegra210-vi"; 125 reg = < 0x00 0x54080000 0x00 0x40000 >; 126 interrupts = < 0x00 0x45 0x04 >; 127 status = "disabled"; 128 }; 129 130 tsec@54100000 { 131 compatible = "nvidia,tegra210-tsec"; 132 reg = < 0x00 0x54100000 0x00 0x40000 >; 133 }; 134 135 dc@54200000 { 136 compatible = "nvidia,tegra210-dc"; 137 reg = < 0x00 0x54200000 0x00 0x40000 >; 138 interrupts = < 0x00 0x49 0x04 >; 139 clocks = < 0x03 0x1b 0x03 0xf3 >; 140 clock-names = "dc\0parent"; 141 resets = < 0x03 0x1b >; 142 reset-names = "dc"; 143 iommus = < 0x0c 0x01 >; 144 nvidia,head = < 0x00 >; 145 }; 146 147 dc@54240000 { 148 compatible = "nvidia,tegra210-dc"; 149 reg = < 0x00 0x54240000 0x00 0x40000 >; 150 interrupts = < 0x00 0x4a 0x04 >; 151 clocks = < 0x03 0x1a 0x03 0xf3 >; 152 clock-names = "dc\0parent"; 153 resets = < 0x03 0x1a >; 154 reset-names = "dc"; 155 iommus = < 0x0c 0x02 >; 156 nvidia,head = < 0x01 >; 157 }; 158 159 dsi@54300000 { 160 compatible = "nvidia,tegra210-dsi"; 161 reg = < 0x00 0x54300000 0x00 0x40000 >; 162 clocks = < 0x03 0x30 0x03 0x93 0x03 0xfb >; 163 clock-names = "dsi\0lp\0parent"; 164 resets = < 0x03 0x30 >; 165 reset-names = "dsi"; 166 power-domains = < 0x0d >; 167 nvidia,mipi-calibrate = < 0x0e 0xc0 >; 168 status = "okay"; 169 #address-cells = < 0x01 >; 170 #size-cells = < 0x00 >; 171 avdd-dsi-csi-supply = < 0x0f >; 172 173 panel@0 { 174 compatible = "auo,b080uan01"; 175 reg = < 0x00 >; 176 enable-gpios = < 0x10 0xaa 0x00 >; 177 power-supply = < 0x11 >; 178 backlight = < 0x12 >; 179 }; 180 }; 181 182 vic@54340000 { 183 compatible = "nvidia,tegra210-vic"; 184 reg = < 0x00 0x54340000 0x00 0x40000 >; 185 interrupts = < 0x00 0x48 0x04 >; 186 clocks = < 0x03 0xb2 >; 187 clock-names = "vic"; 188 resets = < 0x03 0xb2 >; 189 reset-names = "vic"; 190 iommus = < 0x0c 0x16 >; 191 power-domains = < 0x13 >; 192 }; 193 194 nvjpg@54380000 { 195 compatible = "nvidia,tegra210-nvjpg"; 196 reg = < 0x00 0x54380000 0x00 0x40000 >; 197 status = "disabled"; 198 }; 199 200 dsi@54400000 { 201 compatible = "nvidia,tegra210-dsi"; 202 reg = < 0x00 0x54400000 0x00 0x40000 >; 203 clocks = < 0x03 0x52 0x03 0x94 0x03 0xfb >; 204 clock-names = "dsi\0lp\0parent"; 205 resets = < 0x03 0x52 >; 206 reset-names = "dsi"; 207 power-domains = < 0x0d >; 208 nvidia,mipi-calibrate = < 0x0e 0x300 >; 209 status = "disabled"; 210 #address-cells = < 0x01 >; 211 #size-cells = < 0x00 >; 212 }; 213 214 nvdec@54480000 { 215 compatible = "nvidia,tegra210-nvdec"; 216 reg = < 0x00 0x54480000 0x00 0x40000 >; 217 status = "disabled"; 218 }; 219 220 nvenc@544c0000 { 221 compatible = "nvidia,tegra210-nvenc"; 222 reg = < 0x00 0x544c0000 0x00 0x40000 >; 223 status = "disabled"; 224 }; 225 226 tsec@54500000 { 227 compatible = "nvidia,tegra210-tsec"; 228 reg = < 0x00 0x54500000 0x00 0x40000 >; 229 status = "disabled"; 230 }; 231 232 sor@54540000 { 233 compatible = "nvidia,tegra210-sor"; 234 reg = < 0x00 0x54540000 0x00 0x40000 >; 235 interrupts = < 0x00 0x4c 0x04 >; 236 clocks = < 0x03 0xb6 0x03 0xfb 0x03 0x12f 0x03 0xde >; 237 clock-names = "sor\0parent\0dp\0safe"; 238 resets = < 0x03 0xb6 >; 239 reset-names = "sor"; 240 pinctrl-0 = < 0x14 >; 241 pinctrl-1 = < 0x15 >; 242 pinctrl-2 = < 0x16 >; 243 pinctrl-names = "aux\0i2c\0off"; 244 power-domains = < 0x0d >; 245 status = "disabled"; 246 }; 247 248 sor@54580000 { 249 compatible = "nvidia,tegra210-sor1"; 250 reg = < 0x00 0x54580000 0x00 0x40000 >; 251 interrupts = < 0x00 0x4b 0x04 >; 252 clocks = < 0x03 0xb7 0x03 0x11a 0x03 0xfd 0x03 0x12f 0x03 0xde >; 253 clock-names = "sor\0out\0parent\0dp\0safe"; 254 resets = < 0x03 0xb7 >; 255 reset-names = "sor"; 256 pinctrl-0 = < 0x17 >; 257 pinctrl-1 = < 0x18 >; 258 pinctrl-2 = < 0x19 >; 259 pinctrl-names = "aux\0i2c\0off"; 260 power-domains = < 0x0d >; 261 status = "okay"; 262 avdd-io-supply = < 0x1a >; 263 vdd-pll-supply = < 0x05 >; 264 hdmi-supply = < 0x1b >; 265 nvidia,ddc-i2c-bus = < 0x1c >; 266 nvidia,hpd-gpio = < 0x10 0xe1 0x01 >; 267 }; 268 269 dpaux@545c0000 { 270 compatible = "nvidia,tegra124-dpaux"; 271 reg = < 0x00 0x545c0000 0x00 0x40000 >; 272 interrupts = < 0x00 0x9f 0x04 >; 273 clocks = < 0x03 0xb5 0x03 0x12f >; 274 clock-names = "dpaux\0parent"; 275 resets = < 0x03 0xb5 >; 276 reset-names = "dpaux"; 277 power-domains = < 0x0d >; 278 status = "disabled"; 279 280 pinmux-aux { 281 groups = "dpaux-io"; 282 function = "aux"; 283 phandle = < 0x14 >; 284 }; 285 286 pinmux-i2c { 287 groups = "dpaux-io"; 288 function = "i2c"; 289 phandle = < 0x15 >; 290 }; 291 292 pinmux-off { 293 groups = "dpaux-io"; 294 function = "off"; 295 phandle = < 0x16 >; 296 }; 297 298 i2c-bus { 299 #address-cells = < 0x01 >; 300 #size-cells = < 0x00 >; 301 }; 302 }; 303 304 isp@54600000 { 305 compatible = "nvidia,tegra210-isp"; 306 reg = < 0x00 0x54600000 0x00 0x40000 >; 307 interrupts = < 0x00 0x47 0x04 >; 308 status = "disabled"; 309 }; 310 311 isp@54680000 { 312 compatible = "nvidia,tegra210-isp"; 313 reg = < 0x00 0x54680000 0x00 0x40000 >; 314 interrupts = < 0x00 0x46 0x04 >; 315 status = "disabled"; 316 }; 317 318 i2c@546c0000 { 319 compatible = "nvidia,tegra210-i2c-vi"; 320 reg = < 0x00 0x546c0000 0x00 0x40000 >; 321 interrupts = < 0x00 0x11 0x04 >; 322 status = "disabled"; 323 }; 324 }; 325 326 interrupt-controller@50041000 { 327 compatible = "arm,gic-400"; 328 #interrupt-cells = < 0x03 >; 329 interrupt-controller; 330 reg = < 0x00 0x50041000 0x00 0x1000 0x00 0x50042000 0x00 0x2000 0x00 0x50044000 0x00 0x2000 0x00 0x50046000 0x00 0x2000 >; 331 interrupts = < 0x01 0x09 0xf04 >; 332 interrupt-parent = < 0x02 >; 333 phandle = < 0x02 >; 334 }; 335 336 gpu@57000000 { 337 compatible = "nvidia,gm20b"; 338 reg = < 0x00 0x57000000 0x00 0x1000000 0x00 0x58000000 0x00 0x1000000 >; 339 interrupts = < 0x00 0x9d 0x04 0x00 0x9e 0x04 >; 340 interrupt-names = "stall\0nonstall"; 341 clocks = < 0x03 0xb8 0x03 0x12b 0x03 0xbd >; 342 clock-names = "gpu\0pwr\0ref"; 343 resets = < 0x03 0xb8 >; 344 reset-names = "gpu"; 345 iommus = < 0x0c 0x11 >; 346 status = "disabled"; 347 vdd-supply = < 0x1d >; 348 }; 349 350 interrupt-controller@60004000 { 351 compatible = "nvidia,tegra210-ictlr"; 352 reg = < 0x00 0x60004000 0x00 0x40 0x00 0x60004100 0x00 0x40 0x00 0x60004200 0x00 0x40 0x00 0x60004300 0x00 0x40 0x00 0x60004400 0x00 0x40 0x00 0x60004500 0x00 0x40 >; 353 interrupt-controller; 354 #interrupt-cells = < 0x03 >; 355 interrupt-parent = < 0x02 >; 356 phandle = < 0x01 >; 357 }; 358 359 timer@60005000 { 360 compatible = "nvidia,tegra210-timer\0nvidia,tegra20-timer"; 361 reg = < 0x00 0x60005000 0x00 0x400 >; 362 interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x79 0x04 0x00 0x7a 0x04 >; 363 clocks = < 0x03 0x05 >; 364 clock-names = "timer"; 365 }; 366 367 clock@60006000 { 368 compatible = "nvidia,tegra210-car"; 369 reg = < 0x00 0x60006000 0x00 0x1000 >; 370 #clock-cells = < 0x01 >; 371 #reset-cells = < 0x01 >; 372 phandle = < 0x03 >; 373 }; 374 375 flow-controller@60007000 { 376 compatible = "nvidia,tegra210-flowctrl"; 377 reg = < 0x00 0x60007000 0x00 0x1000 >; 378 }; 379 380 gpio@6000d000 { 381 compatible = "nvidia,tegra210-gpio\0nvidia,tegra30-gpio"; 382 reg = < 0x00 0x6000d000 0x00 0x1000 >; 383 interrupts = < 0x00 0x20 0x04 0x00 0x21 0x04 0x00 0x22 0x04 0x00 0x23 0x04 0x00 0x37 0x04 0x00 0x57 0x04 0x00 0x59 0x04 0x00 0x7d 0x04 >; 384 #gpio-cells = < 0x02 >; 385 gpio-controller; 386 #interrupt-cells = < 0x02 >; 387 interrupt-controller; 388 phandle = < 0x10 >; 389 }; 390 391 dma@60020000 { 392 compatible = "nvidia,tegra210-apbdma\0nvidia,tegra148-apbdma"; 393 reg = < 0x00 0x60020000 0x00 0x1400 >; 394 interrupts = < 0x00 0x68 0x04 0x00 0x69 0x04 0x00 0x6a 0x04 0x00 0x6b 0x04 0x00 0x6c 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x80 0x04 0x00 0x81 0x04 0x00 0x82 0x04 0x00 0x83 0x04 0x00 0x84 0x04 0x00 0x85 0x04 0x00 0x86 0x04 0x00 0x87 0x04 0x00 0x88 0x04 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x8b 0x04 0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04 >; 395 clocks = < 0x03 0x22 >; 396 clock-names = "dma"; 397 resets = < 0x03 0x22 >; 398 reset-names = "dma"; 399 #dma-cells = < 0x01 >; 400 phandle = < 0x1f >; 401 }; 402 403 apbmisc@70000800 { 404 compatible = "nvidia,tegra210-apbmisc\0nvidia,tegra20-apbmisc"; 405 reg = < 0x00 0x70000800 0x00 0x64 0x00 0x7000e864 0x00 0x04 >; 406 }; 407 408 pinmux@700008d4 { 409 compatible = "nvidia,tegra210-pinmux"; 410 reg = < 0x00 0x700008d4 0x00 0x29c 0x00 0x70003000 0x00 0x294 >; 411 pinctrl-names = "boot"; 412 pinctrl-0 = < 0x1e >; 413 414 pinmux { 415 phandle = < 0x1e >; 416 417 pex_l0_rst_n_pa0 { 418 nvidia,pins = "pex_l0_rst_n_pa0"; 419 nvidia,function = "pe0"; 420 nvidia,pull = < 0x00 >; 421 nvidia,tristate = < 0x00 >; 422 nvidia,enable-input = < 0x00 >; 423 nvidia,open-drain = < 0x00 >; 424 nvidia,io-hv = < 0x01 >; 425 }; 426 427 pex_l0_clkreq_n_pa1 { 428 nvidia,pins = "pex_l0_clkreq_n_pa1"; 429 nvidia,function = "pe0"; 430 nvidia,pull = < 0x00 >; 431 nvidia,tristate = < 0x00 >; 432 nvidia,enable-input = < 0x01 >; 433 nvidia,open-drain = < 0x00 >; 434 nvidia,io-hv = < 0x01 >; 435 }; 436 437 pex_wake_n_pa2 { 438 nvidia,pins = "pex_wake_n_pa2"; 439 nvidia,function = "pe"; 440 nvidia,pull = < 0x00 >; 441 nvidia,tristate = < 0x00 >; 442 nvidia,enable-input = < 0x01 >; 443 nvidia,open-drain = < 0x00 >; 444 nvidia,io-hv = < 0x01 >; 445 }; 446 447 pex_l1_rst_n_pa3 { 448 nvidia,pins = "pex_l1_rst_n_pa3"; 449 nvidia,function = "pe1"; 450 nvidia,pull = < 0x00 >; 451 nvidia,tristate = < 0x00 >; 452 nvidia,enable-input = < 0x00 >; 453 nvidia,open-drain = < 0x00 >; 454 nvidia,io-hv = < 0x01 >; 455 }; 456 457 pex_l1_clkreq_n_pa4 { 458 nvidia,pins = "pex_l1_clkreq_n_pa4"; 459 nvidia,function = "pe1"; 460 nvidia,pull = < 0x00 >; 461 nvidia,tristate = < 0x00 >; 462 nvidia,enable-input = < 0x01 >; 463 nvidia,open-drain = < 0x00 >; 464 nvidia,io-hv = < 0x01 >; 465 }; 466 467 sata_led_active_pa5 { 468 nvidia,pins = "sata_led_active_pa5"; 469 nvidia,pull = < 0x02 >; 470 nvidia,tristate = < 0x00 >; 471 nvidia,enable-input = < 0x01 >; 472 nvidia,open-drain = < 0x00 >; 473 }; 474 475 pa6 { 476 nvidia,pins = "pa6"; 477 nvidia,function = "sata"; 478 nvidia,pull = < 0x00 >; 479 nvidia,tristate = < 0x00 >; 480 nvidia,enable-input = < 0x00 >; 481 nvidia,open-drain = < 0x00 >; 482 }; 483 484 dap1_fs_pb0 { 485 nvidia,pins = "dap1_fs_pb0"; 486 nvidia,pull = < 0x01 >; 487 nvidia,tristate = < 0x00 >; 488 nvidia,enable-input = < 0x01 >; 489 nvidia,open-drain = < 0x00 >; 490 }; 491 492 dap1_din_pb1 { 493 nvidia,pins = "dap1_din_pb1"; 494 nvidia,pull = < 0x01 >; 495 nvidia,tristate = < 0x00 >; 496 nvidia,enable-input = < 0x01 >; 497 nvidia,open-drain = < 0x00 >; 498 }; 499 500 dap1_dout_pb2 { 501 nvidia,pins = "dap1_dout_pb2"; 502 nvidia,pull = < 0x01 >; 503 nvidia,tristate = < 0x00 >; 504 nvidia,enable-input = < 0x01 >; 505 nvidia,open-drain = < 0x00 >; 506 }; 507 508 dap1_sclk_pb3 { 509 nvidia,pins = "dap1_sclk_pb3"; 510 nvidia,pull = < 0x01 >; 511 nvidia,tristate = < 0x00 >; 512 nvidia,enable-input = < 0x01 >; 513 nvidia,open-drain = < 0x00 >; 514 }; 515 516 spi2_mosi_pb4 { 517 nvidia,pins = "spi2_mosi_pb4"; 518 nvidia,function = "spi2"; 519 nvidia,pull = < 0x00 >; 520 nvidia,tristate = < 0x00 >; 521 nvidia,enable-input = < 0x01 >; 522 nvidia,open-drain = < 0x00 >; 523 }; 524 525 spi2_miso_pb5 { 526 nvidia,pins = "spi2_miso_pb5"; 527 nvidia,function = "spi2"; 528 nvidia,pull = < 0x00 >; 529 nvidia,tristate = < 0x00 >; 530 nvidia,enable-input = < 0x01 >; 531 nvidia,open-drain = < 0x00 >; 532 }; 533 534 spi2_sck_pb6 { 535 nvidia,pins = "spi2_sck_pb6"; 536 nvidia,function = "spi2"; 537 nvidia,pull = < 0x00 >; 538 nvidia,tristate = < 0x00 >; 539 nvidia,enable-input = < 0x01 >; 540 nvidia,open-drain = < 0x00 >; 541 }; 542 543 spi2_cs0_pb7 { 544 nvidia,pins = "spi2_cs0_pb7"; 545 nvidia,function = "spi2"; 546 nvidia,pull = < 0x02 >; 547 nvidia,tristate = < 0x00 >; 548 nvidia,enable-input = < 0x01 >; 549 nvidia,open-drain = < 0x00 >; 550 }; 551 552 spi1_mosi_pc0 { 553 nvidia,pins = "spi1_mosi_pc0"; 554 nvidia,pull = < 0x01 >; 555 nvidia,tristate = < 0x00 >; 556 nvidia,enable-input = < 0x01 >; 557 nvidia,open-drain = < 0x00 >; 558 }; 559 560 spi1_miso_pc1 { 561 nvidia,pins = "spi1_miso_pc1"; 562 nvidia,pull = < 0x01 >; 563 nvidia,tristate = < 0x00 >; 564 nvidia,enable-input = < 0x01 >; 565 nvidia,open-drain = < 0x00 >; 566 }; 567 568 spi1_sck_pc2 { 569 nvidia,pins = "spi1_sck_pc2"; 570 nvidia,pull = < 0x01 >; 571 nvidia,tristate = < 0x00 >; 572 nvidia,enable-input = < 0x01 >; 573 nvidia,open-drain = < 0x00 >; 574 }; 575 576 spi1_cs0_pc3 { 577 nvidia,pins = "spi1_cs0_pc3"; 578 nvidia,pull = < 0x02 >; 579 nvidia,tristate = < 0x00 >; 580 nvidia,enable-input = < 0x01 >; 581 nvidia,open-drain = < 0x00 >; 582 }; 583 584 spi1_cs1_pc4 { 585 nvidia,pins = "spi1_cs1_pc4"; 586 nvidia,pull = < 0x02 >; 587 nvidia,tristate = < 0x00 >; 588 nvidia,enable-input = < 0x01 >; 589 nvidia,open-drain = < 0x00 >; 590 }; 591 592 spi4_sck_pc5 { 593 nvidia,pins = "spi4_sck_pc5"; 594 nvidia,function = "spi4"; 595 nvidia,pull = < 0x01 >; 596 nvidia,tristate = < 0x00 >; 597 nvidia,enable-input = < 0x01 >; 598 nvidia,open-drain = < 0x00 >; 599 }; 600 601 spi4_cs0_pc6 { 602 nvidia,pins = "spi4_cs0_pc6"; 603 nvidia,function = "spi4"; 604 nvidia,pull = < 0x02 >; 605 nvidia,tristate = < 0x00 >; 606 nvidia,enable-input = < 0x01 >; 607 nvidia,open-drain = < 0x00 >; 608 }; 609 610 spi4_mosi_pc7 { 611 nvidia,pins = "spi4_mosi_pc7"; 612 nvidia,function = "spi4"; 613 nvidia,pull = < 0x01 >; 614 nvidia,tristate = < 0x00 >; 615 nvidia,enable-input = < 0x01 >; 616 nvidia,open-drain = < 0x00 >; 617 }; 618 619 spi4_miso_pd0 { 620 nvidia,pins = "spi4_miso_pd0"; 621 nvidia,function = "spi4"; 622 nvidia,pull = < 0x01 >; 623 nvidia,tristate = < 0x00 >; 624 nvidia,enable-input = < 0x01 >; 625 nvidia,open-drain = < 0x00 >; 626 }; 627 628 uart3_tx_pd1 { 629 nvidia,pins = "uart3_tx_pd1"; 630 nvidia,function = "uartc"; 631 nvidia,pull = < 0x00 >; 632 nvidia,tristate = < 0x00 >; 633 nvidia,enable-input = < 0x00 >; 634 nvidia,open-drain = < 0x00 >; 635 }; 636 637 uart3_rx_pd2 { 638 nvidia,pins = "uart3_rx_pd2"; 639 nvidia,function = "uartc"; 640 nvidia,pull = < 0x02 >; 641 nvidia,tristate = < 0x00 >; 642 nvidia,enable-input = < 0x01 >; 643 nvidia,open-drain = < 0x00 >; 644 }; 645 646 uart3_rts_pd3 { 647 nvidia,pins = "uart3_rts_pd3"; 648 nvidia,function = "uartc"; 649 nvidia,pull = < 0x00 >; 650 nvidia,tristate = < 0x00 >; 651 nvidia,enable-input = < 0x00 >; 652 nvidia,open-drain = < 0x00 >; 653 }; 654 655 uart3_cts_pd4 { 656 nvidia,pins = "uart3_cts_pd4"; 657 nvidia,function = "uartc"; 658 nvidia,pull = < 0x02 >; 659 nvidia,tristate = < 0x00 >; 660 nvidia,enable-input = < 0x01 >; 661 nvidia,open-drain = < 0x00 >; 662 }; 663 664 dmic1_clk_pe0 { 665 nvidia,pins = "dmic1_clk_pe0"; 666 nvidia,function = "i2s3"; 667 nvidia,pull = < 0x00 >; 668 nvidia,tristate = < 0x00 >; 669 nvidia,enable-input = < 0x01 >; 670 nvidia,open-drain = < 0x00 >; 671 }; 672 673 dmic1_dat_pe1 { 674 nvidia,pins = "dmic1_dat_pe1"; 675 nvidia,function = "i2s3"; 676 nvidia,pull = < 0x00 >; 677 nvidia,tristate = < 0x00 >; 678 nvidia,enable-input = < 0x01 >; 679 nvidia,open-drain = < 0x00 >; 680 }; 681 682 dmic2_clk_pe2 { 683 nvidia,pins = "dmic2_clk_pe2"; 684 nvidia,function = "i2s3"; 685 nvidia,pull = < 0x00 >; 686 nvidia,tristate = < 0x00 >; 687 nvidia,enable-input = < 0x01 >; 688 nvidia,open-drain = < 0x00 >; 689 }; 690 691 dmic2_dat_pe3 { 692 nvidia,pins = "dmic2_dat_pe3"; 693 nvidia,function = "i2s3"; 694 nvidia,pull = < 0x00 >; 695 nvidia,tristate = < 0x00 >; 696 nvidia,enable-input = < 0x01 >; 697 nvidia,open-drain = < 0x00 >; 698 }; 699 700 dmic3_clk_pe4 { 701 nvidia,pins = "dmic3_clk_pe4"; 702 nvidia,pull = < 0x01 >; 703 nvidia,tristate = < 0x00 >; 704 nvidia,enable-input = < 0x01 >; 705 nvidia,open-drain = < 0x00 >; 706 }; 707 708 dmic3_dat_pe5 { 709 nvidia,pins = "dmic3_dat_pe5"; 710 nvidia,pull = < 0x01 >; 711 nvidia,tristate = < 0x00 >; 712 nvidia,enable-input = < 0x01 >; 713 nvidia,open-drain = < 0x00 >; 714 }; 715 716 pe6 { 717 nvidia,pins = "pe6"; 718 nvidia,pull = < 0x01 >; 719 nvidia,tristate = < 0x00 >; 720 nvidia,enable-input = < 0x01 >; 721 nvidia,open-drain = < 0x00 >; 722 }; 723 724 pe7 { 725 nvidia,pins = "pe7"; 726 nvidia,function = "pwm3"; 727 nvidia,pull = < 0x00 >; 728 nvidia,tristate = < 0x00 >; 729 nvidia,enable-input = < 0x00 >; 730 nvidia,open-drain = < 0x00 >; 731 }; 732 733 gen3_i2c_scl_pf0 { 734 nvidia,pins = "gen3_i2c_scl_pf0"; 735 nvidia,function = "i2c3"; 736 nvidia,pull = < 0x00 >; 737 nvidia,tristate = < 0x00 >; 738 nvidia,enable-input = < 0x01 >; 739 nvidia,open-drain = < 0x00 >; 740 nvidia,io-hv = < 0x00 >; 741 }; 742 743 gen3_i2c_sda_pf1 { 744 nvidia,pins = "gen3_i2c_sda_pf1"; 745 nvidia,function = "i2c3"; 746 nvidia,pull = < 0x00 >; 747 nvidia,tristate = < 0x00 >; 748 nvidia,enable-input = < 0x01 >; 749 nvidia,open-drain = < 0x00 >; 750 nvidia,io-hv = < 0x00 >; 751 }; 752 753 uart2_tx_pg0 { 754 nvidia,pins = "uart2_tx_pg0"; 755 nvidia,function = "uartb"; 756 nvidia,pull = < 0x00 >; 757 nvidia,tristate = < 0x00 >; 758 nvidia,enable-input = < 0x00 >; 759 nvidia,open-drain = < 0x00 >; 760 }; 761 762 uart2_rx_pg1 { 763 nvidia,pins = "uart2_rx_pg1"; 764 nvidia,function = "uartb"; 765 nvidia,pull = < 0x02 >; 766 nvidia,tristate = < 0x00 >; 767 nvidia,enable-input = < 0x01 >; 768 nvidia,open-drain = < 0x00 >; 769 }; 770 771 uart2_rts_pg2 { 772 nvidia,pins = "uart2_rts_pg2"; 773 nvidia,function = "uartb"; 774 nvidia,pull = < 0x00 >; 775 nvidia,tristate = < 0x00 >; 776 nvidia,enable-input = < 0x00 >; 777 nvidia,open-drain = < 0x00 >; 778 }; 779 780 uart2_cts_pg3 { 781 nvidia,pins = "uart2_cts_pg3"; 782 nvidia,function = "uartb"; 783 nvidia,pull = < 0x02 >; 784 nvidia,tristate = < 0x00 >; 785 nvidia,enable-input = < 0x01 >; 786 nvidia,open-drain = < 0x00 >; 787 }; 788 789 wifi_en_ph0 { 790 nvidia,pins = "wifi_en_ph0"; 791 nvidia,pull = < 0x00 >; 792 nvidia,tristate = < 0x00 >; 793 nvidia,enable-input = < 0x00 >; 794 nvidia,open-drain = < 0x00 >; 795 }; 796 797 wifi_rst_ph1 { 798 nvidia,pins = "wifi_rst_ph1"; 799 nvidia,pull = < 0x00 >; 800 nvidia,tristate = < 0x00 >; 801 nvidia,enable-input = < 0x00 >; 802 nvidia,open-drain = < 0x00 >; 803 }; 804 805 wifi_wake_ap_ph2 { 806 nvidia,pins = "wifi_wake_ap_ph2"; 807 nvidia,pull = < 0x02 >; 808 nvidia,tristate = < 0x00 >; 809 nvidia,enable-input = < 0x01 >; 810 nvidia,open-drain = < 0x00 >; 811 }; 812 813 ap_wake_bt_ph3 { 814 nvidia,pins = "ap_wake_bt_ph3"; 815 nvidia,pull = < 0x00 >; 816 nvidia,tristate = < 0x00 >; 817 nvidia,enable-input = < 0x00 >; 818 nvidia,open-drain = < 0x00 >; 819 }; 820 821 bt_rst_ph4 { 822 nvidia,pins = "bt_rst_ph4"; 823 nvidia,pull = < 0x00 >; 824 nvidia,tristate = < 0x00 >; 825 nvidia,enable-input = < 0x00 >; 826 nvidia,open-drain = < 0x00 >; 827 }; 828 829 bt_wake_ap_ph5 { 830 nvidia,pins = "bt_wake_ap_ph5"; 831 nvidia,pull = < 0x02 >; 832 nvidia,tristate = < 0x00 >; 833 nvidia,enable-input = < 0x01 >; 834 nvidia,open-drain = < 0x00 >; 835 }; 836 837 ph6 { 838 nvidia,pins = "ph6"; 839 nvidia,pull = < 0x02 >; 840 nvidia,tristate = < 0x00 >; 841 nvidia,enable-input = < 0x01 >; 842 nvidia,open-drain = < 0x00 >; 843 }; 844 845 ap_wake_nfc_ph7 { 846 nvidia,pins = "ap_wake_nfc_ph7"; 847 nvidia,pull = < 0x01 >; 848 nvidia,tristate = < 0x00 >; 849 nvidia,enable-input = < 0x01 >; 850 nvidia,open-drain = < 0x00 >; 851 }; 852 853 nfc_en_pi0 { 854 nvidia,pins = "nfc_en_pi0"; 855 nvidia,pull = < 0x00 >; 856 nvidia,tristate = < 0x00 >; 857 nvidia,enable-input = < 0x00 >; 858 nvidia,open-drain = < 0x00 >; 859 }; 860 861 nfc_int_pi1 { 862 nvidia,pins = "nfc_int_pi1"; 863 nvidia,pull = < 0x02 >; 864 nvidia,tristate = < 0x00 >; 865 nvidia,enable-input = < 0x01 >; 866 nvidia,open-drain = < 0x00 >; 867 }; 868 869 gps_en_pi2 { 870 nvidia,pins = "gps_en_pi2"; 871 nvidia,pull = < 0x00 >; 872 nvidia,tristate = < 0x00 >; 873 nvidia,enable-input = < 0x00 >; 874 nvidia,open-drain = < 0x00 >; 875 }; 876 877 gps_rst_pi3 { 878 nvidia,pins = "gps_rst_pi3"; 879 nvidia,function = "rsvd0"; 880 nvidia,pull = < 0x01 >; 881 nvidia,tristate = < 0x01 >; 882 nvidia,enable-input = < 0x00 >; 883 nvidia,open-drain = < 0x00 >; 884 }; 885 886 uart4_tx_pi4 { 887 nvidia,pins = "uart4_tx_pi4"; 888 nvidia,function = "uartd"; 889 nvidia,pull = < 0x00 >; 890 nvidia,tristate = < 0x00 >; 891 nvidia,enable-input = < 0x00 >; 892 nvidia,open-drain = < 0x00 >; 893 }; 894 895 uart4_rx_pi5 { 896 nvidia,pins = "uart4_rx_pi5"; 897 nvidia,function = "uartd"; 898 nvidia,pull = < 0x00 >; 899 nvidia,tristate = < 0x00 >; 900 nvidia,enable-input = < 0x01 >; 901 nvidia,open-drain = < 0x00 >; 902 }; 903 904 uart4_rts_pi6 { 905 nvidia,pins = "uart4_rts_pi6"; 906 nvidia,function = "uartd"; 907 nvidia,pull = < 0x00 >; 908 nvidia,tristate = < 0x00 >; 909 nvidia,enable-input = < 0x00 >; 910 nvidia,open-drain = < 0x00 >; 911 }; 912 913 uart4_cts_pi7 { 914 nvidia,pins = "uart4_cts_pi7"; 915 nvidia,function = "uartd"; 916 nvidia,pull = < 0x00 >; 917 nvidia,tristate = < 0x00 >; 918 nvidia,enable-input = < 0x01 >; 919 nvidia,open-drain = < 0x00 >; 920 }; 921 922 gen1_i2c_sda_pj0 { 923 nvidia,pins = "gen1_i2c_sda_pj0"; 924 nvidia,function = "i2c1"; 925 nvidia,pull = < 0x00 >; 926 nvidia,tristate = < 0x00 >; 927 nvidia,enable-input = < 0x01 >; 928 nvidia,open-drain = < 0x00 >; 929 nvidia,io-hv = < 0x00 >; 930 }; 931 932 gen1_i2c_scl_pj1 { 933 nvidia,pins = "gen1_i2c_scl_pj1"; 934 nvidia,function = "i2c1"; 935 nvidia,pull = < 0x00 >; 936 nvidia,tristate = < 0x00 >; 937 nvidia,enable-input = < 0x01 >; 938 nvidia,open-drain = < 0x00 >; 939 nvidia,io-hv = < 0x00 >; 940 }; 941 942 gen2_i2c_scl_pj2 { 943 nvidia,pins = "gen2_i2c_scl_pj2"; 944 nvidia,function = "i2c2"; 945 nvidia,pull = < 0x00 >; 946 nvidia,tristate = < 0x00 >; 947 nvidia,enable-input = < 0x01 >; 948 nvidia,open-drain = < 0x00 >; 949 nvidia,io-hv = < 0x01 >; 950 }; 951 952 gen2_i2c_sda_pj3 { 953 nvidia,pins = "gen2_i2c_sda_pj3"; 954 nvidia,function = "i2c2"; 955 nvidia,pull = < 0x00 >; 956 nvidia,tristate = < 0x00 >; 957 nvidia,enable-input = < 0x01 >; 958 nvidia,open-drain = < 0x00 >; 959 nvidia,io-hv = < 0x01 >; 960 }; 961 962 dap4_fs_pj4 { 963 nvidia,pins = "dap4_fs_pj4"; 964 nvidia,function = "i2s4b"; 965 nvidia,pull = < 0x00 >; 966 nvidia,tristate = < 0x00 >; 967 nvidia,enable-input = < 0x01 >; 968 nvidia,open-drain = < 0x00 >; 969 }; 970 971 dap4_din_pj5 { 972 nvidia,pins = "dap4_din_pj5"; 973 nvidia,function = "i2s4b"; 974 nvidia,pull = < 0x00 >; 975 nvidia,tristate = < 0x00 >; 976 nvidia,enable-input = < 0x01 >; 977 nvidia,open-drain = < 0x00 >; 978 }; 979 980 dap4_dout_pj6 { 981 nvidia,pins = "dap4_dout_pj6"; 982 nvidia,function = "i2s4b"; 983 nvidia,pull = < 0x00 >; 984 nvidia,tristate = < 0x00 >; 985 nvidia,enable-input = < 0x01 >; 986 nvidia,open-drain = < 0x00 >; 987 }; 988 989 dap4_sclk_pj7 { 990 nvidia,pins = "dap4_sclk_pj7"; 991 nvidia,function = "i2s4b"; 992 nvidia,pull = < 0x00 >; 993 nvidia,tristate = < 0x00 >; 994 nvidia,enable-input = < 0x01 >; 995 nvidia,open-drain = < 0x00 >; 996 }; 997 998 pk0 { 999 nvidia,pins = "pk0"; 1000 nvidia,function = "i2s5b"; 1001 nvidia,pull = < 0x00 >; 1002 nvidia,tristate = < 0x00 >; 1003 nvidia,enable-input = < 0x01 >; 1004 nvidia,open-drain = < 0x00 >; 1005 }; 1006 1007 pk1 { 1008 nvidia,pins = "pk1"; 1009 nvidia,function = "i2s5b"; 1010 nvidia,pull = < 0x00 >; 1011 nvidia,tristate = < 0x00 >; 1012 nvidia,enable-input = < 0x01 >; 1013 nvidia,open-drain = < 0x00 >; 1014 }; 1015 1016 pk2 { 1017 nvidia,pins = "pk2"; 1018 nvidia,function = "i2s5b"; 1019 nvidia,pull = < 0x00 >; 1020 nvidia,tristate = < 0x00 >; 1021 nvidia,enable-input = < 0x01 >; 1022 nvidia,open-drain = < 0x00 >; 1023 }; 1024 1025 pk3 { 1026 nvidia,pins = "pk3"; 1027 nvidia,function = "i2s5b"; 1028 nvidia,pull = < 0x00 >; 1029 nvidia,tristate = < 0x00 >; 1030 nvidia,enable-input = < 0x01 >; 1031 nvidia,open-drain = < 0x00 >; 1032 }; 1033 1034 pk4 { 1035 nvidia,pins = "pk4"; 1036 nvidia,pull = < 0x02 >; 1037 nvidia,tristate = < 0x00 >; 1038 nvidia,enable-input = < 0x01 >; 1039 nvidia,open-drain = < 0x00 >; 1040 }; 1041 1042 pk5 { 1043 nvidia,pins = "pk5"; 1044 nvidia,pull = < 0x00 >; 1045 nvidia,tristate = < 0x00 >; 1046 nvidia,enable-input = < 0x00 >; 1047 nvidia,open-drain = < 0x00 >; 1048 }; 1049 1050 pk6 { 1051 nvidia,pins = "pk6"; 1052 nvidia,pull = < 0x02 >; 1053 nvidia,tristate = < 0x00 >; 1054 nvidia,enable-input = < 0x01 >; 1055 nvidia,open-drain = < 0x00 >; 1056 }; 1057 1058 pk7 { 1059 nvidia,pins = "pk7"; 1060 nvidia,pull = < 0x02 >; 1061 nvidia,tristate = < 0x00 >; 1062 nvidia,enable-input = < 0x01 >; 1063 nvidia,open-drain = < 0x00 >; 1064 }; 1065 1066 pl0 { 1067 nvidia,pins = "pl0"; 1068 nvidia,function = "rsvd0"; 1069 nvidia,pull = < 0x01 >; 1070 nvidia,tristate = < 0x01 >; 1071 nvidia,enable-input = < 0x00 >; 1072 nvidia,open-drain = < 0x00 >; 1073 }; 1074 1075 pl1 { 1076 nvidia,pins = "pl1"; 1077 nvidia,pull = < 0x02 >; 1078 nvidia,tristate = < 0x00 >; 1079 nvidia,enable-input = < 0x01 >; 1080 nvidia,open-drain = < 0x00 >; 1081 }; 1082 1083 sdmmc1_clk_pm0 { 1084 nvidia,pins = "sdmmc1_clk_pm0"; 1085 nvidia,function = "sdmmc1"; 1086 nvidia,pull = < 0x00 >; 1087 nvidia,tristate = < 0x00 >; 1088 nvidia,enable-input = < 0x01 >; 1089 nvidia,open-drain = < 0x00 >; 1090 }; 1091 1092 sdmmc1_cmd_pm1 { 1093 nvidia,pins = "sdmmc1_cmd_pm1"; 1094 nvidia,function = "sdmmc1"; 1095 nvidia,pull = < 0x02 >; 1096 nvidia,tristate = < 0x00 >; 1097 nvidia,enable-input = < 0x01 >; 1098 nvidia,open-drain = < 0x00 >; 1099 }; 1100 1101 sdmmc1_dat3_pm2 { 1102 nvidia,pins = "sdmmc1_dat3_pm2"; 1103 nvidia,function = "sdmmc1"; 1104 nvidia,pull = < 0x02 >; 1105 nvidia,tristate = < 0x00 >; 1106 nvidia,enable-input = < 0x01 >; 1107 nvidia,open-drain = < 0x00 >; 1108 }; 1109 1110 sdmmc1_dat2_pm3 { 1111 nvidia,pins = "sdmmc1_dat2_pm3"; 1112 nvidia,function = "sdmmc1"; 1113 nvidia,pull = < 0x02 >; 1114 nvidia,tristate = < 0x00 >; 1115 nvidia,enable-input = < 0x01 >; 1116 nvidia,open-drain = < 0x00 >; 1117 }; 1118 1119 sdmmc1_dat1_pm4 { 1120 nvidia,pins = "sdmmc1_dat1_pm4"; 1121 nvidia,function = "sdmmc1"; 1122 nvidia,pull = < 0x02 >; 1123 nvidia,tristate = < 0x00 >; 1124 nvidia,enable-input = < 0x01 >; 1125 nvidia,open-drain = < 0x00 >; 1126 }; 1127 1128 sdmmc1_dat0_pm5 { 1129 nvidia,pins = "sdmmc1_dat0_pm5"; 1130 nvidia,function = "sdmmc1"; 1131 nvidia,pull = < 0x02 >; 1132 nvidia,tristate = < 0x00 >; 1133 nvidia,enable-input = < 0x01 >; 1134 nvidia,open-drain = < 0x00 >; 1135 }; 1136 1137 sdmmc3_clk_pp0 { 1138 nvidia,pins = "sdmmc3_clk_pp0"; 1139 nvidia,function = "sdmmc3"; 1140 nvidia,pull = < 0x00 >; 1141 nvidia,tristate = < 0x00 >; 1142 nvidia,enable-input = < 0x01 >; 1143 nvidia,open-drain = < 0x00 >; 1144 }; 1145 1146 sdmmc3_cmd_pp1 { 1147 nvidia,pins = "sdmmc3_cmd_pp1"; 1148 nvidia,function = "sdmmc3"; 1149 nvidia,pull = < 0x02 >; 1150 nvidia,tristate = < 0x00 >; 1151 nvidia,enable-input = < 0x01 >; 1152 nvidia,open-drain = < 0x00 >; 1153 }; 1154 1155 sdmmc3_dat3_pp2 { 1156 nvidia,pins = "sdmmc3_dat3_pp2"; 1157 nvidia,function = "sdmmc3"; 1158 nvidia,pull = < 0x02 >; 1159 nvidia,tristate = < 0x00 >; 1160 nvidia,enable-input = < 0x01 >; 1161 nvidia,open-drain = < 0x00 >; 1162 }; 1163 1164 sdmmc3_dat2_pp3 { 1165 nvidia,pins = "sdmmc3_dat2_pp3"; 1166 nvidia,function = "sdmmc3"; 1167 nvidia,pull = < 0x02 >; 1168 nvidia,tristate = < 0x00 >; 1169 nvidia,enable-input = < 0x01 >; 1170 nvidia,open-drain = < 0x00 >; 1171 }; 1172 1173 sdmmc3_dat1_pp4 { 1174 nvidia,pins = "sdmmc3_dat1_pp4"; 1175 nvidia,function = "sdmmc3"; 1176 nvidia,pull = < 0x02 >; 1177 nvidia,tristate = < 0x00 >; 1178 nvidia,enable-input = < 0x01 >; 1179 nvidia,open-drain = < 0x00 >; 1180 }; 1181 1182 sdmmc3_dat0_pp5 { 1183 nvidia,pins = "sdmmc3_dat0_pp5"; 1184 nvidia,function = "sdmmc3"; 1185 nvidia,pull = < 0x02 >; 1186 nvidia,tristate = < 0x00 >; 1187 nvidia,enable-input = < 0x01 >; 1188 nvidia,open-drain = < 0x00 >; 1189 }; 1190 1191 cam1_mclk_ps0 { 1192 nvidia,pins = "cam1_mclk_ps0"; 1193 nvidia,function = "extperiph3"; 1194 nvidia,pull = < 0x00 >; 1195 nvidia,tristate = < 0x00 >; 1196 nvidia,enable-input = < 0x00 >; 1197 nvidia,open-drain = < 0x00 >; 1198 }; 1199 1200 cam2_mclk_ps1 { 1201 nvidia,pins = "cam2_mclk_ps1"; 1202 nvidia,function = "extperiph3"; 1203 nvidia,pull = < 0x00 >; 1204 nvidia,tristate = < 0x00 >; 1205 nvidia,enable-input = < 0x00 >; 1206 nvidia,open-drain = < 0x00 >; 1207 }; 1208 1209 cam_i2c_scl_ps2 { 1210 nvidia,pins = "cam_i2c_scl_ps2"; 1211 nvidia,function = "i2cvi"; 1212 nvidia,pull = < 0x00 >; 1213 nvidia,tristate = < 0x00 >; 1214 nvidia,enable-input = < 0x01 >; 1215 nvidia,open-drain = < 0x00 >; 1216 nvidia,io-hv = < 0x00 >; 1217 }; 1218 1219 cam_i2c_sda_ps3 { 1220 nvidia,pins = "cam_i2c_sda_ps3"; 1221 nvidia,function = "i2cvi"; 1222 nvidia,pull = < 0x00 >; 1223 nvidia,tristate = < 0x00 >; 1224 nvidia,enable-input = < 0x01 >; 1225 nvidia,open-drain = < 0x00 >; 1226 nvidia,io-hv = < 0x00 >; 1227 }; 1228 1229 cam_rst_ps4 { 1230 nvidia,pins = "cam_rst_ps4"; 1231 nvidia,pull = < 0x00 >; 1232 nvidia,tristate = < 0x00 >; 1233 nvidia,enable-input = < 0x00 >; 1234 nvidia,open-drain = < 0x00 >; 1235 }; 1236 1237 cam_af_en_ps5 { 1238 nvidia,pins = "cam_af_en_ps5"; 1239 nvidia,pull = < 0x00 >; 1240 nvidia,tristate = < 0x00 >; 1241 nvidia,enable-input = < 0x00 >; 1242 nvidia,open-drain = < 0x00 >; 1243 }; 1244 1245 cam_flash_en_ps6 { 1246 nvidia,pins = "cam_flash_en_ps6"; 1247 nvidia,pull = < 0x00 >; 1248 nvidia,tristate = < 0x00 >; 1249 nvidia,enable-input = < 0x00 >; 1250 nvidia,open-drain = < 0x00 >; 1251 }; 1252 1253 cam1_pwdn_ps7 { 1254 nvidia,pins = "cam1_pwdn_ps7"; 1255 nvidia,pull = < 0x00 >; 1256 nvidia,tristate = < 0x00 >; 1257 nvidia,enable-input = < 0x00 >; 1258 nvidia,open-drain = < 0x00 >; 1259 }; 1260 1261 cam2_pwdn_pt0 { 1262 nvidia,pins = "cam2_pwdn_pt0"; 1263 nvidia,pull = < 0x00 >; 1264 nvidia,tristate = < 0x00 >; 1265 nvidia,enable-input = < 0x00 >; 1266 nvidia,open-drain = < 0x00 >; 1267 }; 1268 1269 cam1_strobe_pt1 { 1270 nvidia,pins = "cam1_strobe_pt1"; 1271 nvidia,pull = < 0x00 >; 1272 nvidia,tristate = < 0x00 >; 1273 nvidia,enable-input = < 0x00 >; 1274 nvidia,open-drain = < 0x00 >; 1275 }; 1276 1277 uart1_tx_pu0 { 1278 nvidia,pins = "uart1_tx_pu0"; 1279 nvidia,function = "uarta"; 1280 nvidia,pull = < 0x00 >; 1281 nvidia,tristate = < 0x00 >; 1282 nvidia,enable-input = < 0x00 >; 1283 nvidia,open-drain = < 0x00 >; 1284 }; 1285 1286 uart1_rx_pu1 { 1287 nvidia,pins = "uart1_rx_pu1"; 1288 nvidia,function = "uarta"; 1289 nvidia,pull = < 0x02 >; 1290 nvidia,tristate = < 0x00 >; 1291 nvidia,enable-input = < 0x01 >; 1292 nvidia,open-drain = < 0x00 >; 1293 }; 1294 1295 uart1_rts_pu2 { 1296 nvidia,pins = "uart1_rts_pu2"; 1297 nvidia,pull = < 0x01 >; 1298 nvidia,tristate = < 0x00 >; 1299 nvidia,enable-input = < 0x01 >; 1300 nvidia,open-drain = < 0x00 >; 1301 }; 1302 1303 uart1_cts_pu3 { 1304 nvidia,pins = "uart1_cts_pu3"; 1305 nvidia,pull = < 0x01 >; 1306 nvidia,tristate = < 0x00 >; 1307 nvidia,enable-input = < 0x01 >; 1308 nvidia,open-drain = < 0x00 >; 1309 }; 1310 1311 lcd_bl_pwm_pv0 { 1312 nvidia,pins = "lcd_bl_pwm_pv0"; 1313 nvidia,function = "pwm0"; 1314 nvidia,pull = < 0x00 >; 1315 nvidia,tristate = < 0x00 >; 1316 nvidia,enable-input = < 0x00 >; 1317 nvidia,open-drain = < 0x00 >; 1318 }; 1319 1320 lcd_bl_en_pv1 { 1321 nvidia,pins = "lcd_bl_en_pv1"; 1322 nvidia,pull = < 0x00 >; 1323 nvidia,tristate = < 0x00 >; 1324 nvidia,enable-input = < 0x00 >; 1325 nvidia,open-drain = < 0x00 >; 1326 }; 1327 1328 lcd_rst_pv2 { 1329 nvidia,pins = "lcd_rst_pv2"; 1330 nvidia,pull = < 0x00 >; 1331 nvidia,tristate = < 0x00 >; 1332 nvidia,enable-input = < 0x00 >; 1333 nvidia,open-drain = < 0x00 >; 1334 }; 1335 1336 lcd_gpio1_pv3 { 1337 nvidia,pins = "lcd_gpio1_pv3"; 1338 nvidia,pull = < 0x00 >; 1339 nvidia,tristate = < 0x00 >; 1340 nvidia,enable-input = < 0x01 >; 1341 nvidia,open-drain = < 0x00 >; 1342 }; 1343 1344 lcd_gpio2_pv4 { 1345 nvidia,pins = "lcd_gpio2_pv4"; 1346 nvidia,function = "pwm1"; 1347 nvidia,pull = < 0x00 >; 1348 nvidia,tristate = < 0x00 >; 1349 nvidia,enable-input = < 0x00 >; 1350 nvidia,open-drain = < 0x00 >; 1351 }; 1352 1353 ap_ready_pv5 { 1354 nvidia,pins = "ap_ready_pv5"; 1355 nvidia,pull = < 0x00 >; 1356 nvidia,tristate = < 0x00 >; 1357 nvidia,enable-input = < 0x00 >; 1358 nvidia,open-drain = < 0x00 >; 1359 }; 1360 1361 touch_rst_pv6 { 1362 nvidia,pins = "touch_rst_pv6"; 1363 nvidia,pull = < 0x00 >; 1364 nvidia,tristate = < 0x00 >; 1365 nvidia,enable-input = < 0x00 >; 1366 nvidia,open-drain = < 0x00 >; 1367 }; 1368 1369 touch_clk_pv7 { 1370 nvidia,pins = "touch_clk_pv7"; 1371 nvidia,function = "touch"; 1372 nvidia,pull = < 0x00 >; 1373 nvidia,tristate = < 0x00 >; 1374 nvidia,enable-input = < 0x00 >; 1375 nvidia,open-drain = < 0x00 >; 1376 }; 1377 1378 modem_wake_ap_px0 { 1379 nvidia,pins = "modem_wake_ap_px0"; 1380 nvidia,pull = < 0x01 >; 1381 nvidia,tristate = < 0x00 >; 1382 nvidia,enable-input = < 0x01 >; 1383 nvidia,open-drain = < 0x00 >; 1384 }; 1385 1386 touch_int_px1 { 1387 nvidia,pins = "touch_int_px1"; 1388 nvidia,pull = < 0x02 >; 1389 nvidia,tristate = < 0x00 >; 1390 nvidia,enable-input = < 0x01 >; 1391 nvidia,open-drain = < 0x00 >; 1392 }; 1393 1394 motion_int_px2 { 1395 nvidia,pins = "motion_int_px2"; 1396 nvidia,pull = < 0x02 >; 1397 nvidia,tristate = < 0x00 >; 1398 nvidia,enable-input = < 0x01 >; 1399 nvidia,open-drain = < 0x00 >; 1400 }; 1401 1402 als_prox_int_px3 { 1403 nvidia,pins = "als_prox_int_px3"; 1404 nvidia,pull = < 0x01 >; 1405 nvidia,tristate = < 0x00 >; 1406 nvidia,enable-input = < 0x01 >; 1407 nvidia,open-drain = < 0x00 >; 1408 }; 1409 1410 temp_alert_px4 { 1411 nvidia,pins = "temp_alert_px4"; 1412 nvidia,pull = < 0x02 >; 1413 nvidia,tristate = < 0x00 >; 1414 nvidia,enable-input = < 0x01 >; 1415 nvidia,open-drain = < 0x00 >; 1416 }; 1417 1418 button_power_on_px5 { 1419 nvidia,pins = "button_power_on_px5"; 1420 nvidia,pull = < 0x02 >; 1421 nvidia,tristate = < 0x00 >; 1422 nvidia,enable-input = < 0x01 >; 1423 nvidia,open-drain = < 0x00 >; 1424 }; 1425 1426 button_vol_up_px6 { 1427 nvidia,pins = "button_vol_up_px6"; 1428 nvidia,pull = < 0x02 >; 1429 nvidia,tristate = < 0x00 >; 1430 nvidia,enable-input = < 0x01 >; 1431 nvidia,open-drain = < 0x00 >; 1432 }; 1433 1434 button_vol_down_px7 { 1435 nvidia,pins = "button_vol_down_px7"; 1436 nvidia,pull = < 0x02 >; 1437 nvidia,tristate = < 0x00 >; 1438 nvidia,enable-input = < 0x01 >; 1439 nvidia,open-drain = < 0x00 >; 1440 }; 1441 1442 button_slide_sw_py0 { 1443 nvidia,pins = "button_slide_sw_py0"; 1444 nvidia,pull = < 0x02 >; 1445 nvidia,tristate = < 0x00 >; 1446 nvidia,enable-input = < 0x01 >; 1447 nvidia,open-drain = < 0x00 >; 1448 }; 1449 1450 button_home_py1 { 1451 nvidia,pins = "button_home_py1"; 1452 nvidia,pull = < 0x02 >; 1453 nvidia,tristate = < 0x00 >; 1454 nvidia,enable-input = < 0x01 >; 1455 nvidia,open-drain = < 0x00 >; 1456 }; 1457 1458 lcd_te_py2 { 1459 nvidia,pins = "lcd_te_py2"; 1460 nvidia,function = "displaya"; 1461 nvidia,pull = < 0x01 >; 1462 nvidia,tristate = < 0x00 >; 1463 nvidia,enable-input = < 0x01 >; 1464 nvidia,open-drain = < 0x00 >; 1465 }; 1466 1467 pwr_i2c_scl_py3 { 1468 nvidia,pins = "pwr_i2c_scl_py3"; 1469 nvidia,function = "i2cpmu"; 1470 nvidia,pull = < 0x00 >; 1471 nvidia,tristate = < 0x00 >; 1472 nvidia,enable-input = < 0x01 >; 1473 nvidia,open-drain = < 0x00 >; 1474 nvidia,io-hv = < 0x00 >; 1475 }; 1476 1477 pwr_i2c_sda_py4 { 1478 nvidia,pins = "pwr_i2c_sda_py4"; 1479 nvidia,function = "i2cpmu"; 1480 nvidia,pull = < 0x00 >; 1481 nvidia,tristate = < 0x00 >; 1482 nvidia,enable-input = < 0x01 >; 1483 nvidia,open-drain = < 0x00 >; 1484 nvidia,io-hv = < 0x00 >; 1485 }; 1486 1487 clk_32k_out_py5 { 1488 nvidia,pins = "clk_32k_out_py5"; 1489 nvidia,function = "soc"; 1490 nvidia,pull = < 0x02 >; 1491 nvidia,tristate = < 0x00 >; 1492 nvidia,enable-input = < 0x01 >; 1493 nvidia,open-drain = < 0x00 >; 1494 }; 1495 1496 pz0 { 1497 nvidia,pins = "pz0"; 1498 nvidia,pull = < 0x02 >; 1499 nvidia,tristate = < 0x00 >; 1500 nvidia,enable-input = < 0x01 >; 1501 nvidia,open-drain = < 0x00 >; 1502 }; 1503 1504 pz1 { 1505 nvidia,pins = "pz1"; 1506 nvidia,function = "sdmmc1"; 1507 nvidia,pull = < 0x02 >; 1508 nvidia,tristate = < 0x00 >; 1509 nvidia,enable-input = < 0x01 >; 1510 nvidia,open-drain = < 0x00 >; 1511 }; 1512 1513 pz2 { 1514 nvidia,pins = "pz2"; 1515 nvidia,pull = < 0x02 >; 1516 nvidia,tristate = < 0x00 >; 1517 nvidia,enable-input = < 0x01 >; 1518 nvidia,open-drain = < 0x00 >; 1519 }; 1520 1521 pz3 { 1522 nvidia,pins = "pz3"; 1523 nvidia,pull = < 0x00 >; 1524 nvidia,tristate = < 0x00 >; 1525 nvidia,enable-input = < 0x00 >; 1526 nvidia,open-drain = < 0x00 >; 1527 }; 1528 1529 pz4 { 1530 nvidia,pins = "pz4"; 1531 nvidia,function = "sdmmc1"; 1532 nvidia,pull = < 0x02 >; 1533 nvidia,tristate = < 0x00 >; 1534 nvidia,enable-input = < 0x01 >; 1535 nvidia,open-drain = < 0x00 >; 1536 }; 1537 1538 pz5 { 1539 nvidia,pins = "pz5"; 1540 nvidia,function = "soc"; 1541 nvidia,pull = < 0x02 >; 1542 nvidia,tristate = < 0x00 >; 1543 nvidia,enable-input = < 0x01 >; 1544 nvidia,open-drain = < 0x00 >; 1545 }; 1546 1547 dap2_fs_paa0 { 1548 nvidia,pins = "dap2_fs_paa0"; 1549 nvidia,function = "i2s2"; 1550 nvidia,pull = < 0x00 >; 1551 nvidia,tristate = < 0x00 >; 1552 nvidia,enable-input = < 0x01 >; 1553 nvidia,open-drain = < 0x00 >; 1554 }; 1555 1556 dap2_sclk_paa1 { 1557 nvidia,pins = "dap2_sclk_paa1"; 1558 nvidia,function = "i2s2"; 1559 nvidia,pull = < 0x00 >; 1560 nvidia,tristate = < 0x00 >; 1561 nvidia,enable-input = < 0x01 >; 1562 nvidia,open-drain = < 0x00 >; 1563 }; 1564 1565 dap2_din_paa2 { 1566 nvidia,pins = "dap2_din_paa2"; 1567 nvidia,function = "i2s2"; 1568 nvidia,pull = < 0x00 >; 1569 nvidia,tristate = < 0x00 >; 1570 nvidia,enable-input = < 0x01 >; 1571 nvidia,open-drain = < 0x00 >; 1572 }; 1573 1574 dap2_dout_paa3 { 1575 nvidia,pins = "dap2_dout_paa3"; 1576 nvidia,function = "i2s2"; 1577 nvidia,pull = < 0x00 >; 1578 nvidia,tristate = < 0x00 >; 1579 nvidia,enable-input = < 0x01 >; 1580 nvidia,open-drain = < 0x00 >; 1581 }; 1582 1583 aud_mclk_pbb0 { 1584 nvidia,pins = "aud_mclk_pbb0"; 1585 nvidia,pull = < 0x02 >; 1586 nvidia,tristate = < 0x00 >; 1587 nvidia,enable-input = < 0x01 >; 1588 nvidia,open-drain = < 0x00 >; 1589 }; 1590 1591 dvfs_pwm_pbb1 { 1592 nvidia,pins = "dvfs_pwm_pbb1"; 1593 nvidia,function = "cldvfs"; 1594 nvidia,pull = < 0x00 >; 1595 nvidia,tristate = < 0x01 >; 1596 nvidia,enable-input = < 0x00 >; 1597 nvidia,open-drain = < 0x00 >; 1598 }; 1599 1600 dvfs_clk_pbb2 { 1601 nvidia,pins = "dvfs_clk_pbb2"; 1602 nvidia,pull = < 0x00 >; 1603 nvidia,tristate = < 0x00 >; 1604 nvidia,enable-input = < 0x00 >; 1605 nvidia,open-drain = < 0x00 >; 1606 }; 1607 1608 gpio_x1_aud_pbb3 { 1609 nvidia,pins = "gpio_x1_aud_pbb3"; 1610 nvidia,pull = < 0x02 >; 1611 nvidia,tristate = < 0x00 >; 1612 nvidia,enable-input = < 0x01 >; 1613 nvidia,open-drain = < 0x00 >; 1614 }; 1615 1616 gpio_x3_aud_pbb4 { 1617 nvidia,pins = "gpio_x3_aud_pbb4"; 1618 nvidia,function = "rsvd0"; 1619 nvidia,pull = < 0x01 >; 1620 nvidia,tristate = < 0x01 >; 1621 nvidia,enable-input = < 0x00 >; 1622 nvidia,open-drain = < 0x00 >; 1623 }; 1624 1625 hdmi_cec_pcc0 { 1626 nvidia,pins = "hdmi_cec_pcc0"; 1627 nvidia,function = "cec"; 1628 nvidia,pull = < 0x00 >; 1629 nvidia,tristate = < 0x00 >; 1630 nvidia,enable-input = < 0x01 >; 1631 nvidia,open-drain = < 0x00 >; 1632 nvidia,io-hv = < 0x01 >; 1633 }; 1634 1635 hdmi_int_dp_hpd_pcc1 { 1636 nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1637 nvidia,pull = < 0x01 >; 1638 nvidia,tristate = < 0x00 >; 1639 nvidia,enable-input = < 0x01 >; 1640 nvidia,open-drain = < 0x00 >; 1641 nvidia,io-hv = < 0x00 >; 1642 }; 1643 1644 spdif_out_pcc2 { 1645 nvidia,pins = "spdif_out_pcc2"; 1646 nvidia,function = "rsvd1"; 1647 nvidia,pull = < 0x01 >; 1648 nvidia,tristate = < 0x01 >; 1649 nvidia,enable-input = < 0x00 >; 1650 nvidia,open-drain = < 0x00 >; 1651 }; 1652 1653 spdif_in_pcc3 { 1654 nvidia,pins = "spdif_in_pcc3"; 1655 nvidia,function = "rsvd1"; 1656 nvidia,pull = < 0x01 >; 1657 nvidia,tristate = < 0x01 >; 1658 nvidia,enable-input = < 0x00 >; 1659 nvidia,open-drain = < 0x00 >; 1660 }; 1661 1662 usb_vbus_en0_pcc4 { 1663 nvidia,pins = "usb_vbus_en0_pcc4"; 1664 nvidia,function = "usb"; 1665 nvidia,pull = < 0x00 >; 1666 nvidia,tristate = < 0x00 >; 1667 nvidia,enable-input = < 0x01 >; 1668 nvidia,open-drain = < 0x00 >; 1669 nvidia,io-hv = < 0x01 >; 1670 }; 1671 1672 usb_vbus_en1_pcc5 { 1673 nvidia,pins = "usb_vbus_en1_pcc5"; 1674 nvidia,function = "usb"; 1675 nvidia,pull = < 0x00 >; 1676 nvidia,tristate = < 0x00 >; 1677 nvidia,enable-input = < 0x01 >; 1678 nvidia,open-drain = < 0x00 >; 1679 nvidia,io-hv = < 0x01 >; 1680 }; 1681 1682 dp_hpd0_pcc6 { 1683 nvidia,pins = "dp_hpd0_pcc6"; 1684 nvidia,function = "dp"; 1685 nvidia,pull = < 0x01 >; 1686 nvidia,tristate = < 0x00 >; 1687 nvidia,enable-input = < 0x01 >; 1688 nvidia,open-drain = < 0x00 >; 1689 }; 1690 1691 pcc7 { 1692 nvidia,pins = "pcc7"; 1693 nvidia,function = "rsvd0"; 1694 nvidia,pull = < 0x01 >; 1695 nvidia,tristate = < 0x01 >; 1696 nvidia,enable-input = < 0x00 >; 1697 nvidia,open-drain = < 0x00 >; 1698 nvidia,io-hv = < 0x00 >; 1699 }; 1700 1701 spi2_cs1_pdd0 { 1702 nvidia,pins = "spi2_cs1_pdd0"; 1703 nvidia,function = "spi2"; 1704 nvidia,pull = < 0x02 >; 1705 nvidia,tristate = < 0x00 >; 1706 nvidia,enable-input = < 0x01 >; 1707 nvidia,open-drain = < 0x00 >; 1708 }; 1709 1710 qspi_sck_pee0 { 1711 nvidia,pins = "qspi_sck_pee0"; 1712 nvidia,function = "rsvd1"; 1713 nvidia,pull = < 0x01 >; 1714 nvidia,tristate = < 0x01 >; 1715 nvidia,enable-input = < 0x00 >; 1716 nvidia,open-drain = < 0x00 >; 1717 }; 1718 1719 qspi_cs_n_pee1 { 1720 nvidia,pins = "qspi_cs_n_pee1"; 1721 nvidia,function = "rsvd1"; 1722 nvidia,pull = < 0x01 >; 1723 nvidia,tristate = < 0x01 >; 1724 nvidia,enable-input = < 0x00 >; 1725 nvidia,open-drain = < 0x00 >; 1726 }; 1727 1728 qspi_io0_pee2 { 1729 nvidia,pins = "qspi_io0_pee2"; 1730 nvidia,function = "rsvd1"; 1731 nvidia,pull = < 0x01 >; 1732 nvidia,tristate = < 0x01 >; 1733 nvidia,enable-input = < 0x00 >; 1734 nvidia,open-drain = < 0x00 >; 1735 }; 1736 1737 qspi_io1_pee3 { 1738 nvidia,pins = "qspi_io1_pee3"; 1739 nvidia,function = "rsvd1"; 1740 nvidia,pull = < 0x01 >; 1741 nvidia,tristate = < 0x01 >; 1742 nvidia,enable-input = < 0x00 >; 1743 nvidia,open-drain = < 0x00 >; 1744 }; 1745 1746 qspi_io2_pee4 { 1747 nvidia,pins = "qspi_io2_pee4"; 1748 nvidia,function = "rsvd1"; 1749 nvidia,pull = < 0x01 >; 1750 nvidia,tristate = < 0x01 >; 1751 nvidia,enable-input = < 0x00 >; 1752 nvidia,open-drain = < 0x00 >; 1753 }; 1754 1755 qspi_io3_pee5 { 1756 nvidia,pins = "qspi_io3_pee5"; 1757 nvidia,function = "rsvd1"; 1758 nvidia,pull = < 0x01 >; 1759 nvidia,tristate = < 0x01 >; 1760 nvidia,enable-input = < 0x00 >; 1761 nvidia,open-drain = < 0x00 >; 1762 }; 1763 1764 core_pwr_req { 1765 nvidia,pins = "core_pwr_req"; 1766 nvidia,function = "core"; 1767 nvidia,pull = < 0x00 >; 1768 nvidia,tristate = < 0x00 >; 1769 nvidia,enable-input = < 0x00 >; 1770 nvidia,open-drain = < 0x00 >; 1771 }; 1772 1773 cpu_pwr_req { 1774 nvidia,pins = "cpu_pwr_req"; 1775 nvidia,function = "cpu"; 1776 nvidia,pull = < 0x00 >; 1777 nvidia,tristate = < 0x00 >; 1778 nvidia,enable-input = < 0x00 >; 1779 nvidia,open-drain = < 0x00 >; 1780 }; 1781 1782 pwr_int_n { 1783 nvidia,pins = "pwr_int_n"; 1784 nvidia,function = "pmi"; 1785 nvidia,pull = < 0x02 >; 1786 nvidia,tristate = < 0x00 >; 1787 nvidia,enable-input = < 0x01 >; 1788 nvidia,open-drain = < 0x00 >; 1789 }; 1790 1791 clk_32k_in { 1792 nvidia,pins = "clk_32k_in"; 1793 nvidia,function = "clk"; 1794 nvidia,pull = < 0x00 >; 1795 nvidia,tristate = < 0x00 >; 1796 nvidia,enable-input = < 0x01 >; 1797 nvidia,open-drain = < 0x00 >; 1798 }; 1799 1800 jtag_rtck { 1801 nvidia,pins = "jtag_rtck"; 1802 nvidia,function = "jtag"; 1803 nvidia,pull = < 0x00 >; 1804 nvidia,tristate = < 0x00 >; 1805 nvidia,enable-input = < 0x00 >; 1806 nvidia,open-drain = < 0x00 >; 1807 }; 1808 1809 clk_req { 1810 nvidia,pins = "clk_req"; 1811 nvidia,function = "rsvd1"; 1812 nvidia,pull = < 0x01 >; 1813 nvidia,tristate = < 0x01 >; 1814 nvidia,enable-input = < 0x00 >; 1815 nvidia,open-drain = < 0x00 >; 1816 }; 1817 1818 shutdown { 1819 nvidia,pins = "shutdown"; 1820 nvidia,function = "shutdown"; 1821 nvidia,pull = < 0x00 >; 1822 nvidia,tristate = < 0x00 >; 1823 nvidia,enable-input = < 0x00 >; 1824 nvidia,open-drain = < 0x00 >; 1825 }; 1826 }; 1827 }; 1828 1829 serial@70006000 { 1830 compatible = "nvidia,tegra210-uart\0nvidia,tegra20-uart"; 1831 reg = < 0x00 0x70006000 0x00 0x40 >; 1832 reg-shift = < 0x02 >; 1833 interrupts = < 0x00 0x24 0x04 >; 1834 clocks = < 0x03 0x06 >; 1835 clock-names = "serial"; 1836 resets = < 0x03 0x06 >; 1837 reset-names = "serial"; 1838 dmas = < 0x1f 0x08 0x1f 0x08 >; 1839 dma-names = "rx\0tx"; 1840 status = "okay"; 1841 }; 1842 1843 serial@70006040 { 1844 compatible = "nvidia,tegra210-uart\0nvidia,tegra20-uart"; 1845 reg = < 0x00 0x70006040 0x00 0x40 >; 1846 reg-shift = < 0x02 >; 1847 interrupts = < 0x00 0x25 0x04 >; 1848 clocks = < 0x03 0xe0 >; 1849 clock-names = "serial"; 1850 resets = < 0x03 0x07 >; 1851 reset-names = "serial"; 1852 dmas = < 0x1f 0x09 0x1f 0x09 >; 1853 dma-names = "rx\0tx"; 1854 status = "disabled"; 1855 }; 1856 1857 serial@70006200 { 1858 compatible = "nvidia,tegra210-uart\0nvidia,tegra20-uart"; 1859 reg = < 0x00 0x70006200 0x00 0x40 >; 1860 reg-shift = < 0x02 >; 1861 interrupts = < 0x00 0x2e 0x04 >; 1862 clocks = < 0x03 0x37 >; 1863 clock-names = "serial"; 1864 resets = < 0x03 0x37 >; 1865 reset-names = "serial"; 1866 dmas = < 0x1f 0x0a 0x1f 0x0a >; 1867 dma-names = "rx\0tx"; 1868 status = "disabled"; 1869 }; 1870 1871 serial@70006300 { 1872 compatible = "nvidia,tegra210-uart\0nvidia,tegra20-uart"; 1873 reg = < 0x00 0x70006300 0x00 0x40 >; 1874 reg-shift = < 0x02 >; 1875 interrupts = < 0x00 0x5a 0x04 >; 1876 clocks = < 0x03 0x41 >; 1877 clock-names = "serial"; 1878 resets = < 0x03 0x41 >; 1879 reset-names = "serial"; 1880 dmas = < 0x1f 0x13 0x1f 0x13 >; 1881 dma-names = "rx\0tx"; 1882 status = "disabled"; 1883 }; 1884 1885 pwm@7000a000 { 1886 compatible = "nvidia,tegra210-pwm\0nvidia,tegra20-pwm"; 1887 reg = < 0x00 0x7000a000 0x00 0x100 >; 1888 #pwm-cells = < 0x02 >; 1889 clocks = < 0x03 0x11 >; 1890 clock-names = "pwm"; 1891 resets = < 0x03 0x11 >; 1892 reset-names = "pwm"; 1893 status = "okay"; 1894 phandle = < 0x20 >; 1895 }; 1896 1897 i2c@7000c000 { 1898 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 1899 reg = < 0x00 0x7000c000 0x00 0x100 >; 1900 interrupts = < 0x00 0x26 0x04 >; 1901 #address-cells = < 0x01 >; 1902 #size-cells = < 0x00 >; 1903 clocks = < 0x03 0x0c >; 1904 clock-names = "div-clk"; 1905 resets = < 0x03 0x0c >; 1906 reset-names = "i2c"; 1907 dmas = < 0x1f 0x15 0x1f 0x15 >; 1908 dma-names = "rx\0tx"; 1909 status = "disabled"; 1910 }; 1911 1912 i2c@7000c400 { 1913 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 1914 reg = < 0x00 0x7000c400 0x00 0x100 >; 1915 interrupts = < 0x00 0x54 0x04 >; 1916 #address-cells = < 0x01 >; 1917 #size-cells = < 0x00 >; 1918 clocks = < 0x03 0x36 >; 1919 clock-names = "div-clk"; 1920 resets = < 0x03 0x36 >; 1921 reset-names = "i2c"; 1922 dmas = < 0x1f 0x16 0x1f 0x16 >; 1923 dma-names = "rx\0tx"; 1924 status = "okay"; 1925 clock-frequency = < 0x186a0 >; 1926 1927 gpio@74 { 1928 compatible = "ti,tca9539"; 1929 reg = < 0x74 >; 1930 #gpio-cells = < 0x02 >; 1931 gpio-controller; 1932 phandle = < 0x41 >; 1933 }; 1934 1935 backlight@2c { 1936 compatible = "ti,lp8557"; 1937 reg = < 0x2c >; 1938 dev-ctrl = [ 80 ]; 1939 init-brt = [ ff ]; 1940 pwm-period = < 0x7296 >; 1941 pwms = < 0x20 0x00 0x7296 >; 1942 pwm-names = "lp8557"; 1943 phandle = < 0x12 >; 1944 1945 rom_14h { 1946 rom-addr = [ 14 ]; 1947 rom-val = [ 87 ]; 1948 }; 1949 1950 rom_13h { 1951 rom-addr = [ 13 ]; 1952 rom-val = [ 01 ]; 1953 }; 1954 }; 1955 }; 1956 1957 i2c@7000c500 { 1958 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 1959 reg = < 0x00 0x7000c500 0x00 0x100 >; 1960 interrupts = < 0x00 0x5c 0x04 >; 1961 #address-cells = < 0x01 >; 1962 #size-cells = < 0x00 >; 1963 clocks = < 0x03 0x43 >; 1964 clock-names = "div-clk"; 1965 resets = < 0x03 0x43 >; 1966 reset-names = "i2c"; 1967 dmas = < 0x1f 0x17 0x1f 0x17 >; 1968 dma-names = "rx\0tx"; 1969 status = "disabled"; 1970 }; 1971 1972 i2c@7000c700 { 1973 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 1974 reg = < 0x00 0x7000c700 0x00 0x100 >; 1975 interrupts = < 0x00 0x78 0x04 >; 1976 #address-cells = < 0x01 >; 1977 #size-cells = < 0x00 >; 1978 clocks = < 0x03 0x67 >; 1979 clock-names = "div-clk"; 1980 resets = < 0x03 0x67 >; 1981 reset-names = "i2c"; 1982 dmas = < 0x1f 0x1a 0x1f 0x1a >; 1983 dma-names = "rx\0tx"; 1984 pinctrl-0 = < 0x18 >; 1985 pinctrl-1 = < 0x19 >; 1986 pinctrl-names = "default\0idle"; 1987 status = "okay"; 1988 clock-frequency = < 0x186a0 >; 1989 phandle = < 0x1c >; 1990 }; 1991 1992 i2c@7000d000 { 1993 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 1994 reg = < 0x00 0x7000d000 0x00 0x100 >; 1995 interrupts = < 0x00 0x35 0x04 >; 1996 #address-cells = < 0x01 >; 1997 #size-cells = < 0x00 >; 1998 clocks = < 0x03 0x2f >; 1999 clock-names = "div-clk"; 2000 resets = < 0x03 0x2f >; 2001 reset-names = "i2c"; 2002 dmas = < 0x1f 0x18 0x1f 0x18 >; 2003 dma-names = "rx\0tx"; 2004 status = "okay"; 2005 clock-frequency = < 0x61a80 >; 2006 2007 pmic@3c { 2008 compatible = "maxim,max77620"; 2009 reg = < 0x3c >; 2010 interrupts = < 0x00 0x56 0x04 >; 2011 #interrupt-cells = < 0x02 >; 2012 interrupt-controller; 2013 #gpio-cells = < 0x02 >; 2014 gpio-controller; 2015 pinctrl-names = "default"; 2016 pinctrl-0 = < 0x21 >; 2017 phandle = < 0x3e >; 2018 2019 pinmux { 2020 phandle = < 0x21 >; 2021 2022 gpio0 { 2023 pins = "gpio0"; 2024 function = "gpio"; 2025 }; 2026 2027 gpio1 { 2028 pins = "gpio1"; 2029 function = "fps-out"; 2030 drive-push-pull = < 0x01 >; 2031 maxim,active-fps-source = < 0x00 >; 2032 maxim,active-fps-power-up-slot = < 0x07 >; 2033 maxim,active-fps-power-down-slot = < 0x00 >; 2034 }; 2035 2036 gpio2_3 { 2037 pins = "gpio2\0gpio3"; 2038 function = "fps-out"; 2039 drive-open-drain = < 0x01 >; 2040 maxim,active-fps-source = < 0x00 >; 2041 }; 2042 2043 gpio4 { 2044 pins = "gpio4"; 2045 function = "32k-out1"; 2046 }; 2047 2048 gpio5_6_7 { 2049 pins = "gpio5\0gpio6\0gpio7"; 2050 function = "gpio"; 2051 drive-push-pull = < 0x01 >; 2052 }; 2053 }; 2054 2055 fps { 2056 2057 fps0 { 2058 maxim,fps-event-source = < 0x00 >; 2059 maxim,suspend-fps-time-period-us = < 0x500 >; 2060 }; 2061 2062 fps1 { 2063 maxim,fps-event-source = < 0x01 >; 2064 maxim,suspend-fps-time-period-us = < 0x500 >; 2065 }; 2066 2067 fps2 { 2068 maxim,fps-event-source = < 0x00 >; 2069 }; 2070 }; 2071 2072 regulators { 2073 in-ldo0-1-supply = < 0x22 >; 2074 in-ldo7-8-supply = < 0x22 >; 2075 in-sd3-supply = < 0x23 >; 2076 2077 sd0 { 2078 regulator-name = "VDD_SOC"; 2079 regulator-min-microvolt = < 0x927c0 >; 2080 regulator-max-microvolt = < 0x155cc0 >; 2081 regulator-always-on; 2082 regulator-boot-on; 2083 regulator-enable-ramp-delay = < 0x92 >; 2084 regulator-ramp-delay = < 0x6b6c >; 2085 maxim,active-fps-source = < 0x01 >; 2086 }; 2087 2088 sd1 { 2089 regulator-name = "VDD_DDR_1V1_PMIC"; 2090 regulator-always-on; 2091 regulator-boot-on; 2092 regulator-enable-ramp-delay = < 0x82 >; 2093 regulator-ramp-delay = < 0x6b6c >; 2094 maxim,active-fps-source = < 0x00 >; 2095 }; 2096 2097 sd2 { 2098 regulator-name = "VDD_PRE_REG_1V35"; 2099 regulator-min-microvolt = < 0x149970 >; 2100 regulator-max-microvolt = < 0x149970 >; 2101 regulator-enable-ramp-delay = < 0xb0 >; 2102 regulator-ramp-delay = < 0x6b6c >; 2103 maxim,active-fps-source = < 0x01 >; 2104 phandle = < 0x22 >; 2105 }; 2106 2107 sd3 { 2108 regulator-name = "VDD_1V8"; 2109 regulator-min-microvolt = < 0x1b7740 >; 2110 regulator-max-microvolt = < 0x1b7740 >; 2111 regulator-always-on; 2112 regulator-boot-on; 2113 regulator-enable-ramp-delay = < 0xf2 >; 2114 regulator-ramp-delay = < 0x6b6c >; 2115 maxim,active-fps-source = < 0x00 >; 2116 phandle = < 0x05 >; 2117 }; 2118 2119 ldo0 { 2120 regulator-name = "AVDD_SYS_1V2"; 2121 regulator-min-microvolt = < 0x124f80 >; 2122 regulator-max-microvolt = < 0x124f80 >; 2123 regulator-always-on; 2124 regulator-boot-on; 2125 regulator-enable-ramp-delay = < 0x1a >; 2126 regulator-ramp-delay = < 0x186a0 >; 2127 maxim,active-fps-source = < 0x03 >; 2128 phandle = < 0x40 >; 2129 }; 2130 2131 ldo1 { 2132 regulator-name = "VDD_PEX_1V05"; 2133 regulator-min-microvolt = < 0x100590 >; 2134 regulator-max-microvolt = < 0x100590 >; 2135 regulator-enable-ramp-delay = < 0x16 >; 2136 regulator-ramp-delay = < 0x186a0 >; 2137 maxim,active-fps-source = < 0x01 >; 2138 phandle = < 0x06 >; 2139 }; 2140 2141 ldo2 { 2142 regulator-name = "VDDIO_SDMMC"; 2143 regulator-min-microvolt = < 0x1b7740 >; 2144 regulator-max-microvolt = < 0x325aa0 >; 2145 regulator-always-on; 2146 regulator-boot-on; 2147 regulator-enable-ramp-delay = < 0x3e >; 2148 regulator-ramp-delay = < 0x186a0 >; 2149 maxim,active-fps-source = < 0x03 >; 2150 phandle = < 0x32 >; 2151 }; 2152 2153 ldo3 { 2154 regulator-name = "VDD_CAM_HV"; 2155 regulator-min-microvolt = < 0x2ab980 >; 2156 regulator-max-microvolt = < 0x2ab980 >; 2157 regulator-enable-ramp-delay = < 0x32 >; 2158 regulator-ramp-delay = < 0x186a0 >; 2159 maxim,active-fps-source = < 0x03 >; 2160 }; 2161 2162 ldo4 { 2163 regulator-name = "VDD_RTC"; 2164 regulator-min-microvolt = < 0xcf850 >; 2165 regulator-max-microvolt = < 0xcf850 >; 2166 regulator-always-on; 2167 regulator-boot-on; 2168 regulator-enable-ramp-delay = < 0x16 >; 2169 regulator-ramp-delay = < 0x186a0 >; 2170 maxim,active-fps-source = < 0x00 >; 2171 }; 2172 2173 ldo5 { 2174 regulator-name = "VDD_TS_HV"; 2175 regulator-min-microvolt = < 0x325aa0 >; 2176 regulator-max-microvolt = < 0x325aa0 >; 2177 regulator-enable-ramp-delay = < 0x3e >; 2178 regulator-ramp-delay = < 0x186a0 >; 2179 maxim,active-fps-source = < 0x03 >; 2180 }; 2181 2182 ldo6 { 2183 regulator-name = "VDD_TS_1V8"; 2184 regulator-min-microvolt = < 0x1b7740 >; 2185 regulator-max-microvolt = < 0x1b7740 >; 2186 regulator-enable-ramp-delay = < 0x24 >; 2187 regulator-ramp-delay = < 0x186a0 >; 2188 maxim,active-fps-source = < 0x00 >; 2189 maxim,active-fps-power-up-slot = < 0x07 >; 2190 maxim,active-fps-power-down-slot = < 0x00 >; 2191 }; 2192 2193 ldo7 { 2194 regulator-name = "AVDD_1V05_PLL"; 2195 regulator-min-microvolt = < 0x100590 >; 2196 regulator-max-microvolt = < 0x100590 >; 2197 regulator-always-on; 2198 regulator-boot-on; 2199 regulator-enable-ramp-delay = < 0x18 >; 2200 regulator-ramp-delay = < 0x186a0 >; 2201 maxim,active-fps-source = < 0x01 >; 2202 phandle = < 0x04 >; 2203 }; 2204 2205 ldo8 { 2206 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 2207 regulator-min-microvolt = < 0x100590 >; 2208 regulator-max-microvolt = < 0x100590 >; 2209 regulator-enable-ramp-delay = < 0x16 >; 2210 regulator-ramp-delay = < 0x186a0 >; 2211 maxim,active-fps-source = < 0x01 >; 2212 phandle = < 0x1a >; 2213 }; 2214 }; 2215 }; 2216 }; 2217 2218 i2c@7000d100 { 2219 compatible = "nvidia,tegra210-i2c\0nvidia,tegra114-i2c"; 2220 reg = < 0x00 0x7000d100 0x00 0x100 >; 2221 interrupts = < 0x00 0x3f 0x04 >; 2222 #address-cells = < 0x01 >; 2223 #size-cells = < 0x00 >; 2224 clocks = < 0x03 0xa6 >; 2225 clock-names = "div-clk"; 2226 resets = < 0x03 0xa6 >; 2227 reset-names = "i2c"; 2228 dmas = < 0x1f 0x1e 0x1f 0x1e >; 2229 dma-names = "rx\0tx"; 2230 pinctrl-0 = < 0x15 >; 2231 pinctrl-1 = < 0x16 >; 2232 pinctrl-names = "default\0idle"; 2233 status = "disabled"; 2234 }; 2235 2236 spi@7000d400 { 2237 compatible = "nvidia,tegra210-spi\0nvidia,tegra114-spi"; 2238 reg = < 0x00 0x7000d400 0x00 0x200 >; 2239 interrupts = < 0x00 0x3b 0x04 >; 2240 #address-cells = < 0x01 >; 2241 #size-cells = < 0x00 >; 2242 clocks = < 0x03 0x29 >; 2243 clock-names = "spi"; 2244 resets = < 0x03 0x29 >; 2245 reset-names = "spi"; 2246 dmas = < 0x1f 0x0f 0x1f 0x0f >; 2247 dma-names = "rx\0tx"; 2248 status = "disabled"; 2249 }; 2250 2251 spi@7000d600 { 2252 compatible = "nvidia,tegra210-spi\0nvidia,tegra114-spi"; 2253 reg = < 0x00 0x7000d600 0x00 0x200 >; 2254 interrupts = < 0x00 0x52 0x04 >; 2255 #address-cells = < 0x01 >; 2256 #size-cells = < 0x00 >; 2257 clocks = < 0x03 0x2c >; 2258 clock-names = "spi"; 2259 resets = < 0x03 0x2c >; 2260 reset-names = "spi"; 2261 dmas = < 0x1f 0x10 0x1f 0x10 >; 2262 dma-names = "rx\0tx"; 2263 status = "disabled"; 2264 }; 2265 2266 spi@7000d800 { 2267 compatible = "nvidia,tegra210-spi\0nvidia,tegra114-spi"; 2268 reg = < 0x00 0x7000d800 0x00 0x200 >; 2269 interrupts = < 0x00 0x53 0x04 >; 2270 #address-cells = < 0x01 >; 2271 #size-cells = < 0x00 >; 2272 clocks = < 0x03 0x2e >; 2273 clock-names = "spi"; 2274 resets = < 0x03 0x2e >; 2275 reset-names = "spi"; 2276 dmas = < 0x1f 0x11 0x1f 0x11 >; 2277 dma-names = "rx\0tx"; 2278 status = "disabled"; 2279 }; 2280 2281 spi@7000da00 { 2282 compatible = "nvidia,tegra210-spi\0nvidia,tegra114-spi"; 2283 reg = < 0x00 0x7000da00 0x00 0x200 >; 2284 interrupts = < 0x00 0x5d 0x04 >; 2285 #address-cells = < 0x01 >; 2286 #size-cells = < 0x00 >; 2287 clocks = < 0x03 0x44 >; 2288 clock-names = "spi"; 2289 resets = < 0x03 0x44 >; 2290 reset-names = "spi"; 2291 dmas = < 0x1f 0x12 0x1f 0x12 >; 2292 dma-names = "rx\0tx"; 2293 status = "disabled"; 2294 }; 2295 2296 rtc@7000e000 { 2297 compatible = "nvidia,tegra210-rtc\0nvidia,tegra20-rtc"; 2298 reg = < 0x00 0x7000e000 0x00 0x100 >; 2299 interrupts = < 0x00 0x02 0x04 >; 2300 clocks = < 0x03 0x04 >; 2301 clock-names = "rtc"; 2302 }; 2303 2304 pmc@7000e400 { 2305 compatible = "nvidia,tegra210-pmc"; 2306 reg = < 0x00 0x7000e400 0x00 0x400 >; 2307 clocks = < 0x03 0x125 0x24 >; 2308 clock-names = "pclk\0clk32k_in"; 2309 nvidia,invert-interrupt; 2310 2311 powergates { 2312 2313 aud { 2314 clocks = < 0x03 0xc6 0x03 0x6b >; 2315 resets = < 0x03 0xc6 >; 2316 #power-domain-cells = < 0x00 >; 2317 phandle = < 0x36 >; 2318 }; 2319 2320 sor { 2321 clocks = < 0x03 0xb6 0x03 0xb7 0x03 0x34 0x03 0x30 0x03 0x52 0x03 0xb5 0x03 0xcf 0x03 0x38 >; 2322 resets = < 0x03 0xb6 0x03 0xb7 0x03 0x34 0x03 0x30 0x03 0x52 0x03 0xb5 0x03 0xcf 0x03 0x38 >; 2323 #power-domain-cells = < 0x00 >; 2324 phandle = < 0x0d >; 2325 }; 2326 2327 xusba { 2328 clocks = < 0x03 0x9c >; 2329 resets = < 0x03 0x9c >; 2330 #power-domain-cells = < 0x00 >; 2331 }; 2332 2333 xusbb { 2334 clocks = < 0x03 0x121 >; 2335 resets = < 0x03 0x5f >; 2336 #power-domain-cells = < 0x00 >; 2337 }; 2338 2339 xusbc { 2340 clocks = < 0x03 0x59 >; 2341 resets = < 0x03 0x59 >; 2342 #power-domain-cells = < 0x00 >; 2343 }; 2344 2345 vic { 2346 clocks = < 0x03 0xb2 >; 2347 clock-names = "vic"; 2348 resets = < 0x03 0xb2 >; 2349 reset-names = "vic"; 2350 #power-domain-cells = < 0x00 >; 2351 phandle = < 0x13 >; 2352 }; 2353 }; 2354 2355 sdmmc1-3v3 { 2356 pins = "sdmmc1"; 2357 power-source = < 0x01 >; 2358 phandle = < 0x30 >; 2359 }; 2360 2361 sdmmc1-1v8 { 2362 pins = "sdmmc1"; 2363 power-source = < 0x00 >; 2364 phandle = < 0x31 >; 2365 }; 2366 2367 sdmmc3-3v3 { 2368 pins = "sdmmc3"; 2369 power-source = < 0x01 >; 2370 phandle = < 0x34 >; 2371 }; 2372 2373 sdmmc3-1v8 { 2374 pins = "sdmmc3"; 2375 power-source = < 0x00 >; 2376 phandle = < 0x35 >; 2377 }; 2378 }; 2379 2380 fuse@7000f800 { 2381 compatible = "nvidia,tegra210-efuse"; 2382 reg = < 0x00 0x7000f800 0x00 0x400 >; 2383 clocks = < 0x03 0xe6 >; 2384 clock-names = "fuse"; 2385 resets = < 0x03 0x27 >; 2386 reset-names = "fuse"; 2387 }; 2388 2389 memory-controller@70019000 { 2390 compatible = "nvidia,tegra210-mc"; 2391 reg = < 0x00 0x70019000 0x00 0x1000 >; 2392 clocks = < 0x03 0x20 >; 2393 clock-names = "mc"; 2394 interrupts = < 0x00 0x4d 0x04 >; 2395 #iommu-cells = < 0x01 >; 2396 phandle = < 0x0c >; 2397 }; 2398 2399 sata@70020000 { 2400 compatible = "nvidia,tegra210-ahci"; 2401 reg = < 0x00 0x70027000 0x00 0x2000 0x00 0x70020000 0x00 0x7000 0x00 0x70001100 0x00 0x1000 >; 2402 interrupts = < 0x00 0x17 0x04 >; 2403 clocks = < 0x03 0x7c 0x03 0x7b >; 2404 clock-names = "sata\0sata-oob"; 2405 resets = < 0x03 0x7c 0x03 0x7b 0x03 0x81 >; 2406 reset-names = "sata\0sata-oob\0sata-cold"; 2407 status = "okay"; 2408 phys = < 0x25 >; 2409 }; 2410 2411 hda@70030000 { 2412 compatible = "nvidia,tegra210-hda\0nvidia,tegra30-hda"; 2413 reg = < 0x00 0x70030000 0x00 0x10000 >; 2414 interrupts = < 0x00 0x51 0x04 >; 2415 clocks = < 0x03 0x7d 0x03 0x80 0x03 0x6f >; 2416 clock-names = "hda\0hda2hdmi\0hda2codec_2x"; 2417 resets = < 0x03 0x7d 0x03 0x80 0x03 0x6f >; 2418 reset-names = "hda\0hda2hdmi\0hda2codec_2x"; 2419 status = "disabled"; 2420 }; 2421 2422 usb@70090000 { 2423 compatible = "nvidia,tegra210-xusb"; 2424 reg = < 0x00 0x70090000 0x00 0x8000 0x00 0x70098000 0x00 0x1000 0x00 0x70099000 0x00 0x1000 >; 2425 reg-names = "hcd\0fpci\0ipfs"; 2426 interrupts = < 0x00 0x27 0x04 0x00 0x28 0x04 >; 2427 clocks = < 0x03 0x59 0x03 0x11c 0x03 0x11d 0x03 0x9c 0x03 0x16a 0x03 0x11f 0x03 0x122 0x03 0x11e 0x03 0xff 0x03 0xe9 0x03 0x107 >; 2428 clock-names = "xusb_host\0xusb_host_src\0xusb_falcon_src\0xusb_ss\0xusb_ss_div2\0xusb_ss_src\0xusb_hs_src\0xusb_fs_src\0pll_u_480m\0clk_m\0pll_e"; 2429 resets = < 0x03 0x59 0x03 0x9c 0x03 0x8f >; 2430 reset-names = "xusb_host\0xusb_ss\0xusb_src"; 2431 nvidia,xusb-padctl = < 0x26 >; 2432 status = "okay"; 2433 phys = < 0x27 0x28 0x29 0x2a 0x2b 0x2c >; 2434 phy-names = "usb2-0\0usb2-1\0usb2-2\0usb2-3\0usb3-0\0usb3-1"; 2435 dvddio-pex-supply = < 0x06 >; 2436 hvddio-pex-supply = < 0x05 >; 2437 avdd-usb-supply = < 0x2d >; 2438 avdd-pll-utmip-supply = < 0x05 >; 2439 avdd-pll-uerefe-supply = < 0x06 >; 2440 dvdd-usb-ss-pll-supply = < 0x06 >; 2441 hvdd-usb-ss-pll-e-supply = < 0x05 >; 2442 }; 2443 2444 padctl@7009f000 { 2445 compatible = "nvidia,tegra210-xusb-padctl"; 2446 reg = < 0x00 0x7009f000 0x00 0x1000 >; 2447 resets = < 0x03 0x8e >; 2448 reset-names = "padctl"; 2449 status = "okay"; 2450 phandle = < 0x26 >; 2451 2452 pads { 2453 2454 usb2 { 2455 clocks = < 0x03 0xd2 >; 2456 clock-names = "trk"; 2457 status = "okay"; 2458 2459 lanes { 2460 2461 usb2-0 { 2462 status = "okay"; 2463 #phy-cells = < 0x00 >; 2464 nvidia,function = "xusb"; 2465 phandle = < 0x27 >; 2466 }; 2467 2468 usb2-1 { 2469 status = "okay"; 2470 #phy-cells = < 0x00 >; 2471 nvidia,function = "xusb"; 2472 phandle = < 0x28 >; 2473 }; 2474 2475 usb2-2 { 2476 status = "okay"; 2477 #phy-cells = < 0x00 >; 2478 nvidia,function = "xusb"; 2479 phandle = < 0x29 >; 2480 }; 2481 2482 usb2-3 { 2483 status = "okay"; 2484 #phy-cells = < 0x00 >; 2485 nvidia,function = "xusb"; 2486 phandle = < 0x2a >; 2487 }; 2488 }; 2489 }; 2490 2491 hsic { 2492 clocks = < 0x03 0xd1 >; 2493 clock-names = "trk"; 2494 status = "disabled"; 2495 2496 lanes { 2497 2498 hsic-0 { 2499 status = "disabled"; 2500 #phy-cells = < 0x00 >; 2501 }; 2502 2503 hsic-1 { 2504 status = "disabled"; 2505 #phy-cells = < 0x00 >; 2506 }; 2507 }; 2508 }; 2509 2510 pcie { 2511 clocks = < 0x03 0x107 >; 2512 clock-names = "pll"; 2513 resets = < 0x03 0xcd >; 2514 reset-names = "phy"; 2515 status = "okay"; 2516 2517 lanes { 2518 2519 pcie-0 { 2520 status = "okay"; 2521 #phy-cells = < 0x00 >; 2522 nvidia,function = "pcie-x1"; 2523 phandle = < 0x07 >; 2524 }; 2525 2526 pcie-1 { 2527 status = "okay"; 2528 #phy-cells = < 0x00 >; 2529 nvidia,function = "pcie-x4"; 2530 phandle = < 0x08 >; 2531 }; 2532 2533 pcie-2 { 2534 status = "okay"; 2535 #phy-cells = < 0x00 >; 2536 nvidia,function = "pcie-x4"; 2537 phandle = < 0x09 >; 2538 }; 2539 2540 pcie-3 { 2541 status = "okay"; 2542 #phy-cells = < 0x00 >; 2543 nvidia,function = "pcie-x4"; 2544 phandle = < 0x0a >; 2545 }; 2546 2547 pcie-4 { 2548 status = "okay"; 2549 #phy-cells = < 0x00 >; 2550 nvidia,function = "pcie-x4"; 2551 phandle = < 0x0b >; 2552 }; 2553 2554 pcie-5 { 2555 status = "okay"; 2556 #phy-cells = < 0x00 >; 2557 nvidia,function = "usb3-ss"; 2558 phandle = < 0x2c >; 2559 }; 2560 2561 pcie-6 { 2562 status = "okay"; 2563 #phy-cells = < 0x00 >; 2564 nvidia,function = "usb3-ss"; 2565 phandle = < 0x2b >; 2566 }; 2567 }; 2568 }; 2569 2570 sata { 2571 clocks = < 0x03 0x107 >; 2572 clock-names = "pll"; 2573 resets = < 0x03 0xcc >; 2574 reset-names = "phy"; 2575 status = "okay"; 2576 2577 lanes { 2578 2579 sata-0 { 2580 status = "okay"; 2581 #phy-cells = < 0x00 >; 2582 nvidia,function = "sata"; 2583 phandle = < 0x25 >; 2584 }; 2585 }; 2586 }; 2587 }; 2588 2589 ports { 2590 2591 usb2-0 { 2592 status = "okay"; 2593 mode = "otg"; 2594 }; 2595 2596 usb2-1 { 2597 status = "okay"; 2598 vbus-supply = < 0x2e >; 2599 mode = "host"; 2600 }; 2601 2602 usb2-2 { 2603 status = "okay"; 2604 vbus-supply = < 0x2f >; 2605 mode = "host"; 2606 }; 2607 2608 usb2-3 { 2609 status = "okay"; 2610 mode = "host"; 2611 }; 2612 2613 hsic-0 { 2614 status = "disabled"; 2615 }; 2616 2617 usb3-0 { 2618 status = "okay"; 2619 nvidia,usb2-companion = < 0x01 >; 2620 }; 2621 2622 usb3-1 { 2623 status = "okay"; 2624 nvidia,usb2-companion = < 0x02 >; 2625 }; 2626 2627 usb3-2 { 2628 status = "disabled"; 2629 }; 2630 2631 usb3-3 { 2632 status = "disabled"; 2633 }; 2634 }; 2635 }; 2636 2637 sdhci@700b0000 { 2638 compatible = "nvidia,tegra210-sdhci\0nvidia,tegra124-sdhci"; 2639 reg = < 0x00 0x700b0000 0x00 0x200 >; 2640 interrupts = < 0x00 0x0e 0x04 >; 2641 clocks = < 0x03 0x0e >; 2642 clock-names = "sdhci"; 2643 resets = < 0x03 0x0e >; 2644 reset-names = "sdhci"; 2645 pinctrl-names = "sdmmc-3v3\0sdmmc-1v8"; 2646 pinctrl-0 = < 0x30 >; 2647 pinctrl-1 = < 0x31 >; 2648 nvidia,pad-autocal-pull-up-offset-3v3 = < 0x00 >; 2649 nvidia,pad-autocal-pull-down-offset-3v3 = < 0x7d >; 2650 nvidia,pad-autocal-pull-up-offset-1v8 = < 0x7b >; 2651 nvidia,pad-autocal-pull-down-offset-1v8 = < 0x7b >; 2652 nvidia,default-tap = < 0x02 >; 2653 nvidia,default-trim = < 0x04 >; 2654 assigned-clocks = < 0x03 0x0f 0x03 0x134 0x03 0x12e >; 2655 assigned-clock-parents = < 0x03 0x134 >; 2656 assigned-clock-rates = < 0xbebc200 0x3b9aca00 0x3b9aca00 >; 2657 status = "okay"; 2658 bus-width = < 0x04 >; 2659 cd-gpios = < 0x10 0xc9 0x01 >; 2660 vqmmc-supply = < 0x32 >; 2661 vmmc-supply = < 0x33 >; 2662 }; 2663 2664 sdhci@700b0200 { 2665 compatible = "nvidia,tegra210-sdhci\0nvidia,tegra124-sdhci"; 2666 reg = < 0x00 0x700b0200 0x00 0x200 >; 2667 interrupts = < 0x00 0x0f 0x04 >; 2668 clocks = < 0x03 0x09 >; 2669 clock-names = "sdhci"; 2670 resets = < 0x03 0x09 >; 2671 reset-names = "sdhci"; 2672 nvidia,pad-autocal-pull-up-offset-1v8 = < 0x05 >; 2673 nvidia,pad-autocal-pull-down-offset-1v8 = < 0x05 >; 2674 nvidia,default-tap = < 0x08 >; 2675 nvidia,default-trim = < 0x00 >; 2676 status = "disabled"; 2677 }; 2678 2679 sdhci@700b0400 { 2680 compatible = "nvidia,tegra210-sdhci\0nvidia,tegra124-sdhci"; 2681 reg = < 0x00 0x700b0400 0x00 0x200 >; 2682 interrupts = < 0x00 0x13 0x04 >; 2683 clocks = < 0x03 0x45 >; 2684 clock-names = "sdhci"; 2685 resets = < 0x03 0x45 >; 2686 reset-names = "sdhci"; 2687 pinctrl-names = "sdmmc-3v3\0sdmmc-1v8"; 2688 pinctrl-0 = < 0x34 >; 2689 pinctrl-1 = < 0x35 >; 2690 nvidia,pad-autocal-pull-up-offset-3v3 = < 0x00 >; 2691 nvidia,pad-autocal-pull-down-offset-3v3 = < 0x7d >; 2692 nvidia,pad-autocal-pull-up-offset-1v8 = < 0x7b >; 2693 nvidia,pad-autocal-pull-down-offset-1v8 = < 0x7b >; 2694 nvidia,default-tap = < 0x03 >; 2695 nvidia,default-trim = < 0x03 >; 2696 status = "disabled"; 2697 }; 2698 2699 sdhci@700b0600 { 2700 compatible = "nvidia,tegra210-sdhci\0nvidia,tegra124-sdhci"; 2701 reg = < 0x00 0x700b0600 0x00 0x200 >; 2702 interrupts = < 0x00 0x1f 0x04 >; 2703 clocks = < 0x03 0x0f >; 2704 clock-names = "sdhci"; 2705 resets = < 0x03 0x0f >; 2706 reset-names = "sdhci"; 2707 nvidia,pad-autocal-pull-up-offset-1v8 = < 0x05 >; 2708 nvidia,pad-autocal-pull-down-offset-1v8 = < 0x05 >; 2709 nvidia,default-tap = < 0x08 >; 2710 nvidia,default-trim = < 0x00 >; 2711 assigned-clocks = < 0x03 0x0f 0x03 0x134 >; 2712 assigned-clock-parents = < 0x03 0x134 >; 2713 nvidia,dqs-trim = < 0x28 >; 2714 mmc-hs400-1_8v; 2715 status = "okay"; 2716 bus-width = < 0x08 >; 2717 non-removable; 2718 vqmmc-supply = < 0x05 >; 2719 }; 2720 2721 mipi@700e3000 { 2722 compatible = "nvidia,tegra210-mipi"; 2723 reg = < 0x00 0x700e3000 0x00 0x100 >; 2724 clocks = < 0x03 0x38 >; 2725 clock-names = "mipi-cal"; 2726 power-domains = < 0x0d >; 2727 #nvidia,mipi-calibrate-cells = < 0x01 >; 2728 phandle = < 0x0e >; 2729 }; 2730 2731 aconnect@702c0000 { 2732 compatible = "nvidia,tegra210-aconnect"; 2733 clocks = < 0x03 0xc6 0x03 0x6b >; 2734 clock-names = "ape\0apb2ape"; 2735 power-domains = < 0x36 >; 2736 #address-cells = < 0x01 >; 2737 #size-cells = < 0x01 >; 2738 ranges = < 0x702c0000 0x00 0x702c0000 0x40000 >; 2739 status = "disabled"; 2740 2741 dma@702e2000 { 2742 compatible = "nvidia,tegra210-adma"; 2743 reg = < 0x702e2000 0x2000 >; 2744 interrupt-parent = < 0x37 >; 2745 interrupts = < 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 0x00 0x20 0x04 0x00 0x21 0x04 0x00 0x22 0x04 0x00 0x23 0x04 0x00 0x24 0x04 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04 0x00 0x2c 0x04 0x00 0x2d 0x04 >; 2746 #dma-cells = < 0x01 >; 2747 clocks = < 0x03 0x6a >; 2748 clock-names = "d_audio"; 2749 status = "disabled"; 2750 }; 2751 2752 agic@702f9000 { 2753 compatible = "nvidia,tegra210-agic"; 2754 #interrupt-cells = < 0x03 >; 2755 interrupt-controller; 2756 reg = < 0x702f9000 0x2000 0x702fa000 0x2000 >; 2757 interrupts = < 0x00 0x66 0xf04 >; 2758 clocks = < 0x03 0xc6 >; 2759 clock-names = "clk"; 2760 status = "disabled"; 2761 phandle = < 0x37 >; 2762 }; 2763 }; 2764 2765 spi@70410000 { 2766 compatible = "nvidia,tegra210-qspi"; 2767 reg = < 0x00 0x70410000 0x00 0x1000 >; 2768 interrupts = < 0x00 0x0a 0x04 >; 2769 #address-cells = < 0x01 >; 2770 #size-cells = < 0x00 >; 2771 clocks = < 0x03 0xd3 >; 2772 clock-names = "qspi"; 2773 resets = < 0x03 0xd3 >; 2774 reset-names = "qspi"; 2775 dmas = < 0x1f 0x05 0x1f 0x05 >; 2776 dma-names = "rx\0tx"; 2777 status = "disabled"; 2778 }; 2779 2780 usb@7d000000 { 2781 compatible = "nvidia,tegra210-ehci\0nvidia,tegra30-ehci\0usb-ehci"; 2782 reg = < 0x00 0x7d000000 0x00 0x4000 >; 2783 interrupts = < 0x00 0x14 0x04 >; 2784 phy_type = "utmi"; 2785 clocks = < 0x03 0x16 >; 2786 clock-names = "usb"; 2787 resets = < 0x03 0x16 >; 2788 reset-names = "usb"; 2789 nvidia,phy = < 0x38 >; 2790 status = "disabled"; 2791 }; 2792 2793 usb-phy@7d000000 { 2794 compatible = "nvidia,tegra210-usb-phy\0nvidia,tegra30-usb-phy"; 2795 reg = < 0x00 0x7d000000 0x00 0x4000 0x00 0x7d000000 0x00 0x4000 >; 2796 phy_type = "utmi"; 2797 clocks = < 0x03 0x16 0x03 0xfe 0x03 0x16 >; 2798 clock-names = "reg\0pll_u\0utmi-pads"; 2799 resets = < 0x03 0x16 0x03 0x16 >; 2800 reset-names = "usb\0utmi-pads"; 2801 nvidia,hssync-start-delay = < 0x00 >; 2802 nvidia,idle-wait-delay = < 0x11 >; 2803 nvidia,elastic-limit = < 0x10 >; 2804 nvidia,term-range-adj = < 0x06 >; 2805 nvidia,xcvr-setup = < 0x09 >; 2806 nvidia,xcvr-lsfslew = < 0x00 >; 2807 nvidia,xcvr-lsrslew = < 0x03 >; 2808 nvidia,hssquelch-level = < 0x02 >; 2809 nvidia,hsdiscon-level = < 0x05 >; 2810 nvidia,xcvr-hsslew = < 0x0c >; 2811 nvidia,has-utmi-pad-registers; 2812 status = "disabled"; 2813 phandle = < 0x38 >; 2814 }; 2815 2816 usb@7d004000 { 2817 compatible = "nvidia,tegra210-ehci\0nvidia,tegra30-ehci\0usb-ehci"; 2818 reg = < 0x00 0x7d004000 0x00 0x4000 >; 2819 interrupts = < 0x00 0x15 0x04 >; 2820 phy_type = "utmi"; 2821 clocks = < 0x03 0x3a >; 2822 clock-names = "usb"; 2823 resets = < 0x03 0x3a >; 2824 reset-names = "usb"; 2825 nvidia,phy = < 0x39 >; 2826 status = "disabled"; 2827 }; 2828 2829 usb-phy@7d004000 { 2830 compatible = "nvidia,tegra210-usb-phy\0nvidia,tegra30-usb-phy"; 2831 reg = < 0x00 0x7d004000 0x00 0x4000 0x00 0x7d000000 0x00 0x4000 >; 2832 phy_type = "utmi"; 2833 clocks = < 0x03 0x3a 0x03 0xfe 0x03 0x16 >; 2834 clock-names = "reg\0pll_u\0utmi-pads"; 2835 resets = < 0x03 0x3a 0x03 0x16 >; 2836 reset-names = "usb\0utmi-pads"; 2837 nvidia,hssync-start-delay = < 0x00 >; 2838 nvidia,idle-wait-delay = < 0x11 >; 2839 nvidia,elastic-limit = < 0x10 >; 2840 nvidia,term-range-adj = < 0x06 >; 2841 nvidia,xcvr-setup = < 0x09 >; 2842 nvidia,xcvr-lsfslew = < 0x00 >; 2843 nvidia,xcvr-lsrslew = < 0x03 >; 2844 nvidia,hssquelch-level = < 0x02 >; 2845 nvidia,hsdiscon-level = < 0x05 >; 2846 nvidia,xcvr-hsslew = < 0x0c >; 2847 status = "disabled"; 2848 phandle = < 0x39 >; 2849 }; 2850 2851 cpus { 2852 #address-cells = < 0x01 >; 2853 #size-cells = < 0x00 >; 2854 2855 cpu@0 { 2856 device_type = "cpu"; 2857 compatible = "arm,cortex-a57"; 2858 reg = < 0x00 >; 2859 enable-method = "psci"; 2860 }; 2861 2862 cpu@1 { 2863 device_type = "cpu"; 2864 compatible = "arm,cortex-a57"; 2865 reg = < 0x01 >; 2866 enable-method = "psci"; 2867 }; 2868 2869 cpu@2 { 2870 device_type = "cpu"; 2871 compatible = "arm,cortex-a57"; 2872 reg = < 0x02 >; 2873 enable-method = "psci"; 2874 }; 2875 2876 cpu@3 { 2877 device_type = "cpu"; 2878 compatible = "arm,cortex-a57"; 2879 reg = < 0x03 >; 2880 enable-method = "psci"; 2881 }; 2882 }; 2883 2884 timer { 2885 compatible = "arm,armv8-timer"; 2886 interrupts = < 0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08 >; 2887 interrupt-parent = < 0x02 >; 2888 }; 2889 2890 thermal-sensor@700e2000 { 2891 compatible = "nvidia,tegra210-soctherm"; 2892 reg = < 0x00 0x700e2000 0x00 0x600 0x00 0x60006000 0x00 0x400 >; 2893 reg-names = "soctherm-reg\0car-reg"; 2894 interrupts = < 0x00 0x30 0x04 >; 2895 clocks = < 0x03 0x64 0x03 0x4e >; 2896 clock-names = "tsensor\0soctherm"; 2897 resets = < 0x03 0x4e >; 2898 reset-names = "soctherm"; 2899 #thermal-sensor-cells = < 0x01 >; 2900 phandle = < 0x3a >; 2901 2902 throttle-cfgs { 2903 2904 heavy { 2905 nvidia,priority = < 0x64 >; 2906 nvidia,cpu-throt-percent = < 0x55 >; 2907 #cooling-cells = < 0x02 >; 2908 phandle = < 0x3c >; 2909 }; 2910 }; 2911 }; 2912 2913 thermal-zones { 2914 2915 cpu { 2916 polling-delay-passive = < 0x3e8 >; 2917 polling-delay = < 0x00 >; 2918 thermal-sensors = < 0x3a 0x00 >; 2919 2920 trips { 2921 2922 cpu-shutdown-trip { 2923 temperature = < 0x19064 >; 2924 hysteresis = < 0x00 >; 2925 type = "critical"; 2926 }; 2927 2928 throttle-trip { 2929 temperature = < 0x180c4 >; 2930 hysteresis = < 0x3e8 >; 2931 type = "hot"; 2932 phandle = < 0x3b >; 2933 }; 2934 }; 2935 2936 cooling-maps { 2937 2938 map0 { 2939 trip = < 0x3b >; 2940 cooling-device = < 0x3c 0x01 0x01 >; 2941 }; 2942 }; 2943 }; 2944 2945 mem { 2946 polling-delay-passive = < 0x00 >; 2947 polling-delay = < 0x00 >; 2948 thermal-sensors = < 0x3a 0x01 >; 2949 2950 trips { 2951 2952 mem-shutdown-trip { 2953 temperature = < 0x19258 >; 2954 hysteresis = < 0x00 >; 2955 type = "critical"; 2956 }; 2957 }; 2958 2959 cooling-maps { 2960 }; 2961 }; 2962 2963 gpu { 2964 polling-delay-passive = < 0x3e8 >; 2965 polling-delay = < 0x00 >; 2966 thermal-sensors = < 0x3a 0x02 >; 2967 2968 trips { 2969 2970 gpu-shutdown-trip { 2971 temperature = < 0x19258 >; 2972 hysteresis = < 0x00 >; 2973 type = "critical"; 2974 }; 2975 2976 throttle-trip { 2977 temperature = < 0x186a0 >; 2978 hysteresis = < 0x3e8 >; 2979 type = "hot"; 2980 phandle = < 0x3d >; 2981 }; 2982 }; 2983 2984 cooling-maps { 2985 2986 map0 { 2987 trip = < 0x3d >; 2988 cooling-device = < 0x3c 0x01 0x01 >; 2989 }; 2990 }; 2991 }; 2992 2993 pllx { 2994 polling-delay-passive = < 0x00 >; 2995 polling-delay = < 0x00 >; 2996 thermal-sensors = < 0x3a 0x03 >; 2997 2998 trips { 2999 3000 pllx-shutdown-trip { 3001 temperature = < 0x19258 >; 3002 hysteresis = < 0x00 >; 3003 type = "critical"; 3004 }; 3005 }; 3006 3007 cooling-maps { 3008 }; 3009 }; 3010 }; 3011 3012 aliases { 3013 rtc0 = "/i2c@7000d000/pmic@3c"; 3014 rtc1 = "/rtc@7000e000"; 3015 serial0 = "/serial@70006000"; 3016 }; 3017 3018 chosen { 3019 stdout-path = "serial0:115200n8"; 3020 }; 3021 3022 memory { 3023 device_type = "memory"; 3024 reg = < 0x00 0x80000000 0x01 0x00 >; 3025 }; 3026 3027 clocks { 3028 compatible = "simple-bus"; 3029 #address-cells = < 0x01 >; 3030 #size-cells = < 0x00 >; 3031 3032 clock@0 { 3033 compatible = "fixed-clock"; 3034 reg = < 0x00 >; 3035 #clock-cells = < 0x00 >; 3036 clock-frequency = < 0x8000 >; 3037 phandle = < 0x24 >; 3038 }; 3039 }; 3040 3041 psci { 3042 compatible = "arm,psci-0.2"; 3043 method = "smc"; 3044 }; 3045 3046 regulators { 3047 compatible = "simple-bus"; 3048 #address-cells = < 0x01 >; 3049 #size-cells = < 0x00 >; 3050 3051 regulator@100 { 3052 compatible = "pwm-regulator"; 3053 reg = < 0x64 >; 3054 pwms = < 0x20 0x01 0x1310 >; 3055 regulator-name = "VDD_GPU"; 3056 regulator-min-microvolt = < 0xad570 >; 3057 regulator-max-microvolt = < 0x142440 >; 3058 enable-gpios = < 0x3e 0x06 0x00 >; 3059 regulator-ramp-delay = < 0x50 >; 3060 regulator-enable-ramp-delay = < 0x3e8 >; 3061 phandle = < 0x1d >; 3062 }; 3063 3064 regulator@0 { 3065 compatible = "regulator-fixed"; 3066 reg = < 0x00 >; 3067 regulator-name = "VDD_SYS_MUX"; 3068 regulator-min-microvolt = < 0x4c4b40 >; 3069 regulator-max-microvolt = < 0x4c4b40 >; 3070 regulator-always-on; 3071 regulator-boot-on; 3072 phandle = < 0x3f >; 3073 }; 3074 3075 regulator@1 { 3076 compatible = "regulator-fixed"; 3077 reg = < 0x01 >; 3078 regulator-name = "VDD_5V0_SYS"; 3079 regulator-min-microvolt = < 0x4c4b40 >; 3080 regulator-max-microvolt = < 0x4c4b40 >; 3081 regulator-always-on; 3082 regulator-boot-on; 3083 gpio = < 0x3e 0x01 0x00 >; 3084 enable-active-high; 3085 vin-supply = < 0x3f >; 3086 phandle = < 0x23 >; 3087 }; 3088 3089 regulator@2 { 3090 compatible = "regulator-fixed"; 3091 reg = < 0x02 >; 3092 regulator-name = "VDD_3V3_SYS"; 3093 regulator-min-microvolt = < 0x325aa0 >; 3094 regulator-max-microvolt = < 0x325aa0 >; 3095 regulator-always-on; 3096 regulator-boot-on; 3097 gpio = < 0x3e 0x03 0x00 >; 3098 enable-active-high; 3099 vin-supply = < 0x3f >; 3100 regulator-enable-ramp-delay = < 0xa0 >; 3101 regulator-disable-ramp-delay = < 0x2710 >; 3102 phandle = < 0x2d >; 3103 }; 3104 3105 regulator@3 { 3106 compatible = "regulator-fixed"; 3107 reg = < 0x03 >; 3108 regulator-name = "VDD_5V0_IO_SYS"; 3109 regulator-min-microvolt = < 0x4c4b40 >; 3110 regulator-max-microvolt = < 0x4c4b40 >; 3111 regulator-always-on; 3112 regulator-boot-on; 3113 phandle = < 0x11 >; 3114 }; 3115 3116 regulator@4 { 3117 compatible = "regulator-fixed"; 3118 reg = < 0x04 >; 3119 regulator-name = "VDD_3V3_SD"; 3120 regulator-min-microvolt = < 0x325aa0 >; 3121 regulator-max-microvolt = < 0x325aa0 >; 3122 gpio = < 0x10 0xcc 0x00 >; 3123 enable-active-high; 3124 vin-supply = < 0x2d >; 3125 regulator-enable-ramp-delay = < 0x1d8 >; 3126 regulator-disable-ramp-delay = < 0x1310 >; 3127 phandle = < 0x33 >; 3128 }; 3129 3130 regulator@5 { 3131 compatible = "regulator-fixed"; 3132 reg = < 0x05 >; 3133 regulator-name = "AVDD_DSI_CSI_1V2"; 3134 regulator-min-microvolt = < 0x124f80 >; 3135 regulator-max-microvolt = < 0x124f80 >; 3136 vin-supply = < 0x40 >; 3137 phandle = < 0x0f >; 3138 }; 3139 3140 regulator@6 { 3141 compatible = "regulator-fixed"; 3142 reg = < 0x06 >; 3143 regulator-name = "VDD_DIS_3V3_LCD"; 3144 regulator-min-microvolt = < 0x325aa0 >; 3145 regulator-max-microvolt = < 0x325aa0 >; 3146 regulator-always-on; 3147 gpio = < 0x41 0x03 0x00 >; 3148 enable-active-high; 3149 vin-supply = < 0x2d >; 3150 }; 3151 3152 regulator@7 { 3153 compatible = "regulator-fixed"; 3154 reg = < 0x07 >; 3155 regulator-name = "VDD_LCD_1V8_DIS"; 3156 regulator-min-microvolt = < 0x1b7740 >; 3157 regulator-max-microvolt = < 0x1b7740 >; 3158 regulator-always-on; 3159 gpio = < 0x41 0x0e 0x00 >; 3160 enable-active-high; 3161 vin-supply = < 0x05 >; 3162 }; 3163 3164 regulator@8 { 3165 compatible = "regulator-fixed"; 3166 reg = < 0x08 >; 3167 regulator-name = "RTL_5V"; 3168 regulator-min-microvolt = < 0x4c4b40 >; 3169 regulator-max-microvolt = < 0x4c4b40 >; 3170 gpio = < 0x10 0x39 0x00 >; 3171 enable-active-high; 3172 vin-supply = < 0x23 >; 3173 phandle = < 0x2e >; 3174 }; 3175 3176 regulator@9 { 3177 compatible = "regulator-fixed"; 3178 reg = < 0x09 >; 3179 regulator-name = "USB_VBUS_EN1"; 3180 regulator-min-microvolt = < 0x4c4b40 >; 3181 regulator-max-microvolt = < 0x4c4b40 >; 3182 gpio = < 0x10 0xe5 0x00 >; 3183 enable-active-high; 3184 vin-supply = < 0x23 >; 3185 phandle = < 0x2f >; 3186 }; 3187 3188 regulator@10 { 3189 compatible = "regulator-fixed"; 3190 reg = < 0x0a >; 3191 regulator-name = "VDD_HDMI_5V0"; 3192 regulator-min-microvolt = < 0x4c4b40 >; 3193 regulator-max-microvolt = < 0x4c4b40 >; 3194 gpio = < 0x41 0x0c 0x01 >; 3195 enable-active-high; 3196 vin-supply = < 0x23 >; 3197 phandle = < 0x1b >; 3198 }; 3199 }; 3200 3201 gpio-keys { 3202 compatible = "gpio-keys"; 3203 label = "gpio-keys"; 3204 3205 power { 3206 label = "Power"; 3207 gpios = < 0x10 0xbd 0x01 >; 3208 linux,code = < 0x74 >; 3209 wakeup-source; 3210 }; 3211 3212 volume_down { 3213 label = "Volume Down"; 3214 gpios = < 0x10 0xc0 0x01 >; 3215 linux,code = < 0x72 >; 3216 }; 3217 3218 volume_up { 3219 label = "Volume Up"; 3220 gpios = < 0x10 0xbe 0x01 >; 3221 linux,code = < 0x73 >; 3222 }; 3223 }; 3224}; 3225