1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	interrupt-parent = < 0x01 >;
15	#address-cells = < 0x02 >;
16	#size-cells = < 0x02 >;
17	compatible = "hardkernel,odroid-c2\0amlogic,meson-gxbb";
18	model = "Hardkernel ODROID-C2";
19
20	reserved-memory {
21		#address-cells = < 0x02 >;
22		#size-cells = < 0x02 >;
23		ranges;
24
25		hwrom@0 {
26			reg = < 0x00 0x00 0x00 0x1000000 >;
27			no-map;
28		};
29
30		secmon@10000000 {
31			reg = < 0x00 0x10000000 0x00 0x200000 >;
32			no-map;
33		};
34
35		secmon@5000000 {
36			reg = < 0x00 0x5000000 0x00 0x300000 >;
37			no-map;
38		};
39
40		linux,cma {
41			compatible = "shared-dma-pool";
42			reusable;
43			size = < 0x00 0x10000000 >;
44			alignment = < 0x00 0x400000 >;
45			linux,cma-default;
46		};
47	};
48
49	cpus {
50		#address-cells = < 0x02 >;
51		#size-cells = < 0x00 >;
52
53		cpu@0 {
54			device_type = "cpu";
55			compatible = "arm,cortex-a53\0arm,armv8";
56			reg = < 0x00 0x00 >;
57			enable-method = "psci";
58			next-level-cache = < 0x02 >;
59			clocks = < 0x03 0x00 >;
60			phandle = < 0x04 >;
61		};
62
63		cpu@1 {
64			device_type = "cpu";
65			compatible = "arm,cortex-a53\0arm,armv8";
66			reg = < 0x00 0x01 >;
67			enable-method = "psci";
68			next-level-cache = < 0x02 >;
69			clocks = < 0x03 0x00 >;
70			phandle = < 0x05 >;
71		};
72
73		cpu@2 {
74			device_type = "cpu";
75			compatible = "arm,cortex-a53\0arm,armv8";
76			reg = < 0x00 0x02 >;
77			enable-method = "psci";
78			next-level-cache = < 0x02 >;
79			clocks = < 0x03 0x00 >;
80			phandle = < 0x06 >;
81		};
82
83		cpu@3 {
84			device_type = "cpu";
85			compatible = "arm,cortex-a53\0arm,armv8";
86			reg = < 0x00 0x03 >;
87			enable-method = "psci";
88			next-level-cache = < 0x02 >;
89			clocks = < 0x03 0x00 >;
90			phandle = < 0x07 >;
91		};
92
93		l2-cache0 {
94			compatible = "cache";
95			phandle = < 0x02 >;
96		};
97	};
98
99	arm-pmu {
100		compatible = "arm,cortex-a53-pmu";
101		interrupts = < 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x99 0x04 0x00 0x9a 0x04 >;
102		interrupt-affinity = < 0x04 0x05 0x06 0x07 >;
103	};
104
105	psci {
106		compatible = "arm,psci-0.2";
107		method = "smc";
108	};
109
110	timer {
111		compatible = "arm,armv8-timer";
112		interrupts = < 0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08 >;
113	};
114
115	xtal-clk {
116		compatible = "fixed-clock";
117		clock-frequency = < 0x16e3600 >;
118		clock-output-names = "xtal";
119		#clock-cells = < 0x00 >;
120		phandle = < 0x0b >;
121	};
122
123	firmware {
124
125		secure-monitor {
126			compatible = "amlogic,meson-gx-sm\0amlogic,meson-gxbb-sm";
127		};
128	};
129
130	efuse {
131		compatible = "amlogic,meson-gx-efuse\0amlogic,meson-gxbb-efuse";
132		#address-cells = < 0x01 >;
133		#size-cells = < 0x01 >;
134		read-only;
135
136		sn@14 {
137			reg = < 0x14 0x10 >;
138		};
139
140		eth_mac@34 {
141			reg = < 0x34 0x10 >;
142		};
143
144		bid@46 {
145			reg = < 0x46 0x30 >;
146		};
147	};
148
149	scpi {
150		compatible = "amlogic,meson-gxbb-scpi\0arm,scpi-pre-1.0";
151		mboxes = < 0x08 0x01 0x08 0x02 >;
152		shmem = < 0x09 0x0a >;
153
154		clocks {
155			compatible = "arm,scpi-clocks";
156			status = "disabled";
157
158			scpi_clocks@0 {
159				compatible = "arm,scpi-dvfs-clocks";
160				#clock-cells = < 0x01 >;
161				clock-indices = < 0x00 >;
162				clock-output-names = "vcpu";
163				phandle = < 0x03 >;
164			};
165		};
166
167		sensors {
168			compatible = "amlogic,meson-gxbb-scpi-sensors\0arm,scpi-sensors";
169			#thermal-sensor-cells = < 0x01 >;
170		};
171	};
172
173	soc {
174		compatible = "simple-bus";
175		#address-cells = < 0x02 >;
176		#size-cells = < 0x02 >;
177		ranges;
178
179		bus@c1100000 {
180			compatible = "simple-bus";
181			reg = < 0x00 0xc1100000 0x00 0x100000 >;
182			#address-cells = < 0x02 >;
183			#size-cells = < 0x02 >;
184			ranges = < 0x00 0x00 0x00 0xc1100000 0x00 0x100000 >;
185
186			interrupt-controller@9880 {
187				compatible = "amlogic,meson-gpio-intc\0amlogic,meson-gxbb-gpio-intc";
188				reg = < 0x00 0x9880 0x00 0x10 >;
189				interrupt-controller;
190				#interrupt-cells = < 0x02 >;
191				amlogic,channel-interrupts = < 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 >;
192				status = "okay";
193				phandle = < 0x1b >;
194			};
195
196			reset-controller@4404 {
197				compatible = "amlogic,meson-gx-reset\0amlogic,meson-gxbb-reset";
198				reg = < 0x00 0x4404 0x00 0x9c >;
199				#reset-cells = < 0x01 >;
200				phandle = < 0x0f >;
201			};
202
203			serial@84c0 {
204				compatible = "amlogic,meson-gx-uart";
205				reg = < 0x00 0x84c0 0x00 0x18 >;
206				interrupts = < 0x00 0x1a 0x01 >;
207				status = "disabled";
208				clocks = < 0x0b 0x0c 0x1a 0x0b >;
209				clock-names = "xtal\0pclk\0baud";
210			};
211
212			serial@84dc {
213				compatible = "amlogic,meson-gx-uart";
214				reg = < 0x00 0x84dc 0x00 0x18 >;
215				interrupts = < 0x00 0x4b 0x01 >;
216				status = "disabled";
217				clocks = < 0x0b 0x0c 0x30 0x0b >;
218				clock-names = "xtal\0pclk\0baud";
219			};
220
221			i2c@8500 {
222				compatible = "amlogic,meson-gx-i2c\0amlogic,meson-gxbb-i2c";
223				reg = < 0x00 0x8500 0x00 0x20 >;
224				interrupts = < 0x00 0x15 0x01 >;
225				#address-cells = < 0x01 >;
226				#size-cells = < 0x00 >;
227				status = "okay";
228				clocks = < 0x0c 0x16 >;
229				pinctrl-0 = < 0x0d >;
230				pinctrl-names = "default";
231			};
232
233			pwm@8550 {
234				compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
235				reg = < 0x00 0x8550 0x00 0x10 >;
236				#pwm-cells = < 0x03 >;
237				status = "disabled";
238			};
239
240			pwm@8650 {
241				compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
242				reg = < 0x00 0x8650 0x00 0x10 >;
243				#pwm-cells = < 0x03 >;
244				status = "disabled";
245			};
246
247			adc@8680 {
248				compatible = "amlogic,meson-gxbb-saradc\0amlogic,meson-saradc";
249				reg = < 0x00 0x8680 0x00 0x34 >;
250				#io-channel-cells = < 0x01 >;
251				interrupts = < 0x00 0x49 0x01 >;
252				status = "okay";
253				clocks = < 0x0b 0x0c 0x17 0x0c 0x61 0x0c 0x62 >;
254				clock-names = "clkin\0core\0adc_clk\0adc_sel";
255				vref-supply = < 0x0e >;
256			};
257
258			pwm@86c0 {
259				compatible = "amlogic,meson-gx-pwm\0amlogic,meson-gxbb-pwm";
260				reg = < 0x00 0x86c0 0x00 0x10 >;
261				#pwm-cells = < 0x03 >;
262				status = "disabled";
263			};
264
265			serial@8700 {
266				compatible = "amlogic,meson-gx-uart";
267				reg = < 0x00 0x8700 0x00 0x18 >;
268				interrupts = < 0x00 0x5d 0x01 >;
269				status = "disabled";
270				clocks = < 0x0b 0x0c 0x44 0x0b >;
271				clock-names = "xtal\0pclk\0baud";
272			};
273
274			i2c@87c0 {
275				compatible = "amlogic,meson-gx-i2c\0amlogic,meson-gxbb-i2c";
276				reg = < 0x00 0x87c0 0x00 0x20 >;
277				interrupts = < 0x00 0xd6 0x01 >;
278				#address-cells = < 0x01 >;
279				#size-cells = < 0x00 >;
280				status = "disabled";
281				clocks = < 0x0c 0x16 >;
282			};
283
284			i2c@87e0 {
285				compatible = "amlogic,meson-gx-i2c\0amlogic,meson-gxbb-i2c";
286				reg = < 0x00 0x87e0 0x00 0x20 >;
287				interrupts = < 0x00 0xd7 0x01 >;
288				#address-cells = < 0x01 >;
289				#size-cells = < 0x00 >;
290				status = "disabled";
291				clocks = < 0x0c 0x16 >;
292			};
293
294			spi@8d80 {
295				compatible = "amlogic,meson-gx-spicc";
296				reg = < 0x00 0x8d80 0x00 0x80 >;
297				interrupts = < 0x00 0x51 0x04 >;
298				#address-cells = < 0x01 >;
299				#size-cells = < 0x00 >;
300				status = "disabled";
301				clocks = < 0x0c 0x15 >;
302				clock-names = "core";
303				resets = < 0x0f 0xc1 >;
304				num-cs = < 0x01 >;
305			};
306
307			spi@8c80 {
308				compatible = "amlogic,meson-gxbb-spifc";
309				reg = < 0x00 0x8c80 0x00 0x80 >;
310				#address-cells = < 0x01 >;
311				#size-cells = < 0x00 >;
312				status = "disabled";
313				clocks = < 0x0c 0x22 >;
314			};
315
316			watchdog@98d0 {
317				compatible = "amlogic,meson-gx-wdt\0amlogic,meson-gxbb-wdt";
318				reg = < 0x00 0x98d0 0x00 0x10 >;
319				clocks = < 0x0b >;
320			};
321		};
322
323		interrupt-controller@c4301000 {
324			compatible = "arm,gic-400";
325			reg = < 0x00 0xc4301000 0x00 0x1000 0x00 0xc4302000 0x00 0x2000 0x00 0xc4304000 0x00 0x2000 0x00 0xc4306000 0x00 0x2000 >;
326			interrupt-controller;
327			interrupts = < 0x01 0x09 0xff04 >;
328			#interrupt-cells = < 0x03 >;
329			#address-cells = < 0x00 >;
330			phandle = < 0x01 >;
331		};
332
333		sram@c8000000 {
334			compatible = "amlogic,meson-gx-sram\0amlogic,meson-gxbb-sram\0mmio-sram";
335			reg = < 0x00 0xc8000000 0x00 0x14000 >;
336			#address-cells = < 0x01 >;
337			#size-cells = < 0x01 >;
338			ranges = < 0x00 0x00 0xc8000000 0x14000 >;
339
340			scp-shmem@0 {
341				compatible = "amlogic,meson-gx-scp-shmem\0amlogic,meson-gxbb-scp-shmem";
342				reg = < 0x13000 0x400 >;
343				phandle = < 0x09 >;
344			};
345
346			scp-shmem@200 {
347				compatible = "amlogic,meson-gx-scp-shmem\0amlogic,meson-gxbb-scp-shmem";
348				reg = < 0x13400 0x400 >;
349				phandle = < 0x0a >;
350			};
351		};
352
353		bus@c8100000 {
354			compatible = "simple-bus";
355			reg = < 0x00 0xc8100000 0x00 0x100000 >;
356			#address-cells = < 0x02 >;
357			#size-cells = < 0x02 >;
358			ranges = < 0x00 0x00 0x00 0xc8100000 0x00 0x100000 >;
359
360			sys-ctrl@0 {
361				compatible = "amlogic,meson-gx-ao-sysctrl\0simple-mfd\0syscon";
362				reg = < 0x00 0x00 0x00 0x100 >;
363
364				power-controller-vpu {
365					compatible = "amlogic,meson-gx-pwrc-vpu";
366					#power-domain-cells = < 0x00 >;
367					amlogic,hhi-sysctrl = < 0x10 >;
368					resets = < 0x0f 0x05 0x0f 0x0a 0x0f 0x0d 0x0f 0x25 0x0f 0x84 0x0f 0x85 0x0f 0x86 0x0f 0x87 0x0f 0x89 0x0f 0x8c 0x0f 0x8d 0x0f 0xe7 >;
369					clocks = < 0x0c 0x84 0x0c 0x8c >;
370					clock-names = "vpu\0vapb";
371					assigned-clocks = < 0x0c 0x7e 0x0c 0x80 0x0c 0x84 0x0c 0x85 0x0c 0x87 0x0c 0x8b >;
372					assigned-clock-parents = < 0x0c 0x05 0x00 0x0c 0x80 0x0c 0x06 0x00 0x0c 0x87 >;
373					assigned-clock-rates = < 0x00 0x27bc86aa 0x00 0x00 0xee6b280 0x00 >;
374					phandle = < 0x25 >;
375				};
376
377				clock-controller {
378					compatible = "amlogic,meson-gxbb-aoclkc\0amlogic,meson-gx-aoclkc";
379					#clock-cells = < 0x01 >;
380					#reset-cells = < 0x01 >;
381					phandle = < 0x11 >;
382				};
383			};
384
385			cec@100 {
386				compatible = "amlogic,meson-gx-ao-cec";
387				reg = < 0x00 0x100 0x00 0x14 >;
388				interrupts = < 0x00 0xc7 0x01 >;
389				clocks = < 0x11 0x06 >;
390				clock-names = "core";
391				status = "okay";
392				pinctrl-0 = < 0x12 >;
393				pinctrl-names = "default";
394				hdmi-phandle = < 0x13 >;
395			};
396
397			ao-secure@140 {
398				compatible = "amlogic,meson-gx-ao-secure\0syscon";
399				reg = < 0x00 0x140 0x00 0x140 >;
400				amlogic,has-chip-id;
401			};
402
403			serial@4c0 {
404				compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
405				reg = < 0x00 0x4c0 0x00 0x18 >;
406				interrupts = < 0x00 0xc1 0x01 >;
407				status = "okay";
408				clocks = < 0x0b 0x11 0x03 0x0b >;
409				clock-names = "xtal\0pclk\0baud";
410				pinctrl-0 = < 0x14 >;
411				pinctrl-names = "default";
412			};
413
414			serial@4e0 {
415				compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
416				reg = < 0x00 0x4e0 0x00 0x18 >;
417				interrupts = < 0x00 0xc5 0x01 >;
418				status = "disabled";
419				clocks = < 0x0b 0x11 0x04 0x0b >;
420				clock-names = "xtal\0pclk\0baud";
421			};
422
423			i2c@500 {
424				compatible = "amlogic,meson-gx-i2c\0amlogic,meson-gxbb-i2c";
425				reg = < 0x00 0x500 0x00 0x20 >;
426				interrupts = < 0x00 0xc3 0x01 >;
427				#address-cells = < 0x01 >;
428				#size-cells = < 0x00 >;
429				status = "disabled";
430				clocks = < 0x0c 0x5d >;
431			};
432
433			pwm@550 {
434				compatible = "amlogic,meson-gx-ao-pwm\0amlogic,meson-gxbb-ao-pwm";
435				reg = < 0x00 0x550 0x00 0x10 >;
436				#pwm-cells = < 0x03 >;
437				status = "disabled";
438			};
439
440			ir@580 {
441				compatible = "amlogic,meson-gx-ir\0amlogic,meson-gxbb-ir";
442				reg = < 0x00 0x580 0x00 0x40 >;
443				interrupts = < 0x00 0xc4 0x01 >;
444				status = "okay";
445				pinctrl-0 = < 0x15 >;
446				pinctrl-names = "default";
447			};
448
449			pinctrl@14 {
450				compatible = "amlogic,meson-gxbb-aobus-pinctrl";
451				#address-cells = < 0x02 >;
452				#size-cells = < 0x02 >;
453				ranges;
454				gpio-line-names = "UART TX\0UART RX\0VCCK En\0TF 3V3/1V8 En\0USB HUB nRESET\0USB OTG Power En\0J7 Header Pin2\0IR In\0J7 Header Pin4\0J7 Header Pin6\0J7 Header Pin5\0J7 Header Pin7\0HDMI CEC\0SYS LED\0";
455				phandle = < 0x16 >;
456
457				bank@14 {
458					reg = < 0x00 0x14 0x00 0x08 0x00 0x2c 0x00 0x04 0x00 0x24 0x00 0x08 >;
459					reg-names = "mux\0pull\0gpio";
460					gpio-controller;
461					#gpio-cells = < 0x02 >;
462					gpio-ranges = < 0x16 0x00 0x00 0x0e >;
463					phandle = < 0x2e >;
464
465					usb-hub {
466						gpio-hog;
467						gpios = < 0x04 0x00 >;
468						output-high;
469						line-name = "usb-hub-reset";
470					};
471				};
472
473				uart_ao_a {
474					phandle = < 0x14 >;
475
476					mux {
477						groups = "uart_tx_ao_a\0uart_rx_ao_a";
478						function = "uart_ao";
479					};
480				};
481
482				uart_ao_a_cts_rts {
483
484					mux {
485						groups = "uart_cts_ao_a\0uart_rts_ao_a";
486						function = "uart_ao";
487					};
488				};
489
490				uart_ao_b {
491
492					mux {
493						groups = "uart_tx_ao_b\0uart_rx_ao_b";
494						function = "uart_ao_b";
495					};
496				};
497
498				uart_ao_b_cts_rts {
499
500					mux {
501						groups = "uart_cts_ao_b\0uart_rts_ao_b";
502						function = "uart_ao_b";
503					};
504				};
505
506				remote_input_ao {
507					phandle = < 0x15 >;
508
509					mux {
510						groups = "remote_input_ao";
511						function = "remote_input_ao";
512					};
513				};
514
515				i2c_ao {
516
517					mux {
518						groups = "i2c_sck_ao\0i2c_sda_ao";
519						function = "i2c_ao";
520					};
521				};
522
523				pwm_ao_a_3 {
524
525					mux {
526						groups = "pwm_ao_a_3";
527						function = "pwm_ao_a_3";
528					};
529				};
530
531				pwm_ao_a_6 {
532
533					mux {
534						groups = "pwm_ao_a_6";
535						function = "pwm_ao_a_6";
536					};
537				};
538
539				pwm_ao_a_12 {
540
541					mux {
542						groups = "pwm_ao_a_12";
543						function = "pwm_ao_a_12";
544					};
545				};
546
547				pwm_ao_b {
548
549					mux {
550						groups = "pwm_ao_b";
551						function = "pwm_ao_b";
552					};
553				};
554
555				i2s_am_clk {
556
557					mux {
558						groups = "i2s_am_clk";
559						function = "i2s_out_ao";
560					};
561				};
562
563				i2s_out_ao_clk {
564
565					mux {
566						groups = "i2s_out_ao_clk";
567						function = "i2s_out_ao";
568					};
569				};
570
571				i2s_out_lr_clk {
572
573					mux {
574						groups = "i2s_out_lr_clk";
575						function = "i2s_out_ao";
576					};
577				};
578
579				i2s_out_ch01_ao {
580
581					mux {
582						groups = "i2s_out_ch01_ao";
583						function = "i2s_out_ao";
584					};
585				};
586
587				i2s_out_ch23_ao {
588
589					mux {
590						groups = "i2s_out_ch23_ao";
591						function = "i2s_out_ao";
592					};
593				};
594
595				i2s_out_ch45_ao {
596
597					mux {
598						groups = "i2s_out_ch45_ao";
599						function = "i2s_out_ao";
600					};
601				};
602
603				spdif_out_ao_6 {
604
605					mux {
606						groups = "spdif_out_ao_6";
607						function = "spdif_out_ao";
608					};
609				};
610
611				spdif_out_ao_13 {
612
613					mux {
614						groups = "spdif_out_ao_13";
615						function = "spdif_out_ao";
616					};
617				};
618
619				ao_cec {
620					phandle = < 0x12 >;
621
622					mux {
623						groups = "ao_cec";
624						function = "cec_ao";
625					};
626				};
627
628				ee_cec {
629
630					mux {
631						groups = "ee_cec";
632						function = "cec_ao";
633					};
634				};
635			};
636		};
637
638		periphs@c8834000 {
639			compatible = "simple-bus";
640			reg = < 0x00 0xc8834000 0x00 0x2000 >;
641			#address-cells = < 0x02 >;
642			#size-cells = < 0x02 >;
643			ranges = < 0x00 0x00 0x00 0xc8834000 0x00 0x2000 >;
644
645			rng {
646				compatible = "amlogic,meson-rng";
647				reg = < 0x00 0x00 0x00 0x04 >;
648				clocks = < 0x0c 0x19 >;
649				clock-names = "core";
650			};
651
652			pinctrl@4b0 {
653				compatible = "amlogic,meson-gxbb-periphs-pinctrl";
654				#address-cells = < 0x02 >;
655				#size-cells = < 0x02 >;
656				ranges;
657				gpio-line-names = "Eth MDIO\0Eth MDC\0Eth RGMII RX Clk\0Eth RX DV\0Eth RX D0\0Eth RX D1\0Eth RX D2\0Eth RX D3\0Eth RGMII TX Clk\0Eth TX En\0Eth TX D0\0Eth TX D1\0Eth TX D2\0Eth TX D3\0Eth PHY nRESET\0Eth PHY Intc\0HDMI HPD\0HDMI DDC SDA\0HDMI DDC SCL\0\0eMMC D0\0eMMC D1\0eMMC D2\0eMMC D3\0eMMC D4\0eMMC D5\0eMMC D6\0eMMC D7\0eMMC Clk\0eMMC Reset\0eMMC CMD\0\0\0\0\0\0\0\0SDCard D1\0SDCard D0\0SDCard CLK\0SDCard CMD\0SDCard D3\0SDCard D2\0SDCard Det\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0I2C A SDA\0I2C A SCK\0I2C B SDA\0I2C B SCK\0PWM D\0PWM B\0Revision Bit0\0Revision Bit1\0\0J2 Header Pin35\0\0\0\0J2 Header Pin36\0J2 Header Pin31\0\0\0\0TF VDD En\0J2 Header Pin32\0J2 Header Pin26\0\0\0J2 Header Pin29\0J2 Header Pin24\0J2 Header Pin23\0J2 Header Pin22\0J2 Header Pin21\0J2 Header Pin18\0J2 Header Pin33\0J2 Header Pin19\0J2 Header Pin16\0J2 Header Pin15\0J2 Header Pin12\0J2 Header Pin13\0J2 Header Pin8\0J2 Header Pin10\0\0\0\0\0\0J2 Header Pin11\0\0J2 Header Pin7\0\0\0\0\0";
658				phandle = < 0x17 >;
659
660				bank@4b0 {
661					reg = < 0x00 0x4b0 0x00 0x28 0x00 0x4e8 0x00 0x14 0x00 0x520 0x00 0x14 0x00 0x430 0x00 0x40 >;
662					reg-names = "mux\0pull\0pull-enable\0gpio";
663					gpio-controller;
664					#gpio-cells = < 0x02 >;
665					gpio-ranges = < 0x17 0x00 0x00 0x77 >;
666					phandle = < 0x1a >;
667				};
668
669				emmc {
670					phandle = < 0x20 >;
671
672					mux {
673						groups = "emmc_nand_d07\0emmc_cmd\0emmc_clk";
674						function = "emmc";
675					};
676				};
677
678				emmc-ds {
679					phandle = < 0x21 >;
680
681					mux {
682						groups = "emmc_ds";
683						function = "emmc";
684					};
685				};
686
687				emmc_clk_gate {
688					phandle = < 0x22 >;
689
690					mux {
691						groups = "BOOT_8";
692						function = "gpio_periphs";
693					};
694
695					cfg-pull-down {
696						pins = "BOOT_8";
697						bias-pull-down;
698					};
699				};
700
701				nor {
702
703					mux {
704						groups = "nor_d\0nor_q\0nor_c\0nor_cs";
705						function = "nor";
706					};
707				};
708
709				spi-pins {
710
711					mux {
712						groups = "spi_miso\0spi_mosi\0spi_sclk";
713						function = "spi";
714					};
715				};
716
717				spi-ss0 {
718
719					mux {
720						groups = "spi_ss0";
721						function = "spi";
722					};
723				};
724
725				sdcard {
726					phandle = < 0x1c >;
727
728					mux {
729						groups = "sdcard_d0\0sdcard_d1\0sdcard_d2\0sdcard_d3\0sdcard_cmd\0sdcard_clk";
730						function = "sdcard";
731					};
732				};
733
734				sdcard_clk_gate {
735					phandle = < 0x1d >;
736
737					mux {
738						groups = "CARD_2";
739						function = "gpio_periphs";
740					};
741
742					cfg-pull-down {
743						pins = "CARD_2";
744						bias-pull-down;
745					};
746				};
747
748				sdio {
749
750					mux {
751						groups = "sdio_d0\0sdio_d1\0sdio_d2\0sdio_d3\0sdio_cmd\0sdio_clk";
752						function = "sdio";
753					};
754				};
755
756				sdio_clk_gate {
757
758					mux {
759						groups = "GPIOX_4";
760						function = "gpio_periphs";
761					};
762
763					cfg-pull-down {
764						pins = "GPIOX_4";
765						bias-pull-down;
766					};
767				};
768
769				sdio_irq {
770
771					mux {
772						groups = "sdio_irq";
773						function = "sdio";
774					};
775				};
776
777				uart_a {
778
779					mux {
780						groups = "uart_tx_a\0uart_rx_a";
781						function = "uart_a";
782					};
783				};
784
785				uart_a_cts_rts {
786
787					mux {
788						groups = "uart_cts_a\0uart_rts_a";
789						function = "uart_a";
790					};
791				};
792
793				uart_b {
794
795					mux {
796						groups = "uart_tx_b\0uart_rx_b";
797						function = "uart_b";
798					};
799				};
800
801				uart_b_cts_rts {
802
803					mux {
804						groups = "uart_cts_b\0uart_rts_b";
805						function = "uart_b";
806					};
807				};
808
809				uart_c {
810
811					mux {
812						groups = "uart_tx_c\0uart_rx_c";
813						function = "uart_c";
814					};
815				};
816
817				uart_c_cts_rts {
818
819					mux {
820						groups = "uart_cts_c\0uart_rts_c";
821						function = "uart_c";
822					};
823				};
824
825				i2c_a {
826					phandle = < 0x0d >;
827
828					mux {
829						groups = "i2c_sck_a\0i2c_sda_a";
830						function = "i2c_a";
831					};
832				};
833
834				i2c_b {
835
836					mux {
837						groups = "i2c_sck_b\0i2c_sda_b";
838						function = "i2c_b";
839					};
840				};
841
842				i2c_c {
843
844					mux {
845						groups = "i2c_sck_c\0i2c_sda_c";
846						function = "i2c_c";
847					};
848				};
849
850				eth-rgmii {
851					phandle = < 0x18 >;
852
853					mux {
854						groups = "eth_mdio\0eth_mdc\0eth_clk_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_rxd2\0eth_rxd3\0eth_rgmii_tx_clk\0eth_tx_en\0eth_txd0\0eth_txd1\0eth_txd2\0eth_txd3";
855						function = "eth";
856					};
857				};
858
859				eth-rmii {
860
861					mux {
862						groups = "eth_mdio\0eth_mdc\0eth_clk_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_tx_en\0eth_txd0\0eth_txd1";
863						function = "eth";
864					};
865				};
866
867				pwm_a_x {
868
869					mux {
870						groups = "pwm_a_x";
871						function = "pwm_a_x";
872					};
873				};
874
875				pwm_a_y {
876
877					mux {
878						groups = "pwm_a_y";
879						function = "pwm_a_y";
880					};
881				};
882
883				pwm_b {
884
885					mux {
886						groups = "pwm_b";
887						function = "pwm_b";
888					};
889				};
890
891				pwm_d {
892
893					mux {
894						groups = "pwm_d";
895						function = "pwm_d";
896					};
897				};
898
899				pwm_e {
900
901					mux {
902						groups = "pwm_e";
903						function = "pwm_e";
904					};
905				};
906
907				pwm_f_x {
908
909					mux {
910						groups = "pwm_f_x";
911						function = "pwm_f_x";
912					};
913				};
914
915				pwm_f_y {
916
917					mux {
918						groups = "pwm_f_y";
919						function = "pwm_f_y";
920					};
921				};
922
923				hdmi_hpd {
924					phandle = < 0x27 >;
925
926					mux {
927						groups = "hdmi_hpd";
928						function = "hdmi_hpd";
929					};
930				};
931
932				hdmi_i2c {
933					phandle = < 0x28 >;
934
935					mux {
936						groups = "hdmi_sda\0hdmi_scl";
937						function = "hdmi_i2c";
938					};
939				};
940
941				i2sout_ch23_y {
942
943					mux {
944						groups = "i2sout_ch23_y";
945						function = "i2s_out";
946					};
947				};
948
949				i2sout_ch45_y {
950
951					mux {
952						groups = "i2sout_ch45_y";
953						function = "i2s_out";
954					};
955				};
956
957				i2sout_ch67_y {
958
959					mux {
960						groups = "i2sout_ch67_y";
961						function = "i2s_out";
962					};
963				};
964
965				spdif_out_y {
966
967					mux {
968						groups = "spdif_out_y";
969						function = "spdif_out";
970					};
971				};
972			};
973		};
974
975		bus@c8838000 {
976			compatible = "simple-bus";
977			reg = < 0x00 0xc8838000 0x00 0x400 >;
978			#address-cells = < 0x02 >;
979			#size-cells = < 0x02 >;
980			ranges = < 0x00 0x00 0x00 0xc8838000 0x00 0x400 >;
981
982			video-lut@48 {
983				compatible = "amlogic,canvas";
984				reg = < 0x00 0x48 0x00 0x14 >;
985			};
986		};
987
988		bus@c883c000 {
989			compatible = "simple-bus";
990			reg = < 0x00 0xc883c000 0x00 0x2000 >;
991			#address-cells = < 0x02 >;
992			#size-cells = < 0x02 >;
993			ranges = < 0x00 0x00 0x00 0xc883c000 0x00 0x2000 >;
994
995			system-controller@0 {
996				compatible = "amlogic,meson-gx-hhi-sysctrl\0simple-mfd\0syscon";
997				reg = < 0x00 0x00 0x00 0x400 >;
998				phandle = < 0x10 >;
999
1000				clock-controller {
1001					compatible = "amlogic,gxbb-clkc";
1002					#clock-cells = < 0x01 >;
1003					phandle = < 0x0c >;
1004				};
1005			};
1006
1007			mailbox@404 {
1008				compatible = "amlogic,meson-gx-mhu\0amlogic,meson-gxbb-mhu";
1009				reg = < 0x00 0x404 0x00 0x4c >;
1010				interrupts = < 0x00 0xd0 0x01 0x00 0xd1 0x01 0x00 0xd2 0x01 >;
1011				#mbox-cells = < 0x01 >;
1012				phandle = < 0x08 >;
1013			};
1014		};
1015
1016		ethernet@c9410000 {
1017			compatible = "amlogic,meson-gx-dwmac\0amlogic,meson-gxbb-dwmac\0snps,dwmac";
1018			reg = < 0x00 0xc9410000 0x00 0x10000 0x00 0xc8834540 0x00 0x04 >;
1019			interrupts = < 0x00 0x08 0x01 >;
1020			interrupt-names = "macirq";
1021			status = "okay";
1022			clocks = < 0x0c 0x24 0x0c 0x04 0x0c 0x0f >;
1023			clock-names = "stmmaceth\0clkin0\0clkin1";
1024			pinctrl-0 = < 0x18 >;
1025			pinctrl-names = "default";
1026			phy-handle = < 0x19 >;
1027			phy-mode = "rgmii";
1028			snps,reset-gpio = < 0x1a 0x0e 0x00 >;
1029			snps,reset-delays-us = < 0x00 0x2710 0xf4240 >;
1030			snps,reset-active-low;
1031			amlogic,tx-delay-ns = < 0x02 >;
1032
1033			mdio {
1034				compatible = "snps,dwmac-mdio";
1035				#address-cells = < 0x01 >;
1036				#size-cells = < 0x00 >;
1037
1038				ethernet-phy@0 {
1039					reg = < 0x00 >;
1040					interrupt-parent = < 0x1b >;
1041					interrupts = < 0x1d 0x08 >;
1042					eee-broken-1000t;
1043					phandle = < 0x19 >;
1044				};
1045			};
1046		};
1047
1048		apb@d0000000 {
1049			compatible = "simple-bus";
1050			reg = < 0x00 0xd0000000 0x00 0x200000 >;
1051			#address-cells = < 0x02 >;
1052			#size-cells = < 0x02 >;
1053			ranges = < 0x00 0x00 0x00 0xd0000000 0x00 0x200000 >;
1054
1055			mmc@70000 {
1056				compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
1057				reg = < 0x00 0x70000 0x00 0x800 >;
1058				interrupts = < 0x00 0xd8 0x01 >;
1059				status = "disabled";
1060				clocks = < 0x0c 0x5e 0x0c 0x77 0x0c 0x04 >;
1061				clock-names = "core\0clkin0\0clkin1";
1062				resets = < 0x0f 0x2c >;
1063			};
1064
1065			mmc@72000 {
1066				compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
1067				reg = < 0x00 0x72000 0x00 0x800 >;
1068				interrupts = < 0x00 0xd9 0x01 >;
1069				status = "okay";
1070				clocks = < 0x0c 0x5f 0x0c 0x7a 0x0c 0x04 >;
1071				clock-names = "core\0clkin0\0clkin1";
1072				resets = < 0x0f 0x2d >;
1073				pinctrl-0 = < 0x1c >;
1074				pinctrl-1 = < 0x1d >;
1075				pinctrl-names = "default\0clk-gate";
1076				bus-width = < 0x04 >;
1077				cap-sd-highspeed;
1078				max-frequency = < 0x5f5e100 >;
1079				disable-wp;
1080				cd-gpios = < 0x1a 0x2c 0x00 >;
1081				cd-inverted;
1082				vmmc-supply = < 0x1e >;
1083				vqmmc-supply = < 0x1f >;
1084			};
1085
1086			mmc@74000 {
1087				compatible = "amlogic,meson-gx-mmc\0amlogic,meson-gxbb-mmc";
1088				reg = < 0x00 0x74000 0x00 0x800 >;
1089				interrupts = < 0x00 0xda 0x01 >;
1090				status = "okay";
1091				clocks = < 0x0c 0x60 0x0c 0x7d 0x0c 0x04 >;
1092				clock-names = "core\0clkin0\0clkin1";
1093				resets = < 0x0f 0x2e >;
1094				pinctrl-0 = < 0x20 0x21 >;
1095				pinctrl-1 = < 0x22 >;
1096				pinctrl-names = "default\0clk-gate";
1097				bus-width = < 0x08 >;
1098				max-frequency = < 0x5f5e100 >;
1099				non-removable;
1100				disable-wp;
1101				cap-mmc-highspeed;
1102				mmc-ddr-1_8v;
1103				mmc-hs200-1_8v;
1104				mmc-pwrseq = < 0x23 >;
1105				vmmc-supply = < 0x24 >;
1106				vqmmc-supply = < 0x0e >;
1107			};
1108
1109			gpu@c0000 {
1110				compatible = "amlogic,meson-gxbb-mali\0arm,mali-450";
1111				reg = < 0x00 0xc0000 0x00 0x40000 >;
1112				interrupts = < 0x00 0xa0 0x04 0x00 0xa1 0x04 0x00 0xa2 0x04 0x00 0xa3 0x04 0x00 0xa4 0x04 0x00 0xa5 0x04 0x00 0xa6 0x04 0x00 0xa7 0x04 0x00 0xa8 0x04 0x00 0xa9 0x04 >;
1113				interrupt-names = "gp\0gpmmu\0pp\0pmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pp2\0ppmmu2";
1114				clocks = < 0x0c 0x0c 0x0c 0x6a >;
1115				clock-names = "bus\0core";
1116				assigned-clocks = < 0x0c 0x09 0x0c 0x64 0x0c 0x66 0x0c 0x6a >;
1117				assigned-clock-parents = < 0x00 0x0c 0x09 0x00 0x0c 0x66 >;
1118				assigned-clock-rates = < 0x2c588a00 0x00 0x2c588a00 0x00 >;
1119			};
1120		};
1121
1122		vpu@d0100000 {
1123			compatible = "amlogic,meson-gxbb-vpu\0amlogic,meson-gx-vpu";
1124			reg = < 0x00 0xd0100000 0x00 0x100000 0x00 0xc883c000 0x00 0x1000 0x00 0xc8838000 0x00 0x1000 >;
1125			reg-names = "vpu\0hhi\0dmc";
1126			interrupts = < 0x00 0x03 0x01 >;
1127			#address-cells = < 0x01 >;
1128			#size-cells = < 0x00 >;
1129			power-domains = < 0x25 >;
1130
1131			port@0 {
1132				reg = < 0x00 >;
1133			};
1134
1135			port@1 {
1136				reg = < 0x01 >;
1137
1138				endpoint {
1139					remote-endpoint = < 0x26 >;
1140					phandle = < 0x29 >;
1141				};
1142			};
1143		};
1144
1145		hdmi-tx@c883a000 {
1146			compatible = "amlogic,meson-gxbb-dw-hdmi\0amlogic,meson-gx-dw-hdmi";
1147			reg = < 0x00 0xc883a000 0x00 0x1c >;
1148			interrupts = < 0x00 0x39 0x01 >;
1149			#address-cells = < 0x01 >;
1150			#size-cells = < 0x00 >;
1151			status = "okay";
1152			resets = < 0x0f 0x13 0x0f 0x4f 0x0f 0x42 >;
1153			reset-names = "hdmitx_apb\0hdmitx\0hdmitx_phy";
1154			clocks = < 0x0c 0x3f 0x0c 0x0c 0x0c 0x4d >;
1155			clock-names = "isfr\0iahb\0venci";
1156			pinctrl-0 = < 0x27 0x28 >;
1157			pinctrl-names = "default";
1158			phandle = < 0x13 >;
1159
1160			port@0 {
1161				reg = < 0x00 >;
1162
1163				endpoint {
1164					remote-endpoint = < 0x29 >;
1165					phandle = < 0x26 >;
1166				};
1167			};
1168
1169			port@1 {
1170				reg = < 0x01 >;
1171
1172				endpoint {
1173					remote-endpoint = < 0x2a >;
1174					phandle = < 0x2f >;
1175				};
1176			};
1177		};
1178
1179		phy@c0000000 {
1180			compatible = "amlogic,meson-gxbb-usb2-phy";
1181			#phy-cells = < 0x00 >;
1182			reg = < 0x00 0xc0000000 0x00 0x20 >;
1183			resets = < 0x0f 0x22 >;
1184			clocks = < 0x0c 0x37 0x0c 0x32 >;
1185			clock-names = "usb_general\0usb";
1186			status = "okay";
1187			phy-supply = < 0x2b >;
1188			phandle = < 0x2c >;
1189		};
1190
1191		phy@c0000020 {
1192			compatible = "amlogic,meson-gxbb-usb2-phy";
1193			#phy-cells = < 0x00 >;
1194			reg = < 0x00 0xc0000020 0x00 0x20 >;
1195			resets = < 0x0f 0x22 >;
1196			clocks = < 0x0c 0x37 0x0c 0x33 >;
1197			clock-names = "usb_general\0usb";
1198			status = "okay";
1199			phy-supply = < 0x2b >;
1200			phandle = < 0x2d >;
1201		};
1202
1203		usb@c9000000 {
1204			compatible = "amlogic,meson-gxbb-usb\0snps,dwc2";
1205			reg = < 0x00 0xc9000000 0x00 0x40000 >;
1206			interrupts = < 0x00 0x1e 0x04 >;
1207			clocks = < 0x0c 0x41 >;
1208			clock-names = "otg";
1209			phys = < 0x2c >;
1210			phy-names = "usb2-phy";
1211			dr_mode = "host";
1212			status = "okay";
1213		};
1214
1215		usb@c9100000 {
1216			compatible = "amlogic,meson-gxbb-usb\0snps,dwc2";
1217			reg = < 0x00 0xc9100000 0x00 0x40000 >;
1218			interrupts = < 0x00 0x1f 0x04 >;
1219			clocks = < 0x0c 0x40 >;
1220			clock-names = "otg";
1221			phys = < 0x2d >;
1222			phy-names = "usb2-phy";
1223			dr_mode = "host";
1224			status = "okay";
1225		};
1226	};
1227
1228	aliases {
1229		serial0 = "/soc/bus@c8100000/serial@4c0";
1230		ethernet0 = "/soc/ethernet@c9410000";
1231	};
1232
1233	chosen {
1234		stdout-path = "serial0:115200n8";
1235	};
1236
1237	memory@0 {
1238		device_type = "memory";
1239		reg = < 0x00 0x00 0x00 0x80000000 >;
1240	};
1241
1242	regulator-usb-pwrs {
1243		compatible = "regulator-fixed";
1244		regulator-name = "USB_OTG_PWR";
1245		regulator-min-microvolt = < 0x4c4b40 >;
1246		regulator-max-microvolt = < 0x4c4b40 >;
1247		gpio = < 0x2e 0x05 0x00 >;
1248		enable-active-high;
1249		phandle = < 0x2b >;
1250	};
1251
1252	leds {
1253		compatible = "gpio-leds";
1254
1255		blue {
1256			label = "c2:blue:alive";
1257			gpios = < 0x2e 0x0d 0x01 >;
1258			linux,default-trigger = "heartbeat";
1259			default-state = "off";
1260		};
1261	};
1262
1263	regulator-tflash_vdd {
1264		compatible = "regulator-fixed";
1265		regulator-name = "TFLASH_VDD";
1266		regulator-min-microvolt = < 0x325aa0 >;
1267		regulator-max-microvolt = < 0x325aa0 >;
1268		gpio = < 0x1a 0x57 0x00 >;
1269		enable-active-high;
1270		phandle = < 0x1e >;
1271	};
1272
1273	gpio-regulator-tf_io {
1274		compatible = "regulator-gpio";
1275		regulator-name = "TF_IO";
1276		regulator-min-microvolt = < 0x1b7740 >;
1277		regulator-max-microvolt = < 0x325aa0 >;
1278		gpios = < 0x2e 0x03 0x00 >;
1279		gpios-states = < 0x00 >;
1280		states = < 0x325aa0 0x00 0x1b7740 0x01 >;
1281		phandle = < 0x1f >;
1282	};
1283
1284	regulator-vcc1v8 {
1285		compatible = "regulator-fixed";
1286		regulator-name = "VCC1V8";
1287		regulator-min-microvolt = < 0x1b7740 >;
1288		regulator-max-microvolt = < 0x1b7740 >;
1289		phandle = < 0x0e >;
1290	};
1291
1292	regulator-vcc3v3 {
1293		compatible = "regulator-fixed";
1294		regulator-name = "VCC3V3";
1295		regulator-min-microvolt = < 0x325aa0 >;
1296		regulator-max-microvolt = < 0x325aa0 >;
1297		phandle = < 0x24 >;
1298	};
1299
1300	emmc-pwrseq {
1301		compatible = "mmc-pwrseq-emmc";
1302		reset-gpios = < 0x1a 0x1d 0x01 >;
1303		phandle = < 0x23 >;
1304	};
1305
1306	hdmi-connector {
1307		compatible = "hdmi-connector";
1308		type = [ 61 00 ];
1309
1310		port {
1311
1312			endpoint {
1313				remote-endpoint = < 0x2f >;
1314				phandle = < 0x2a >;
1315			};
1316		};
1317	};
1318};
1319