1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 interrupt-parent = < 0x01 >; 15 #address-cells = < 0x01 >; 16 #size-cells = < 0x01 >; 17 compatible = "hardkernel,odroid-xu\0samsung,exynos5410\0samsung,exynos5"; 18 model = "Hardkernel Odroid XU"; 19 20 aliases { 21 i2c0 = "/soc/i2c@12c60000"; 22 i2c1 = "/soc/i2c@12c70000"; 23 i2c2 = "/soc/i2c@12c80000"; 24 i2c3 = "/soc/i2c@12c90000"; 25 serial0 = "/soc/serial@12c00000"; 26 serial1 = "/soc/serial@12c10000"; 27 serial2 = "/soc/serial@12c20000"; 28 serial3 = "/soc/serial@12c30000"; 29 i2c4 = "/soc/i2c@12ca0000"; 30 i2c5 = "/soc/i2c@12cb0000"; 31 i2c6 = "/soc/i2c@12cc0000"; 32 i2c7 = "/soc/i2c@12cd0000"; 33 usbdrdphy0 = "/soc/phy@12100000"; 34 usbdrdphy1 = "/soc/phy@12500000"; 35 pinctrl0 = "/soc/pinctrl@13400000"; 36 pinctrl1 = "/soc/pinctrl@14000000"; 37 pinctrl2 = "/soc/pinctrl@10d10000"; 38 pinctrl3 = "/soc/pinctrl@3860000"; 39 }; 40 41 soc { 42 compatible = "simple-bus"; 43 #address-cells = < 0x01 >; 44 #size-cells = < 0x01 >; 45 ranges; 46 47 chipid@10000000 { 48 compatible = "samsung,exynos4210-chipid"; 49 reg = < 0x10000000 0x100 >; 50 }; 51 52 memory-controller@12250000 { 53 compatible = "samsung,exynos4210-srom"; 54 reg = < 0x12250000 0x14 >; 55 #address-cells = < 0x02 >; 56 #size-cells = < 0x01 >; 57 ranges = < 0x00 0x00 0x4000000 0x20000 0x01 0x00 0x5000000 0x20000 0x02 0x00 0x6000000 0x20000 0x03 0x00 0x7000000 0x20000 >; 58 }; 59 60 interrupt-controller@10440000 { 61 compatible = "samsung,exynos4210-combiner"; 62 #interrupt-cells = < 0x02 >; 63 interrupt-controller; 64 samsung,combiner-nr = < 0x20 >; 65 reg = < 0x10440000 0x1000 >; 66 interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x06 0x04 0x00 0x07 0x04 0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04 0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x17 0x04 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 >; 67 phandle = < 0x11 >; 68 }; 69 70 interrupt-controller@10481000 { 71 compatible = "arm,gic-400\0arm,cortex-a15-gic\0arm,cortex-a9-gic"; 72 #interrupt-cells = < 0x03 >; 73 interrupt-controller; 74 reg = < 0x10481000 0x1000 0x10482000 0x2000 0x10484000 0x2000 0x10486000 0x2000 >; 75 interrupts = < 0x01 0x09 0xf04 >; 76 phandle = < 0x01 >; 77 }; 78 79 syscon@10050000 { 80 compatible = "samsung,exynos5-sysreg\0syscon"; 81 reg = < 0x10050000 0x5000 >; 82 phandle = < 0x05 >; 83 }; 84 85 serial@12c00000 { 86 compatible = "samsung,exynos4210-uart"; 87 reg = < 0x12c00000 0x100 >; 88 interrupts = < 0x00 0x33 0x04 >; 89 clocks = < 0x02 0x101 0x02 0x80 >; 90 clock-names = "uart\0clk_uart_baud0"; 91 dmas = < 0x03 0x0d 0x03 0x0e >; 92 dma-names = "rx\0tx"; 93 status = "okay"; 94 }; 95 96 serial@12c10000 { 97 compatible = "samsung,exynos4210-uart"; 98 reg = < 0x12c10000 0x100 >; 99 interrupts = < 0x00 0x34 0x04 >; 100 clocks = < 0x02 0x102 0x02 0x81 >; 101 clock-names = "uart\0clk_uart_baud0"; 102 dmas = < 0x04 0x0f 0x04 0x10 >; 103 dma-names = "rx\0tx"; 104 status = "okay"; 105 }; 106 107 serial@12c20000 { 108 compatible = "samsung,exynos4210-uart"; 109 reg = < 0x12c20000 0x100 >; 110 interrupts = < 0x00 0x35 0x04 >; 111 clocks = < 0x02 0x103 0x02 0x82 >; 112 clock-names = "uart\0clk_uart_baud0"; 113 dmas = < 0x03 0x0f 0x03 0x10 >; 114 dma-names = "rx\0tx"; 115 status = "okay"; 116 }; 117 118 serial@12c30000 { 119 compatible = "samsung,exynos4210-uart"; 120 reg = < 0x12c30000 0x100 >; 121 interrupts = < 0x00 0x36 0x04 >; 122 clocks = < 0x02 0x104 0x02 0x83 >; 123 clock-names = "uart\0clk_uart_baud0"; 124 dmas = < 0x04 0x11 0x04 0x12 >; 125 dma-names = "rx\0tx"; 126 status = "okay"; 127 }; 128 129 i2c@12c60000 { 130 compatible = "samsung,s3c2440-i2c"; 131 reg = < 0x12c60000 0x100 >; 132 interrupts = < 0x00 0x38 0x04 >; 133 #address-cells = < 0x01 >; 134 #size-cells = < 0x00 >; 135 samsung,sysreg-phandle = < 0x05 >; 136 status = "disabled"; 137 clocks = < 0x02 0x105 >; 138 clock-names = "i2c"; 139 pinctrl-names = "default"; 140 pinctrl-0 = < 0x06 >; 141 }; 142 143 i2c@12c70000 { 144 compatible = "samsung,s3c2440-i2c"; 145 reg = < 0x12c70000 0x100 >; 146 interrupts = < 0x00 0x39 0x04 >; 147 #address-cells = < 0x01 >; 148 #size-cells = < 0x00 >; 149 samsung,sysreg-phandle = < 0x05 >; 150 status = "okay"; 151 clocks = < 0x02 0x106 >; 152 clock-names = "i2c"; 153 pinctrl-names = "default"; 154 pinctrl-0 = < 0x07 >; 155 156 max98090@10 { 157 compatible = "maxim,max98090"; 158 reg = < 0x10 >; 159 interrupt-parent = < 0x08 >; 160 interrupts = < 0x00 0x00 >; 161 clocks = < 0x09 0x00 >; 162 clock-names = "mclk"; 163 #sound-dai-cells = < 0x00 >; 164 phandle = < 0x4e >; 165 }; 166 }; 167 168 i2c@12c80000 { 169 compatible = "samsung,s3c2440-i2c"; 170 reg = < 0x12c80000 0x100 >; 171 interrupts = < 0x00 0x3a 0x04 >; 172 #address-cells = < 0x01 >; 173 #size-cells = < 0x00 >; 174 samsung,sysreg-phandle = < 0x05 >; 175 status = "disabled"; 176 clocks = < 0x02 0x107 >; 177 clock-names = "i2c"; 178 pinctrl-names = "default"; 179 pinctrl-0 = < 0x0a >; 180 }; 181 182 i2c@12c90000 { 183 compatible = "samsung,s3c2440-i2c"; 184 reg = < 0x12c90000 0x100 >; 185 interrupts = < 0x00 0x3b 0x04 >; 186 #address-cells = < 0x01 >; 187 #size-cells = < 0x00 >; 188 samsung,sysreg-phandle = < 0x05 >; 189 status = "disabled"; 190 clocks = < 0x02 0x108 >; 191 clock-names = "i2c"; 192 pinctrl-names = "default"; 193 pinctrl-0 = < 0x0b >; 194 }; 195 196 pwm@12dd0000 { 197 compatible = "samsung,exynos4210-pwm"; 198 reg = < 0x12dd0000 0x100 >; 199 interrupts = < 0x00 0x24 0x04 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 >; 200 samsung,pwm-outputs = < 0x00 0x01 0x02 0x03 >; 201 #pwm-cells = < 0x03 >; 202 clocks = < 0x02 0x117 >; 203 clock-names = "timers"; 204 pinctrl-0 = < 0x0c 0x0d 0x0e 0x0f >; 205 pinctrl-names = "default"; 206 status = "okay"; 207 phandle = < 0x49 >; 208 }; 209 210 rtc@101e0000 { 211 compatible = "samsung,s3c6410-rtc"; 212 reg = < 0x101e0000 0x100 >; 213 interrupts = < 0x00 0x2b 0x04 0x00 0x2c 0x04 >; 214 status = "okay"; 215 clocks = < 0x02 0x13d 0x10 0x00 >; 216 clock-names = "rtc\0rtc_src"; 217 }; 218 219 fimd@14400000 { 220 compatible = "samsung,exynos5250-fimd"; 221 interrupt-parent = < 0x11 >; 222 reg = < 0x14400000 0x40000 >; 223 interrupt-names = "fifo\0vsync\0lcd_sys"; 224 interrupts = < 0x12 0x04 0x12 0x05 0x12 0x06 >; 225 samsung,sysreg = < 0x05 >; 226 status = "disabled"; 227 }; 228 229 dp-controller@145b0000 { 230 compatible = "samsung,exynos5-dp"; 231 reg = < 0x145b0000 0x1000 >; 232 interrupts = < 0x0a 0x03 >; 233 interrupt-parent = < 0x11 >; 234 status = "disabled"; 235 }; 236 237 sss@10830000 { 238 compatible = "samsung,exynos4210-secss"; 239 reg = < 0x10830000 0x300 >; 240 interrupts = < 0x00 0x70 0x04 >; 241 clocks = < 0x02 0x1d7 >; 242 clock-names = "secss"; 243 }; 244 245 rng@10830400 { 246 compatible = "samsung,exynos5250-prng"; 247 reg = < 0x10830400 0x200 >; 248 clocks = < 0x02 0x1d7 >; 249 clock-names = "secss"; 250 }; 251 252 rng@10830600 { 253 compatible = "samsung,exynos5250-trng"; 254 reg = < 0x10830600 0x100 >; 255 clocks = < 0x02 0x1d7 >; 256 clock-names = "secss"; 257 }; 258 259 g2d@10850000 { 260 compatible = "samsung,exynos5250-g2d"; 261 reg = < 0x10850000 0x1000 >; 262 interrupts = < 0x00 0x5b 0x04 >; 263 status = "disabled"; 264 }; 265 266 arm-a7-pmu { 267 compatible = "arm,cortex-a7-pmu"; 268 interrupt-parent = < 0x01 >; 269 interrupts = < 0x00 0xa0 0x04 0x00 0xa1 0x04 0x00 0xa2 0x04 0x00 0xa3 0x04 >; 270 status = "disabled"; 271 }; 272 273 arm-a15-pmu { 274 compatible = "arm,cortex-a15-pmu"; 275 interrupt-parent = < 0x11 >; 276 interrupts = < 0x01 0x02 0x07 0x00 0x10 0x06 0x13 0x02 >; 277 status = "okay"; 278 interrupt-affinity = < 0x12 0x13 0x14 0x15 >; 279 }; 280 281 sysram@2020000 { 282 compatible = "mmio-sram"; 283 reg = < 0x2020000 0x54000 >; 284 #address-cells = < 0x01 >; 285 #size-cells = < 0x01 >; 286 ranges = < 0x00 0x2020000 0x54000 >; 287 288 smp-sysram@0 { 289 compatible = "samsung,exynos4210-sysram"; 290 reg = < 0x00 0x1000 >; 291 }; 292 293 smp-sysram@53000 { 294 compatible = "samsung,exynos4210-sysram-ns"; 295 reg = < 0x53000 0x1000 >; 296 }; 297 }; 298 299 mct@101c0000 { 300 compatible = "samsung,exynos4210-mct"; 301 reg = < 0x101c0000 0xb00 >; 302 interrupt-parent = < 0x16 >; 303 interrupts = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b >; 304 clocks = < 0x17 0x02 0x13b >; 305 clock-names = "fin_pll\0mct"; 306 307 mct-map { 308 #interrupt-cells = < 0x01 >; 309 #address-cells = < 0x00 >; 310 #size-cells = < 0x00 >; 311 interrupt-map = < 0x00 0x11 0x17 0x03 0x01 0x11 0x17 0x04 0x02 0x11 0x19 0x02 0x03 0x11 0x19 0x03 0x04 0x01 0x00 0x78 0x04 0x05 0x01 0x00 0x79 0x04 0x06 0x01 0x00 0x7a 0x04 0x07 0x01 0x00 0x7b 0x04 0x08 0x01 0x00 0x80 0x04 0x09 0x01 0x00 0x81 0x04 0x0a 0x01 0x00 0x82 0x04 0x0b 0x01 0x00 0x83 0x04 >; 312 phandle = < 0x16 >; 313 }; 314 }; 315 316 watchdog@101d0000 { 317 compatible = "samsung,exynos5420-wdt"; 318 reg = < 0x101d0000 0x100 >; 319 interrupts = < 0x00 0x2a 0x04 >; 320 clocks = < 0x02 0x13c >; 321 clock-names = "watchdog"; 322 samsung,syscon-phandle = < 0x18 >; 323 }; 324 325 i2c@12ca0000 { 326 compatible = "samsung,exynos5250-hsi2c"; 327 reg = < 0x12ca0000 0x1000 >; 328 interrupts = < 0x00 0x3c 0x04 >; 329 #address-cells = < 0x01 >; 330 #size-cells = < 0x00 >; 331 status = "okay"; 332 clocks = < 0x02 0x109 >; 333 clock-names = "hsi2c"; 334 pinctrl-names = "default"; 335 pinctrl-0 = < 0x19 >; 336 samsung,i2c-sda-delay = < 0x64 >; 337 samsung,i2c-max-bus-freq = < 0x61a80 >; 338 339 usb-hub@8 { 340 compatible = "smsc,usb3503"; 341 reg = < 0x08 >; 342 intn-gpios = < 0x1a 0x07 0x00 >; 343 connect-gpios = < 0x1a 0x06 0x00 >; 344 reset-gpios = < 0x1b 0x04 0x00 >; 345 initial-mode = < 0x01 >; 346 clock-names = "refclk"; 347 clocks = < 0x18 0x00 >; 348 refclk-frequency = < 0x16e3600 >; 349 }; 350 351 pmic@9 { 352 compatible = "maxim,max77802"; 353 reg = < 0x09 >; 354 interrupt-parent = < 0x1a >; 355 interrupts = < 0x04 0x00 >; 356 pinctrl-names = "default"; 357 pinctrl-0 = < 0x1c 0x1d 0x1e 0x1f >; 358 #clock-cells = < 0x01 >; 359 inl1-supply = < 0x20 >; 360 inl2-supply = < 0x21 >; 361 inl3-supply = < 0x22 >; 362 inl4-supply = < 0x22 >; 363 inl5-supply = < 0x22 >; 364 inl6-supply = < 0x23 >; 365 inl7-supply = < 0x22 >; 366 inl10-supply = < 0x21 >; 367 phandle = < 0x10 >; 368 369 regulators { 370 371 BUCK1 { 372 regulator-name = "vdd_mif"; 373 regulator-min-microvolt = < 0xc3500 >; 374 regulator-max-microvolt = < 0x13d620 >; 375 regulator-always-on; 376 regulator-boot-on; 377 }; 378 379 BUCK2 { 380 regulator-name = "vdd_arm"; 381 regulator-min-microvolt = < 0xc3500 >; 382 regulator-max-microvolt = < 0x16e360 >; 383 regulator-always-on; 384 regulator-boot-on; 385 }; 386 387 BUCK3 { 388 regulator-name = "vdd_int"; 389 regulator-min-microvolt = < 0xc3500 >; 390 regulator-max-microvolt = < 0x155cc0 >; 391 regulator-always-on; 392 regulator-boot-on; 393 }; 394 395 BUCK4 { 396 regulator-name = "vdd_g3d"; 397 regulator-min-microvolt = < 0xc3500 >; 398 regulator-max-microvolt = < 0x155cc0 >; 399 regulator-always-on; 400 regulator-boot-on; 401 }; 402 403 BUCK5 { 404 regulator-name = "vdd_mem"; 405 regulator-min-microvolt = < 0xc3500 >; 406 regulator-max-microvolt = < 0x16e360 >; 407 regulator-always-on; 408 regulator-boot-on; 409 phandle = < 0x20 >; 410 }; 411 412 BUCK6 { 413 regulator-name = "vdd_kfc"; 414 regulator-min-microvolt = < 0xc3500 >; 415 regulator-max-microvolt = < 0x16e360 >; 416 regulator-always-on; 417 regulator-boot-on; 418 }; 419 420 BUCK7 { 421 regulator-name = "buck7"; 422 regulator-min-microvolt = < 0x13d620 >; 423 regulator-max-microvolt = < 0x13d620 >; 424 regulator-always-on; 425 regulator-boot-on; 426 phandle = < 0x21 >; 427 }; 428 429 BUCK8 { 430 regulator-name = "vddf_2v85"; 431 regulator-min-microvolt = < 0x2b7cd0 >; 432 regulator-max-microvolt = < 0x2b7cd0 >; 433 regulator-always-on; 434 regulator-boot-on; 435 }; 436 437 BUCK9 { 438 regulator-name = "buck9"; 439 regulator-min-microvolt = < 0x2dc6c0 >; 440 regulator-max-microvolt = < 0x2dc6c0 >; 441 regulator-always-on; 442 regulator-boot-on; 443 phandle = < 0x22 >; 444 }; 445 446 BUCK10 { 447 regulator-name = "buck10"; 448 regulator-min-microvolt = < 0x2d0370 >; 449 regulator-max-microvolt = < 0x2d0370 >; 450 regulator-always-on; 451 regulator-boot-on; 452 phandle = < 0x23 >; 453 }; 454 455 LDO1 { 456 regulator-name = "vdd_alive"; 457 regulator-min-microvolt = < 0xf4240 >; 458 regulator-max-microvolt = < 0xf4240 >; 459 regulator-always-on; 460 }; 461 462 LDO2 { 463 regulator-name = "vddq_m1_m2"; 464 regulator-min-microvolt = < 0x124f80 >; 465 regulator-max-microvolt = < 0x124f80 >; 466 regulator-always-on; 467 }; 468 469 LDO3 { 470 regulator-name = "vddq_gpio"; 471 regulator-min-microvolt = < 0x1b7740 >; 472 regulator-max-microvolt = < 0x1b7740 >; 473 regulator-always-on; 474 }; 475 476 LDO4 { 477 regulator-name = "vddq_mmc2"; 478 regulator-min-microvolt = < 0x1b7740 >; 479 regulator-max-microvolt = < 0x2dc6c0 >; 480 regulator-always-on; 481 phandle = < 0x3f >; 482 }; 483 484 LDO5 { 485 regulator-name = "vdd18_hsic"; 486 regulator-min-microvolt = < 0x1b7740 >; 487 regulator-max-microvolt = < 0x1b7740 >; 488 regulator-always-on; 489 }; 490 491 LDO6 { 492 regulator-name = "vdd18_bpll"; 493 regulator-min-microvolt = < 0x1b7740 >; 494 regulator-max-microvolt = < 0x1b7740 >; 495 regulator-always-on; 496 }; 497 498 LDO7 { 499 regulator-name = "vddq_lcd"; 500 regulator-min-microvolt = < 0x1b7740 >; 501 regulator-max-microvolt = < 0x1b7740 >; 502 }; 503 504 LDO8 { 505 regulator-name = "vdd10_hdmi"; 506 regulator-min-microvolt = < 0xf4240 >; 507 regulator-max-microvolt = < 0xf4240 >; 508 regulator-always-on; 509 }; 510 511 LDO9 { 512 regulator-name = "ldo9"; 513 }; 514 515 LDO10 { 516 regulator-name = "vdd18_mipi"; 517 regulator-min-microvolt = < 0x1b7740 >; 518 regulator-max-microvolt = < 0x1b7740 >; 519 regulator-always-on; 520 phandle = < 0x2d >; 521 }; 522 523 LDO11 { 524 regulator-name = "vddq_mmc01"; 525 regulator-min-microvolt = < 0x1b7740 >; 526 regulator-max-microvolt = < 0x1b7740 >; 527 regulator-always-on; 528 phandle = < 0x37 >; 529 }; 530 531 LDO12 { 532 regulator-name = "vdd33_usb3"; 533 regulator-min-microvolt = < 0x325aa0 >; 534 regulator-max-microvolt = < 0x325aa0 >; 535 regulator-always-on; 536 phandle = < 0x27 >; 537 }; 538 539 LDO13 { 540 regulator-name = "vddq_abbg0"; 541 regulator-min-microvolt = < 0x1b7740 >; 542 regulator-max-microvolt = < 0x1b7740 >; 543 regulator-always-on; 544 }; 545 546 LDO14 { 547 regulator-name = "vddq_abbg1"; 548 regulator-min-microvolt = < 0x1b7740 >; 549 regulator-max-microvolt = < 0x1b7740 >; 550 regulator-always-on; 551 }; 552 553 LDO15 { 554 regulator-name = "vdd10_usb3"; 555 regulator-min-microvolt = < 0xf4240 >; 556 regulator-max-microvolt = < 0xf4240 >; 557 regulator-always-on; 558 phandle = < 0x28 >; 559 }; 560 561 LDO16 { 562 regulator-name = "ldo16"; 563 }; 564 565 LDO17 { 566 regulator-name = "cam_sensor_core"; 567 regulator-min-microvolt = < 0x124f80 >; 568 regulator-max-microvolt = < 0x124f80 >; 569 }; 570 571 LDO18 { 572 regulator-name = "ldo18"; 573 regulator-min-microvolt = < 0x1b7740 >; 574 regulator-max-microvolt = < 0x1b7740 >; 575 }; 576 577 LDO19 { 578 regulator-name = "ldo19"; 579 }; 580 581 LDO20 { 582 regulator-name = "vdd_mmc0"; 583 regulator-min-microvolt = < 0x1b7740 >; 584 regulator-max-microvolt = < 0x1b7740 >; 585 phandle = < 0x36 >; 586 }; 587 588 LDO21 { 589 regulator-name = "vddf_2v8"; 590 regulator-min-microvolt = < 0x2b7cd0 >; 591 regulator-max-microvolt = < 0x2b7cd0 >; 592 phandle = < 0x3e >; 593 }; 594 595 LDO22 { 596 regulator-name = "ldo22"; 597 }; 598 599 LDO23 { 600 regulator-name = "dp_p3v3"; 601 regulator-min-microvolt = < 0x325aa0 >; 602 regulator-max-microvolt = < 0x325aa0 >; 603 regulator-always-on; 604 }; 605 606 LDO24 { 607 regulator-name = "cam_af"; 608 regulator-min-microvolt = < 0x2ab980 >; 609 regulator-max-microvolt = < 0x2ab980 >; 610 }; 611 612 LDO25 { 613 regulator-name = "eth_p3v3"; 614 regulator-min-microvolt = < 0x325aa0 >; 615 regulator-max-microvolt = < 0x325aa0 >; 616 regulator-always-on; 617 }; 618 619 LDO26 { 620 regulator-name = "usb30_extclk"; 621 regulator-min-microvolt = < 0x325aa0 >; 622 regulator-max-microvolt = < 0x325aa0 >; 623 regulator-always-on; 624 }; 625 626 LDO27 { 627 regulator-name = "ldo27"; 628 }; 629 630 LDO28 { 631 regulator-name = "ldo28"; 632 }; 633 634 LDO29 { 635 regulator-name = "ldo29"; 636 }; 637 638 LDO30 { 639 regulator-name = "vddq_e1_e2"; 640 regulator-min-microvolt = < 0x124f80 >; 641 regulator-max-microvolt = < 0x124f80 >; 642 regulator-always-on; 643 }; 644 645 LDO31 { 646 regulator-name = "ldo31"; 647 }; 648 649 LDO32 { 650 regulator-name = "vs_power_meter"; 651 regulator-min-microvolt = < 0x325aa0 >; 652 regulator-max-microvolt = < 0x325aa0 >; 653 }; 654 655 LDO33 { 656 regulator-name = "ldo33"; 657 }; 658 659 LDO34 { 660 regulator-name = "ldo34"; 661 }; 662 663 LDO35 { 664 regulator-name = "ldo35"; 665 }; 666 }; 667 }; 668 }; 669 670 i2c@12cb0000 { 671 compatible = "samsung,exynos5250-hsi2c"; 672 reg = < 0x12cb0000 0x1000 >; 673 interrupts = < 0x00 0x3d 0x04 >; 674 #address-cells = < 0x01 >; 675 #size-cells = < 0x00 >; 676 status = "disabled"; 677 clocks = < 0x02 0x10a >; 678 clock-names = "hsi2c"; 679 pinctrl-names = "default"; 680 pinctrl-0 = < 0x24 >; 681 }; 682 683 i2c@12cc0000 { 684 compatible = "samsung,exynos5250-hsi2c"; 685 reg = < 0x12cc0000 0x1000 >; 686 interrupts = < 0x00 0x3e 0x04 >; 687 #address-cells = < 0x01 >; 688 #size-cells = < 0x00 >; 689 status = "disabled"; 690 clocks = < 0x02 0x10b >; 691 clock-names = "hsi2c"; 692 pinctrl-names = "default"; 693 pinctrl-0 = < 0x25 >; 694 }; 695 696 i2c@12cd0000 { 697 compatible = "samsung,exynos5250-hsi2c"; 698 reg = < 0x12cd0000 0x1000 >; 699 interrupts = < 0x00 0x3f 0x04 >; 700 #address-cells = < 0x01 >; 701 #size-cells = < 0x00 >; 702 status = "disabled"; 703 clocks = < 0x02 0x10c >; 704 clock-names = "hsi2c"; 705 pinctrl-names = "default"; 706 pinctrl-0 = < 0x26 >; 707 }; 708 709 usb3-0 { 710 compatible = "samsung,exynos5250-dwusb3"; 711 #address-cells = < 0x01 >; 712 #size-cells = < 0x01 >; 713 ranges; 714 clocks = < 0x02 0x16e >; 715 clock-names = "usbdrd30"; 716 vdd33-supply = < 0x27 >; 717 vdd10-supply = < 0x28 >; 718 719 dwc3@12000000 { 720 compatible = "snps,dwc3"; 721 reg = < 0x12000000 0x10000 >; 722 interrupts = < 0x00 0x48 0x04 >; 723 phys = < 0x29 0x00 0x29 0x01 >; 724 phy-names = "usb2-phy\0usb3-phy"; 725 snps,dis_u3_susphy_quirk; 726 dr_mode = "host"; 727 }; 728 }; 729 730 phy@12100000 { 731 compatible = "samsung,exynos5420-usbdrd-phy"; 732 reg = < 0x12100000 0x100 >; 733 #phy-cells = < 0x01 >; 734 clocks = < 0x02 0x16e 0x02 0x98 >; 735 clock-names = "phy\0ref"; 736 samsung,pmu-syscon = < 0x18 >; 737 phandle = < 0x29 >; 738 }; 739 740 usb3-1 { 741 compatible = "samsung,exynos5250-dwusb3"; 742 #address-cells = < 0x01 >; 743 #size-cells = < 0x01 >; 744 ranges; 745 clocks = < 0x02 0x16f >; 746 clock-names = "usbdrd30"; 747 vdd33-supply = < 0x27 >; 748 vdd10-supply = < 0x28 >; 749 750 dwc3@12400000 { 751 compatible = "snps,dwc3"; 752 reg = < 0x12400000 0x10000 >; 753 phys = < 0x2a 0x00 0x2a 0x01 >; 754 phy-names = "usb2-phy\0usb3-phy"; 755 snps,dis_u3_susphy_quirk; 756 interrupts = < 0x00 0xc8 0x04 >; 757 dr_mode = "peripheral"; 758 }; 759 }; 760 761 phy@12500000 { 762 compatible = "samsung,exynos5420-usbdrd-phy"; 763 reg = < 0x12500000 0x100 >; 764 #phy-cells = < 0x01 >; 765 clocks = < 0x02 0x16f 0x02 0x99 >; 766 clock-names = "phy\0ref"; 767 samsung,pmu-syscon = < 0x18 >; 768 phandle = < 0x2a >; 769 }; 770 771 usb@12110000 { 772 compatible = "samsung,exynos4210-ehci"; 773 reg = < 0x12110000 0x100 >; 774 interrupts = < 0x00 0x47 0x04 >; 775 #address-cells = < 0x01 >; 776 #size-cells = < 0x00 >; 777 clocks = < 0x02 0x16d >; 778 clock-names = "usbhost"; 779 780 port@0 { 781 reg = < 0x00 >; 782 phys = < 0x2b 0x01 >; 783 }; 784 }; 785 786 usb@12120000 { 787 compatible = "samsung,exynos4210-ohci"; 788 reg = < 0x12120000 0x100 >; 789 interrupts = < 0x00 0x47 0x04 >; 790 #address-cells = < 0x01 >; 791 #size-cells = < 0x00 >; 792 clocks = < 0x02 0x16d >; 793 clock-names = "usbhost"; 794 795 port@0 { 796 reg = < 0x00 >; 797 phys = < 0x2b 0x01 >; 798 }; 799 }; 800 801 phy@12130000 { 802 compatible = "samsung,exynos5250-usb2-phy"; 803 reg = < 0x12130000 0x100 >; 804 #phy-cells = < 0x01 >; 805 clocks = < 0x02 0x16d 0x02 0x98 >; 806 clock-names = "phy\0ref"; 807 samsung,sysreg-phandle = < 0x05 >; 808 samsung,pmureg-phandle = < 0x18 >; 809 phandle = < 0x2b >; 810 }; 811 812 system-controller@10040000 { 813 compatible = "samsung,exynos5410-pmu\0syscon"; 814 reg = < 0x10040000 0x5000 >; 815 clock-names = "clkout16"; 816 clocks = < 0x17 >; 817 #clock-cells = < 0x01 >; 818 phandle = < 0x18 >; 819 820 syscon-poweroff { 821 compatible = "syscon-poweroff"; 822 regmap = < 0x18 >; 823 offset = < 0x330c >; 824 mask = < 0x5200 >; 825 }; 826 827 syscon-reboot { 828 compatible = "syscon-reboot"; 829 regmap = < 0x18 >; 830 offset = < 0x400 >; 831 mask = < 0x01 >; 832 }; 833 }; 834 835 clock-controller@10010000 { 836 compatible = "samsung,exynos5410-clock"; 837 reg = < 0x10010000 0x30000 >; 838 #clock-cells = < 0x01 >; 839 clocks = < 0x17 >; 840 assigned-clocks = < 0x02 0x07 >; 841 assigned-clock-rates = < 0xb71b000 >; 842 phandle = < 0x02 >; 843 }; 844 845 audss-clock-controller@3810000 { 846 compatible = "samsung,exynos5410-audss-clock"; 847 reg = < 0x3810000 0x0c >; 848 #clock-cells = < 0x01 >; 849 clocks = < 0x17 0x02 0x07 >; 850 clock-names = "pll_ref\0pll_in"; 851 assigned-clocks = < 0x2c 0x00 0x2c 0x01 0x2c 0x02 0x2c 0x03 >; 852 assigned-clock-parents = < 0x02 0x07 0x2c 0x00 >; 853 assigned-clock-rates = < 0x00 0x00 0x5b8d800 0x124f800 >; 854 phandle = < 0x2c >; 855 }; 856 857 tmu@10060000 { 858 compatible = "samsung,exynos5420-tmu"; 859 reg = < 0x10060000 0x100 >; 860 interrupts = < 0x00 0x41 0x04 >; 861 clocks = < 0x02 0x13e >; 862 clock-names = "tmu_apbif"; 863 #thermal-sensor-cells = < 0x00 >; 864 vtmu-supply = < 0x2d >; 865 phandle = < 0x41 >; 866 }; 867 868 tmu@10064000 { 869 compatible = "samsung,exynos5420-tmu"; 870 reg = < 0x10064000 0x100 >; 871 interrupts = < 0x00 0xb7 0x04 >; 872 clocks = < 0x02 0x13e >; 873 clock-names = "tmu_apbif"; 874 #thermal-sensor-cells = < 0x00 >; 875 vtmu-supply = < 0x2d >; 876 phandle = < 0x46 >; 877 }; 878 879 tmu@10068000 { 880 compatible = "samsung,exynos5420-tmu"; 881 reg = < 0x10068000 0x100 >; 882 interrupts = < 0x00 0xb8 0x04 >; 883 clocks = < 0x02 0x13e >; 884 clock-names = "tmu_apbif"; 885 #thermal-sensor-cells = < 0x00 >; 886 vtmu-supply = < 0x2d >; 887 phandle = < 0x47 >; 888 }; 889 890 tmu@1006c000 { 891 compatible = "samsung,exynos5420-tmu"; 892 reg = < 0x1006c000 0x100 >; 893 interrupts = < 0x00 0xb9 0x04 >; 894 clocks = < 0x02 0x13e >; 895 clock-names = "tmu_apbif"; 896 #thermal-sensor-cells = < 0x00 >; 897 vtmu-supply = < 0x2d >; 898 phandle = < 0x48 >; 899 }; 900 901 mmc@12200000 { 902 compatible = "samsung,exynos5250-dw-mshc"; 903 reg = < 0x12200000 0x1000 >; 904 interrupts = < 0x00 0x4b 0x04 >; 905 #address-cells = < 0x01 >; 906 #size-cells = < 0x00 >; 907 clocks = < 0x02 0x15f 0x02 0x84 >; 908 clock-names = "biu\0ciu"; 909 fifo-depth = < 0x80 >; 910 status = "okay"; 911 mmc-pwrseq = < 0x2e >; 912 cd-gpios = < 0x2f 0x02 0x01 >; 913 card-detect-delay = < 0xc8 >; 914 samsung,dw-mshc-ciu-div = < 0x03 >; 915 samsung,dw-mshc-sdr-timing = < 0x00 0x04 >; 916 samsung,dw-mshc-ddr-timing = < 0x00 0x02 >; 917 pinctrl-names = "default"; 918 pinctrl-0 = < 0x30 0x31 0x32 0x33 0x34 0x35 >; 919 bus-width = < 0x08 >; 920 cap-mmc-highspeed; 921 mmc-hs200-1_8v; 922 vmmc-supply = < 0x36 >; 923 vqmmc-supply = < 0x37 >; 924 }; 925 926 mmc@12210000 { 927 compatible = "samsung,exynos5250-dw-mshc"; 928 reg = < 0x12210000 0x1000 >; 929 interrupts = < 0x00 0x4c 0x04 >; 930 #address-cells = < 0x01 >; 931 #size-cells = < 0x00 >; 932 clocks = < 0x02 0x160 0x02 0x85 >; 933 clock-names = "biu\0ciu"; 934 fifo-depth = < 0x80 >; 935 status = "disabled"; 936 }; 937 938 mmc@12220000 { 939 compatible = "samsung,exynos5250-dw-mshc"; 940 reg = < 0x12220000 0x1000 >; 941 interrupts = < 0x00 0x4d 0x04 >; 942 #address-cells = < 0x01 >; 943 #size-cells = < 0x00 >; 944 clocks = < 0x02 0x161 0x02 0x86 >; 945 clock-names = "biu\0ciu"; 946 fifo-depth = < 0x80 >; 947 status = "okay"; 948 card-detect-delay = < 0xc8 >; 949 samsung,dw-mshc-ciu-div = < 0x03 >; 950 samsung,dw-mshc-sdr-timing = < 0x00 0x04 >; 951 samsung,dw-mshc-ddr-timing = < 0x00 0x02 >; 952 pinctrl-names = "default"; 953 pinctrl-0 = < 0x38 0x39 0x3a 0x3b 0x3c 0x3d >; 954 bus-width = < 0x04 >; 955 cap-sd-highspeed; 956 vmmc-supply = < 0x3e >; 957 vqmmc-supply = < 0x3f >; 958 }; 959 960 pinctrl@13400000 { 961 compatible = "samsung,exynos5410-pinctrl"; 962 reg = < 0x13400000 0x1000 >; 963 interrupts = < 0x00 0x2d 0x04 >; 964 965 wakeup-interrupt-controller { 966 compatible = "samsung,exynos4210-wakeup-eint"; 967 interrupt-parent = < 0x01 >; 968 interrupts = < 0x00 0x20 0x04 >; 969 }; 970 971 gpa0 { 972 gpio-controller; 973 #gpio-cells = < 0x02 >; 974 interrupt-controller; 975 #interrupt-cells = < 0x02 >; 976 }; 977 978 gpa1 { 979 gpio-controller; 980 #gpio-cells = < 0x02 >; 981 interrupt-controller; 982 #interrupt-cells = < 0x02 >; 983 }; 984 985 gpa2 { 986 gpio-controller; 987 #gpio-cells = < 0x02 >; 988 interrupt-controller; 989 #interrupt-cells = < 0x02 >; 990 }; 991 992 gpb0 { 993 gpio-controller; 994 #gpio-cells = < 0x02 >; 995 interrupt-controller; 996 #interrupt-cells = < 0x02 >; 997 }; 998 999 gpb1 { 1000 gpio-controller; 1001 #gpio-cells = < 0x02 >; 1002 interrupt-controller; 1003 #interrupt-cells = < 0x02 >; 1004 }; 1005 1006 gpb2 { 1007 gpio-controller; 1008 #gpio-cells = < 0x02 >; 1009 interrupt-controller; 1010 #interrupt-cells = < 0x02 >; 1011 }; 1012 1013 gpb3 { 1014 gpio-controller; 1015 #gpio-cells = < 0x02 >; 1016 interrupt-controller; 1017 #interrupt-cells = < 0x02 >; 1018 }; 1019 1020 gpc0 { 1021 gpio-controller; 1022 #gpio-cells = < 0x02 >; 1023 interrupt-controller; 1024 #interrupt-cells = < 0x02 >; 1025 phandle = < 0x2f >; 1026 }; 1027 1028 gpc3 { 1029 gpio-controller; 1030 #gpio-cells = < 0x02 >; 1031 interrupt-controller; 1032 #interrupt-cells = < 0x02 >; 1033 }; 1034 1035 gpc1 { 1036 gpio-controller; 1037 #gpio-cells = < 0x02 >; 1038 interrupt-controller; 1039 #interrupt-cells = < 0x02 >; 1040 }; 1041 1042 gpc2 { 1043 gpio-controller; 1044 #gpio-cells = < 0x02 >; 1045 interrupt-controller; 1046 #interrupt-cells = < 0x02 >; 1047 }; 1048 1049 gpm5 { 1050 gpio-controller; 1051 #gpio-cells = < 0x02 >; 1052 }; 1053 1054 gpd1 { 1055 gpio-controller; 1056 #gpio-cells = < 0x02 >; 1057 interrupt-controller; 1058 #interrupt-cells = < 0x02 >; 1059 phandle = < 0x4c >; 1060 }; 1061 1062 gpe0 { 1063 gpio-controller; 1064 #gpio-cells = < 0x02 >; 1065 interrupt-controller; 1066 #interrupt-cells = < 0x02 >; 1067 }; 1068 1069 gpe1 { 1070 gpio-controller; 1071 #gpio-cells = < 0x02 >; 1072 interrupt-controller; 1073 #interrupt-cells = < 0x02 >; 1074 }; 1075 1076 gpf0 { 1077 gpio-controller; 1078 #gpio-cells = < 0x02 >; 1079 interrupt-controller; 1080 #interrupt-cells = < 0x02 >; 1081 }; 1082 1083 gpf1 { 1084 gpio-controller; 1085 #gpio-cells = < 0x02 >; 1086 interrupt-controller; 1087 #interrupt-cells = < 0x02 >; 1088 }; 1089 1090 gpg0 { 1091 gpio-controller; 1092 #gpio-cells = < 0x02 >; 1093 interrupt-controller; 1094 #interrupt-cells = < 0x02 >; 1095 }; 1096 1097 gpg1 { 1098 gpio-controller; 1099 #gpio-cells = < 0x02 >; 1100 interrupt-controller; 1101 #interrupt-cells = < 0x02 >; 1102 }; 1103 1104 gpg2 { 1105 gpio-controller; 1106 #gpio-cells = < 0x02 >; 1107 interrupt-controller; 1108 #interrupt-cells = < 0x02 >; 1109 }; 1110 1111 gph0 { 1112 gpio-controller; 1113 #gpio-cells = < 0x02 >; 1114 interrupt-controller; 1115 #interrupt-cells = < 0x02 >; 1116 }; 1117 1118 gph1 { 1119 gpio-controller; 1120 #gpio-cells = < 0x02 >; 1121 interrupt-controller; 1122 #interrupt-cells = < 0x02 >; 1123 }; 1124 1125 gpm7 { 1126 gpio-controller; 1127 #gpio-cells = < 0x02 >; 1128 }; 1129 1130 gpy0 { 1131 gpio-controller; 1132 #gpio-cells = < 0x02 >; 1133 }; 1134 1135 gpy1 { 1136 gpio-controller; 1137 #gpio-cells = < 0x02 >; 1138 }; 1139 1140 gpy2 { 1141 gpio-controller; 1142 #gpio-cells = < 0x02 >; 1143 }; 1144 1145 gpy3 { 1146 gpio-controller; 1147 #gpio-cells = < 0x02 >; 1148 }; 1149 1150 gpy4 { 1151 gpio-controller; 1152 #gpio-cells = < 0x02 >; 1153 }; 1154 1155 gpy5 { 1156 gpio-controller; 1157 #gpio-cells = < 0x02 >; 1158 }; 1159 1160 gpy6 { 1161 gpio-controller; 1162 #gpio-cells = < 0x02 >; 1163 }; 1164 1165 gpy7 { 1166 gpio-controller; 1167 #gpio-cells = < 0x02 >; 1168 }; 1169 1170 gpx0 { 1171 gpio-controller; 1172 #gpio-cells = < 0x02 >; 1173 interrupt-controller; 1174 interrupt-parent = < 0x11 >; 1175 #interrupt-cells = < 0x02 >; 1176 interrupts = < 0x17 0x00 0x18 0x00 0x19 0x00 0x19 0x01 0x1a 0x00 0x1a 0x01 0x1b 0x00 0x1b 0x01 >; 1177 phandle = < 0x1a >; 1178 }; 1179 1180 gpx1 { 1181 gpio-controller; 1182 #gpio-cells = < 0x02 >; 1183 interrupt-controller; 1184 interrupt-parent = < 0x11 >; 1185 #interrupt-cells = < 0x02 >; 1186 interrupts = < 0x1c 0x00 0x1c 0x01 0x1d 0x00 0x1d 0x01 0x1e 0x00 0x1e 0x01 0x1f 0x00 0x1f 0x01 >; 1187 phandle = < 0x1b >; 1188 }; 1189 1190 gpx2 { 1191 gpio-controller; 1192 #gpio-cells = < 0x02 >; 1193 interrupt-controller; 1194 #interrupt-cells = < 0x02 >; 1195 phandle = < 0x4a >; 1196 }; 1197 1198 gpx3 { 1199 gpio-controller; 1200 #gpio-cells = < 0x02 >; 1201 interrupt-controller; 1202 #interrupt-cells = < 0x02 >; 1203 }; 1204 1205 uart0-data { 1206 samsung,pins = "gpa0-0\0gpa0-1"; 1207 samsung,pin-function = < 0x02 >; 1208 samsung,pin-pud = < 0x00 >; 1209 samsung,pin-drv = < 0x00 >; 1210 }; 1211 1212 uart0-fctl { 1213 samsung,pins = "gpa0-2\0gpa0-3"; 1214 samsung,pin-function = < 0x02 >; 1215 samsung,pin-pud = < 0x00 >; 1216 samsung,pin-drv = < 0x00 >; 1217 }; 1218 1219 uart1-data { 1220 samsung,pins = "gpa0-4\0gpa0-5"; 1221 samsung,pin-function = < 0x02 >; 1222 samsung,pin-pud = < 0x00 >; 1223 samsung,pin-drv = < 0x00 >; 1224 }; 1225 1226 uart1-fctl { 1227 samsung,pins = "gpa0-6\0gpa0-7"; 1228 samsung,pin-function = < 0x02 >; 1229 samsung,pin-pud = < 0x00 >; 1230 samsung,pin-drv = < 0x00 >; 1231 }; 1232 1233 i2c2-bus { 1234 samsung,pins = "gpa0-6\0gpa0-7"; 1235 samsung,pin-function = < 0x03 >; 1236 samsung,pin-pud = < 0x03 >; 1237 samsung,pin-drv = < 0x00 >; 1238 phandle = < 0x0a >; 1239 }; 1240 1241 uart2-data { 1242 samsung,pins = "gpa1-0\0gpa1-1"; 1243 samsung,pin-function = < 0x02 >; 1244 samsung,pin-pud = < 0x00 >; 1245 samsung,pin-drv = < 0x00 >; 1246 }; 1247 1248 uart2-fctl { 1249 samsung,pins = "gpa1-2\0gpa1-3"; 1250 samsung,pin-function = < 0x02 >; 1251 samsung,pin-pud = < 0x00 >; 1252 samsung,pin-drv = < 0x00 >; 1253 }; 1254 1255 i2c3-bus { 1256 samsung,pins = "gpa1-2\0gpa1-3"; 1257 samsung,pin-function = < 0x03 >; 1258 samsung,pin-pud = < 0x03 >; 1259 samsung,pin-drv = < 0x00 >; 1260 phandle = < 0x0b >; 1261 }; 1262 1263 uart3-data { 1264 samsung,pins = "gpa1-4\0gpa1-5"; 1265 samsung,pin-function = < 0x02 >; 1266 samsung,pin-pud = < 0x00 >; 1267 samsung,pin-drv = < 0x00 >; 1268 }; 1269 1270 i2c4-hs-bus { 1271 samsung,pins = "gpa2-0\0gpa2-1"; 1272 samsung,pin-function = < 0x03 >; 1273 samsung,pin-pud = < 0x03 >; 1274 samsung,pin-drv = < 0x00 >; 1275 phandle = < 0x19 >; 1276 }; 1277 1278 i2c5-hs-bus { 1279 samsung,pins = "gpa2-2\0gpa2-3"; 1280 samsung,pin-function = < 0x03 >; 1281 samsung,pin-pud = < 0x03 >; 1282 samsung,pin-drv = < 0x00 >; 1283 phandle = < 0x24 >; 1284 }; 1285 1286 i2c6-hs-bus { 1287 samsung,pins = "gpb1-3\0gpb1-4"; 1288 samsung,pin-function = < 0x04 >; 1289 samsung,pin-pud = < 0x03 >; 1290 samsung,pin-drv = < 0x00 >; 1291 phandle = < 0x25 >; 1292 }; 1293 1294 pwm0-out { 1295 samsung,pins = "gpb2-0"; 1296 samsung,pin-function = < 0x02 >; 1297 samsung,pin-pud = < 0x00 >; 1298 samsung,pin-drv = < 0x00 >; 1299 phandle = < 0x0c >; 1300 }; 1301 1302 pwm1-out { 1303 samsung,pins = "gpb2-1"; 1304 samsung,pin-function = < 0x02 >; 1305 samsung,pin-pud = < 0x00 >; 1306 samsung,pin-drv = < 0x00 >; 1307 phandle = < 0x0d >; 1308 }; 1309 1310 pwm2-out { 1311 samsung,pins = "gpb2-2"; 1312 samsung,pin-function = < 0x02 >; 1313 samsung,pin-pud = < 0x00 >; 1314 samsung,pin-drv = < 0x00 >; 1315 phandle = < 0x0e >; 1316 }; 1317 1318 pwm3-out { 1319 samsung,pins = "gpb2-3"; 1320 samsung,pin-function = < 0x02 >; 1321 samsung,pin-pud = < 0x00 >; 1322 samsung,pin-drv = < 0x00 >; 1323 phandle = < 0x0f >; 1324 }; 1325 1326 i2c7-hs-bus { 1327 samsung,pins = "gpb2-2\0gpb2-3"; 1328 samsung,pin-function = < 0x03 >; 1329 samsung,pin-pud = < 0x03 >; 1330 samsung,pin-drv = < 0x00 >; 1331 phandle = < 0x26 >; 1332 }; 1333 1334 i2c0-bus { 1335 samsung,pins = "gpb3-0\0gpb3-1"; 1336 samsung,pin-function = < 0x02 >; 1337 samsung,pin-pud = < 0x03 >; 1338 samsung,pin-drv = < 0x00 >; 1339 phandle = < 0x06 >; 1340 }; 1341 1342 i2c1-bus { 1343 samsung,pins = "gpb3-2\0gpb3-3"; 1344 samsung,pin-function = < 0x02 >; 1345 samsung,pin-pud = < 0x03 >; 1346 samsung,pin-drv = < 0x00 >; 1347 phandle = < 0x07 >; 1348 }; 1349 1350 sd0-clk { 1351 samsung,pins = "gpc0-0"; 1352 samsung,pin-function = < 0x02 >; 1353 samsung,pin-pud = < 0x00 >; 1354 samsung,pin-drv = < 0x03 >; 1355 phandle = < 0x30 >; 1356 }; 1357 1358 sd0-cmd { 1359 samsung,pins = "gpc0-1"; 1360 samsung,pin-function = < 0x02 >; 1361 samsung,pin-pud = < 0x00 >; 1362 samsung,pin-drv = < 0x03 >; 1363 phandle = < 0x31 >; 1364 }; 1365 1366 sd0-cd { 1367 samsung,pins = "gpc0-2"; 1368 samsung,pin-function = < 0x02 >; 1369 samsung,pin-pud = < 0x03 >; 1370 samsung,pin-drv = < 0x03 >; 1371 phandle = < 0x35 >; 1372 }; 1373 1374 sd0-bus-width1 { 1375 samsung,pins = "gpc0-3"; 1376 samsung,pin-function = < 0x02 >; 1377 samsung,pin-pud = < 0x03 >; 1378 samsung,pin-drv = < 0x03 >; 1379 phandle = < 0x32 >; 1380 }; 1381 1382 sd0-bus-width4 { 1383 samsung,pins = "gpc0-4\0gpc0-5\0gpc0-6"; 1384 samsung,pin-function = < 0x02 >; 1385 samsung,pin-pud = < 0x03 >; 1386 samsung,pin-drv = < 0x03 >; 1387 phandle = < 0x33 >; 1388 }; 1389 1390 sd2-clk { 1391 samsung,pins = "gpc2-0"; 1392 samsung,pin-function = < 0x02 >; 1393 samsung,pin-pud = < 0x00 >; 1394 samsung,pin-drv = < 0x03 >; 1395 phandle = < 0x38 >; 1396 }; 1397 1398 sd2-cmd { 1399 samsung,pins = "gpc2-1"; 1400 samsung,pin-function = < 0x02 >; 1401 samsung,pin-pud = < 0x00 >; 1402 samsung,pin-drv = < 0x03 >; 1403 phandle = < 0x39 >; 1404 }; 1405 1406 sd2-cd { 1407 samsung,pins = "gpc2-2"; 1408 samsung,pin-function = < 0x02 >; 1409 samsung,pin-pud = < 0x03 >; 1410 samsung,pin-drv = < 0x03 >; 1411 phandle = < 0x3a >; 1412 }; 1413 1414 sd2-bus-width1 { 1415 samsung,pins = "gpc2-3"; 1416 samsung,pin-function = < 0x02 >; 1417 samsung,pin-pud = < 0x03 >; 1418 samsung,pin-drv = < 0x03 >; 1419 phandle = < 0x3b >; 1420 }; 1421 1422 sd2-bus-width4 { 1423 samsung,pins = "gpc2-4\0gpc2-5\0gpc2-6"; 1424 samsung,pin-function = < 0x02 >; 1425 samsung,pin-pud = < 0x03 >; 1426 samsung,pin-drv = < 0x03 >; 1427 phandle = < 0x3c >; 1428 }; 1429 1430 sd0-bus-width8 { 1431 samsung,pins = "gpc3-0\0gpc3-1\0gpc3-2\0gpc3-3"; 1432 samsung,pin-function = < 0x02 >; 1433 samsung,pin-pud = < 0x03 >; 1434 samsung,pin-drv = < 0x03 >; 1435 phandle = < 0x34 >; 1436 }; 1437 1438 emmc-nrst { 1439 samsung,pins = "gpd1-0"; 1440 samsung,pin-function = < 0x02 >; 1441 samsung,pin-pud = < 0x00 >; 1442 samsung,pin-drv = < 0x00 >; 1443 phandle = < 0x4b >; 1444 }; 1445 1446 sd2-wp { 1447 samsung,pins = "gpm5-0"; 1448 samsung,pin-function = < 0x02 >; 1449 samsung,pin-pud = < 0x01 >; 1450 samsung,pin-drv = < 0x03 >; 1451 phandle = < 0x3d >; 1452 }; 1453 1454 pmic-dvs-3 { 1455 samsung,pins = "gpx0-0"; 1456 samsung,pin-function = < 0x01 >; 1457 samsung,pin-pud = < 0x00 >; 1458 samsung,pin-drv = < 0x00 >; 1459 phandle = < 0x1f >; 1460 }; 1461 1462 pmic-dvs-2 { 1463 samsung,pins = "gpx0-1"; 1464 samsung,pin-function = < 0x01 >; 1465 samsung,pin-pud = < 0x00 >; 1466 samsung,pin-drv = < 0x00 >; 1467 phandle = < 0x1e >; 1468 }; 1469 1470 pmic-dvs-1 { 1471 samsung,pins = "gpx0-2"; 1472 samsung,pin-function = < 0x01 >; 1473 samsung,pin-pud = < 0x00 >; 1474 samsung,pin-drv = < 0x00 >; 1475 samsung,pin-val = < 0x01 >; 1476 phandle = < 0x1d >; 1477 }; 1478 1479 max77802-irq { 1480 samsung,pins = "gpx0-4"; 1481 samsung,pin-function = < 0x0f >; 1482 samsung,pin-pud = < 0x00 >; 1483 samsung,pin-drv = < 0x00 >; 1484 phandle = < 0x1c >; 1485 }; 1486 }; 1487 1488 pinctrl@14000000 { 1489 compatible = "samsung,exynos5410-pinctrl"; 1490 reg = < 0x14000000 0x1000 >; 1491 interrupts = < 0x00 0x2e 0x04 >; 1492 1493 gpj0 { 1494 gpio-controller; 1495 #gpio-cells = < 0x02 >; 1496 interrupt-controller; 1497 #interrupt-cells = < 0x02 >; 1498 }; 1499 1500 gpj1 { 1501 gpio-controller; 1502 #gpio-cells = < 0x02 >; 1503 interrupt-controller; 1504 #interrupt-cells = < 0x02 >; 1505 }; 1506 1507 gpj2 { 1508 gpio-controller; 1509 #gpio-cells = < 0x02 >; 1510 interrupt-controller; 1511 #interrupt-cells = < 0x02 >; 1512 }; 1513 1514 gpj3 { 1515 gpio-controller; 1516 #gpio-cells = < 0x02 >; 1517 interrupt-controller; 1518 #interrupt-cells = < 0x02 >; 1519 phandle = < 0x08 >; 1520 }; 1521 1522 gpj4 { 1523 gpio-controller; 1524 #gpio-cells = < 0x02 >; 1525 interrupt-controller; 1526 #interrupt-cells = < 0x02 >; 1527 }; 1528 1529 gpk0 { 1530 gpio-controller; 1531 #gpio-cells = < 0x02 >; 1532 interrupt-controller; 1533 #interrupt-cells = < 0x02 >; 1534 }; 1535 1536 gpk1 { 1537 gpio-controller; 1538 #gpio-cells = < 0x02 >; 1539 interrupt-controller; 1540 #interrupt-cells = < 0x02 >; 1541 }; 1542 1543 gpk2 { 1544 gpio-controller; 1545 #gpio-cells = < 0x02 >; 1546 interrupt-controller; 1547 #interrupt-cells = < 0x02 >; 1548 }; 1549 1550 gpk3 { 1551 gpio-controller; 1552 #gpio-cells = < 0x02 >; 1553 interrupt-controller; 1554 #interrupt-cells = < 0x02 >; 1555 }; 1556 }; 1557 1558 pinctrl@10d10000 { 1559 compatible = "samsung,exynos5410-pinctrl"; 1560 reg = < 0x10d10000 0x1000 >; 1561 interrupts = < 0x00 0x32 0x04 >; 1562 1563 gpv0 { 1564 gpio-controller; 1565 #gpio-cells = < 0x02 >; 1566 interrupt-controller; 1567 #interrupt-cells = < 0x02 >; 1568 }; 1569 1570 gpv1 { 1571 gpio-controller; 1572 #gpio-cells = < 0x02 >; 1573 interrupt-controller; 1574 #interrupt-cells = < 0x02 >; 1575 }; 1576 1577 gpv2 { 1578 gpio-controller; 1579 #gpio-cells = < 0x02 >; 1580 interrupt-controller; 1581 #interrupt-cells = < 0x02 >; 1582 }; 1583 1584 gpv3 { 1585 gpio-controller; 1586 #gpio-cells = < 0x02 >; 1587 interrupt-controller; 1588 #interrupt-cells = < 0x02 >; 1589 }; 1590 1591 gpv4 { 1592 gpio-controller; 1593 #gpio-cells = < 0x02 >; 1594 interrupt-controller; 1595 #interrupt-cells = < 0x02 >; 1596 }; 1597 }; 1598 1599 pinctrl@3860000 { 1600 compatible = "samsung,exynos5410-pinctrl"; 1601 reg = < 0x3860000 0x1000 >; 1602 interrupts = < 0x00 0x2f 0x04 >; 1603 1604 gpz { 1605 gpio-controller; 1606 #gpio-cells = < 0x02 >; 1607 interrupt-controller; 1608 #interrupt-cells = < 0x02 >; 1609 }; 1610 1611 audi2s0-bus { 1612 samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4"; 1613 samsung,pin-function = < 0x02 >; 1614 samsung,pin-pud = < 0x00 >; 1615 samsung,pin-drv = < 0x00 >; 1616 phandle = < 0x40 >; 1617 }; 1618 }; 1619 1620 amba { 1621 #address-cells = < 0x01 >; 1622 #size-cells = < 0x01 >; 1623 compatible = "simple-bus"; 1624 interrupt-parent = < 0x01 >; 1625 ranges; 1626 1627 pdma@121a0000 { 1628 compatible = "arm,pl330\0arm,primecell"; 1629 reg = < 0x121a0000 0x1000 >; 1630 interrupts = < 0x00 0x22 0x04 >; 1631 clocks = < 0x02 0x16a >; 1632 clock-names = "apb_pclk"; 1633 #dma-cells = < 0x01 >; 1634 #dma-channels = < 0x08 >; 1635 #dma-requests = < 0x20 >; 1636 phandle = < 0x03 >; 1637 }; 1638 1639 pdma@121b0000 { 1640 compatible = "arm,pl330\0arm,primecell"; 1641 reg = < 0x121b0000 0x1000 >; 1642 interrupts = < 0x00 0x23 0x04 >; 1643 clocks = < 0x02 0x16b >; 1644 clock-names = "apb_pclk"; 1645 #dma-cells = < 0x01 >; 1646 #dma-channels = < 0x08 >; 1647 #dma-requests = < 0x20 >; 1648 phandle = < 0x04 >; 1649 }; 1650 }; 1651 1652 i2s@3830000 { 1653 compatible = "samsung,exynos5420-i2s"; 1654 reg = < 0x3830000 0x100 >; 1655 dmas = < 0x03 0x0a 0x03 0x09 0x03 0x08 >; 1656 dma-names = "tx\0rx\0tx-sec"; 1657 clocks = < 0x2c 0x06 0x2c 0x06 0x2c 0x07 >; 1658 clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; 1659 #clock-cells = < 0x01 >; 1660 clock-output-names = "i2s_cdclk0"; 1661 #sound-dai-cells = < 0x01 >; 1662 samsung,idma-addr = < 0x3000000 >; 1663 pinctrl-names = "default"; 1664 pinctrl-0 = < 0x40 >; 1665 status = "okay"; 1666 phandle = < 0x09 >; 1667 }; 1668 }; 1669 1670 cpus { 1671 #address-cells = < 0x01 >; 1672 #size-cells = < 0x00 >; 1673 1674 cpu@0 { 1675 device_type = "cpu"; 1676 compatible = "arm,cortex-a15"; 1677 reg = < 0x00 >; 1678 clock-frequency = < 0x5f5e1000 >; 1679 phandle = < 0x12 >; 1680 }; 1681 1682 cpu@1 { 1683 device_type = "cpu"; 1684 compatible = "arm,cortex-a15"; 1685 reg = < 0x01 >; 1686 clock-frequency = < 0x5f5e1000 >; 1687 phandle = < 0x13 >; 1688 }; 1689 1690 cpu@2 { 1691 device_type = "cpu"; 1692 compatible = "arm,cortex-a15"; 1693 reg = < 0x02 >; 1694 clock-frequency = < 0x5f5e1000 >; 1695 phandle = < 0x14 >; 1696 }; 1697 1698 cpu@3 { 1699 device_type = "cpu"; 1700 compatible = "arm,cortex-a15"; 1701 reg = < 0x03 >; 1702 clock-frequency = < 0x5f5e1000 >; 1703 phandle = < 0x15 >; 1704 }; 1705 }; 1706 1707 thermal-zones { 1708 1709 cpu0-thermal { 1710 thermal-sensors = < 0x41 0x00 >; 1711 polling-delay-passive = < 0x00 >; 1712 polling-delay = < 0x00 >; 1713 1714 trips { 1715 1716 cpu-alert-0 { 1717 temperature = < 0xc350 >; 1718 hysteresis = < 0x1388 >; 1719 type = "active"; 1720 phandle = < 0x42 >; 1721 }; 1722 1723 cpu-alert-1 { 1724 temperature = < 0xea60 >; 1725 hysteresis = < 0x1388 >; 1726 type = "active"; 1727 phandle = < 0x44 >; 1728 }; 1729 1730 cpu-alert-2 { 1731 temperature = < 0x11170 >; 1732 hysteresis = < 0x1388 >; 1733 type = "active"; 1734 phandle = < 0x45 >; 1735 }; 1736 1737 cpu-crit-0 { 1738 temperature = < 0x1d4c0 >; 1739 hysteresis = < 0x00 >; 1740 type = "critical"; 1741 }; 1742 }; 1743 1744 cooling-maps { 1745 1746 map0 { 1747 trip = < 0x42 >; 1748 cooling-device = < 0x43 0x00 0x01 >; 1749 }; 1750 1751 map1 { 1752 trip = < 0x44 >; 1753 cooling-device = < 0x43 0x01 0x02 >; 1754 }; 1755 1756 map2 { 1757 trip = < 0x45 >; 1758 cooling-device = < 0x43 0x02 0x03 >; 1759 }; 1760 }; 1761 }; 1762 1763 cpu1-thermal { 1764 thermal-sensors = < 0x46 >; 1765 polling-delay-passive = < 0x00 >; 1766 polling-delay = < 0x00 >; 1767 1768 trips { 1769 1770 cpu-alert-0 { 1771 temperature = < 0x14c08 >; 1772 hysteresis = < 0x2710 >; 1773 type = "active"; 1774 }; 1775 1776 cpu-alert-1 { 1777 temperature = < 0x19258 >; 1778 hysteresis = < 0x2710 >; 1779 type = "active"; 1780 }; 1781 1782 cpu-alert-2 { 1783 temperature = < 0x1adb0 >; 1784 hysteresis = < 0x2710 >; 1785 type = "active"; 1786 }; 1787 1788 cpu-crit-0 { 1789 temperature = < 0x1d4c0 >; 1790 hysteresis = < 0x00 >; 1791 type = "critical"; 1792 }; 1793 }; 1794 }; 1795 1796 cpu2-thermal { 1797 thermal-sensors = < 0x47 >; 1798 polling-delay-passive = < 0x00 >; 1799 polling-delay = < 0x00 >; 1800 1801 trips { 1802 1803 cpu-alert-0 { 1804 temperature = < 0x14c08 >; 1805 hysteresis = < 0x2710 >; 1806 type = "active"; 1807 }; 1808 1809 cpu-alert-1 { 1810 temperature = < 0x19258 >; 1811 hysteresis = < 0x2710 >; 1812 type = "active"; 1813 }; 1814 1815 cpu-alert-2 { 1816 temperature = < 0x1adb0 >; 1817 hysteresis = < 0x2710 >; 1818 type = "active"; 1819 }; 1820 1821 cpu-crit-0 { 1822 temperature = < 0x1d4c0 >; 1823 hysteresis = < 0x00 >; 1824 type = "critical"; 1825 }; 1826 }; 1827 }; 1828 1829 cpu3-thermal { 1830 thermal-sensors = < 0x48 >; 1831 polling-delay-passive = < 0x00 >; 1832 polling-delay = < 0x00 >; 1833 1834 trips { 1835 1836 cpu-alert-0 { 1837 temperature = < 0x14c08 >; 1838 hysteresis = < 0x2710 >; 1839 type = "active"; 1840 }; 1841 1842 cpu-alert-1 { 1843 temperature = < 0x19258 >; 1844 hysteresis = < 0x2710 >; 1845 type = "active"; 1846 }; 1847 1848 cpu-alert-2 { 1849 temperature = < 0x1adb0 >; 1850 hysteresis = < 0x2710 >; 1851 type = "active"; 1852 }; 1853 1854 cpu-crit-0 { 1855 temperature = < 0x1d4c0 >; 1856 hysteresis = < 0x00 >; 1857 type = "critical"; 1858 }; 1859 }; 1860 }; 1861 }; 1862 1863 pwmleds { 1864 compatible = "pwm-leds"; 1865 1866 greenled { 1867 label = "green:mmc0"; 1868 pwms = < 0x49 0x01 0x1e8480 0x00 >; 1869 pwm-names = "pwm1"; 1870 max_brightness = < 0x7f >; 1871 linux,default-trigger = "mmc0"; 1872 }; 1873 1874 blueled { 1875 label = "blue:heartbeat"; 1876 pwms = < 0x49 0x02 0x1e8480 0x00 >; 1877 pwm-names = "pwm2"; 1878 max_brightness = < 0xff >; 1879 linux,default-trigger = "heartbeat"; 1880 }; 1881 }; 1882 1883 gpioleds { 1884 compatible = "gpio-leds"; 1885 1886 redled { 1887 label = "red:microSD"; 1888 gpios = < 0x4a 0x03 0x00 >; 1889 default-state = "off"; 1890 linux,default-trigger = "mmc1"; 1891 }; 1892 }; 1893 1894 memory@40000000 { 1895 device_type = "memory"; 1896 reg = < 0x40000000 0x7ea00000 >; 1897 }; 1898 1899 chosen { 1900 stdout-path = "serial2:115200n8"; 1901 }; 1902 1903 pwrseq { 1904 pinctrl-0 = < 0x4b >; 1905 pinctrl-names = "default"; 1906 compatible = "mmc-pwrseq-emmc"; 1907 reset-gpios = < 0x4c 0x00 0x01 >; 1908 phandle = < 0x2e >; 1909 }; 1910 1911 pwm-fan { 1912 compatible = "pwm-fan"; 1913 pwms = < 0x49 0x00 0x51ec 0x00 >; 1914 cooling-min-state = < 0x00 >; 1915 cooling-max-state = < 0x03 >; 1916 #cooling-cells = < 0x02 >; 1917 cooling-levels = < 0x00 0x82 0xaa 0xe6 >; 1918 phandle = < 0x43 >; 1919 }; 1920 1921 xxti { 1922 compatible = "fixed-clock"; 1923 clock-frequency = < 0x16e3600 >; 1924 clock-output-names = "fin_pll"; 1925 #clock-cells = < 0x00 >; 1926 phandle = < 0x17 >; 1927 }; 1928 1929 firmware@2073000 { 1930 compatible = "samsung,secure-firmware"; 1931 reg = < 0x2073000 0x1000 >; 1932 }; 1933 1934 sound { 1935 compatible = "simple-audio-card"; 1936 simple-audio-card,name = "Odroid-XU"; 1937 simple-audio-card,widgets = "Headphone\0Headphone Jack\0Speakers\0Speakers"; 1938 simple-audio-card,routing = "Headphone Jack\0HPL\0Headphone Jack\0HPR\0Headphone Jack\0MICBIAS\0IN1\0Headphone Jack\0Speakers\0SPKL\0Speakers\0SPKR"; 1939 simple-audio-card,format = "i2s"; 1940 simple-audio-card,bitclock-master = < 0x4d >; 1941 simple-audio-card,frame-master = < 0x4d >; 1942 1943 simple-audio-card,cpu { 1944 sound-dai = < 0x09 0x00 >; 1945 system-clock-frequency = < 0x124f800 >; 1946 }; 1947 1948 simple-audio-card,codec { 1949 sound-dai = < 0x4e >; 1950 clocks = < 0x09 0x00 >; 1951 phandle = < 0x4d >; 1952 }; 1953 }; 1954}; 1955