1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 interrupt-parent = < 0x01 >; 15 #address-cells = < 0x01 >; 16 #size-cells = < 0x01 >; 17 compatible = "insignal,arndale\0samsung,exynos5250\0samsung,exynos5"; 18 model = "Insignal Arndale evaluation board based on EXYNOS5250"; 19 20 aliases { 21 i2c0 = "/soc/i2c@12c60000"; 22 i2c1 = "/soc/i2c@12c70000"; 23 i2c2 = "/soc/i2c@12c80000"; 24 i2c3 = "/soc/i2c@12c90000"; 25 serial0 = "/soc/serial@12c00000"; 26 serial1 = "/soc/serial@12c10000"; 27 serial2 = "/soc/serial@12c20000"; 28 serial3 = "/soc/serial@12c30000"; 29 spi0 = "/soc/spi@12d20000"; 30 spi1 = "/soc/spi@12d30000"; 31 spi2 = "/soc/spi@12d40000"; 32 gsc0 = "/soc/gsc@13e00000"; 33 gsc1 = "/soc/gsc@13e10000"; 34 gsc2 = "/soc/gsc@13e20000"; 35 gsc3 = "/soc/gsc@13e30000"; 36 mshc0 = "/soc/mmc@12200000"; 37 mshc1 = "/soc/mmc@12210000"; 38 mshc2 = "/soc/mmc@12220000"; 39 mshc3 = "/soc/mmc@12230000"; 40 i2c4 = "/soc/i2c@12ca0000"; 41 i2c5 = "/soc/i2c@12cb0000"; 42 i2c6 = "/soc/i2c@12cc0000"; 43 i2c7 = "/soc/i2c@12cd0000"; 44 i2c8 = "/soc/i2c@12ce0000"; 45 i2c9 = "/soc/i2c@121d0000"; 46 pinctrl0 = "/soc/pinctrl@11400000"; 47 pinctrl1 = "/soc/pinctrl@13400000"; 48 pinctrl2 = "/soc/pinctrl@10d10000"; 49 pinctrl3 = "/soc/pinctrl@3860000"; 50 }; 51 52 soc { 53 compatible = "simple-bus"; 54 #address-cells = < 0x01 >; 55 #size-cells = < 0x01 >; 56 ranges; 57 58 chipid@10000000 { 59 compatible = "samsung,exynos4210-chipid"; 60 reg = < 0x10000000 0x100 >; 61 }; 62 63 memory-controller@12250000 { 64 compatible = "samsung,exynos4210-srom"; 65 reg = < 0x12250000 0x14 >; 66 }; 67 68 interrupt-controller@10440000 { 69 compatible = "samsung,exynos4210-combiner"; 70 #interrupt-cells = < 0x02 >; 71 interrupt-controller; 72 samsung,combiner-nr = < 0x20 >; 73 reg = < 0x10440000 0x1000 >; 74 interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x06 0x04 0x00 0x07 0x04 0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04 0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x17 0x04 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 >; 75 phandle = < 0x13 >; 76 }; 77 78 interrupt-controller@10481000 { 79 compatible = "arm,gic-400\0arm,cortex-a15-gic\0arm,cortex-a9-gic"; 80 #interrupt-cells = < 0x03 >; 81 interrupt-controller; 82 reg = < 0x10481000 0x1000 0x10482000 0x2000 0x10484000 0x2000 0x10486000 0x2000 >; 83 interrupts = < 0x01 0x09 0xf04 >; 84 phandle = < 0x01 >; 85 }; 86 87 syscon@10050000 { 88 compatible = "samsung,exynos5-sysreg\0syscon"; 89 reg = < 0x10050000 0x5000 >; 90 phandle = < 0x05 >; 91 }; 92 93 serial@12c00000 { 94 compatible = "samsung,exynos4210-uart"; 95 reg = < 0x12c00000 0x100 >; 96 interrupts = < 0x00 0x33 0x04 >; 97 clocks = < 0x02 0x121 0x02 0x92 >; 98 clock-names = "uart\0clk_uart_baud0"; 99 dmas = < 0x03 0x0d 0x03 0x0e >; 100 dma-names = "rx\0tx"; 101 }; 102 103 serial@12c10000 { 104 compatible = "samsung,exynos4210-uart"; 105 reg = < 0x12c10000 0x100 >; 106 interrupts = < 0x00 0x34 0x04 >; 107 clocks = < 0x02 0x122 0x02 0x93 >; 108 clock-names = "uart\0clk_uart_baud0"; 109 dmas = < 0x04 0x0f 0x04 0x10 >; 110 dma-names = "rx\0tx"; 111 }; 112 113 serial@12c20000 { 114 compatible = "samsung,exynos4210-uart"; 115 reg = < 0x12c20000 0x100 >; 116 interrupts = < 0x00 0x35 0x04 >; 117 clocks = < 0x02 0x123 0x02 0x94 >; 118 clock-names = "uart\0clk_uart_baud0"; 119 dmas = < 0x03 0x0f 0x03 0x10 >; 120 dma-names = "rx\0tx"; 121 }; 122 123 serial@12c30000 { 124 compatible = "samsung,exynos4210-uart"; 125 reg = < 0x12c30000 0x100 >; 126 interrupts = < 0x00 0x36 0x04 >; 127 clocks = < 0x02 0x124 0x02 0x95 >; 128 clock-names = "uart\0clk_uart_baud0"; 129 dmas = < 0x04 0x11 0x04 0x12 >; 130 dma-names = "rx\0tx"; 131 }; 132 133 i2c@12c60000 { 134 compatible = "samsung,s3c2440-i2c"; 135 reg = < 0x12c60000 0x100 >; 136 interrupts = < 0x00 0x38 0x04 >; 137 #address-cells = < 0x01 >; 138 #size-cells = < 0x00 >; 139 samsung,sysreg-phandle = < 0x05 >; 140 status = "okay"; 141 clocks = < 0x02 0x126 >; 142 clock-names = "i2c"; 143 pinctrl-names = "default"; 144 pinctrl-0 = < 0x06 >; 145 samsung,i2c-sda-delay = < 0x64 >; 146 samsung,i2c-max-bus-freq = < 0x4e20 >; 147 samsung,i2c-slave-addr = < 0x66 >; 148 149 s5m8767_pmic@66 { 150 compatible = "samsung,s5m8767-pmic"; 151 reg = < 0x66 >; 152 interrupt-parent = < 0x07 >; 153 interrupts = < 0x02 0x08 >; 154 pinctrl-names = "default"; 155 pinctrl-0 = < 0x08 >; 156 vinb1-supply = < 0x09 >; 157 vinb2-supply = < 0x09 >; 158 vinb3-supply = < 0x09 >; 159 vinb4-supply = < 0x09 >; 160 vinb5-supply = < 0x09 >; 161 vinb6-supply = < 0x09 >; 162 vinb7-supply = < 0x09 >; 163 vinb8-supply = < 0x09 >; 164 vinb9-supply = < 0x09 >; 165 vinl1-supply = < 0x0a >; 166 vinl2-supply = < 0x0a >; 167 vinl3-supply = < 0x0a >; 168 vinl4-supply = < 0x09 >; 169 vinl5-supply = < 0x09 >; 170 vinl6-supply = < 0x09 >; 171 vinl7-supply = < 0x09 >; 172 vinl8-supply = < 0x0b >; 173 vinl9-supply = < 0x0b >; 174 s5m8767,pmic-buck2-dvs-voltage = < 0x13d620 >; 175 s5m8767,pmic-buck3-dvs-voltage = < 0x10c8e0 >; 176 s5m8767,pmic-buck4-dvs-voltage = < 0x124f80 >; 177 s5m8767,pmic-buck-dvs-gpios = < 0x0c 0x00 0x00 0x0c 0x01 0x00 0x0c 0x02 0x00 >; 178 s5m8767,pmic-buck-ds-gpios = < 0x0d 0x03 0x00 0x0d 0x04 0x00 0x0d 0x05 0x00 >; 179 180 regulators { 181 182 LDO1 { 183 regulator-name = "VDD_ALIVE_1.0V"; 184 regulator-min-microvolt = < 0x10c8e0 >; 185 regulator-max-microvolt = < 0x10c8e0 >; 186 regulator-always-on; 187 regulator-boot-on; 188 op_mode = < 0x01 >; 189 }; 190 191 LDO2 { 192 regulator-name = "VDD_28IO_DP_1.35V"; 193 regulator-min-microvolt = < 0x124f80 >; 194 regulator-max-microvolt = < 0x124f80 >; 195 regulator-always-on; 196 regulator-boot-on; 197 op_mode = < 0x01 >; 198 }; 199 200 LDO3 { 201 regulator-name = "VDD_COMMON1_1.8V"; 202 regulator-min-microvolt = < 0x1b7740 >; 203 regulator-max-microvolt = < 0x1b7740 >; 204 regulator-always-on; 205 regulator-boot-on; 206 op_mode = < 0x01 >; 207 }; 208 209 LDO4 { 210 regulator-name = "VDD_IOPERI_1.8V"; 211 regulator-min-microvolt = < 0x1b7740 >; 212 regulator-max-microvolt = < 0x1b7740 >; 213 regulator-always-on; 214 op_mode = < 0x01 >; 215 }; 216 217 LDO5 { 218 regulator-name = "VDD_EXT_1.8V"; 219 regulator-min-microvolt = < 0x1b7740 >; 220 regulator-max-microvolt = < 0x1b7740 >; 221 regulator-always-on; 222 regulator-boot-on; 223 op_mode = < 0x01 >; 224 }; 225 226 LDO6 { 227 regulator-name = "VDD_MPLL_1.1V"; 228 regulator-min-microvolt = < 0x10c8e0 >; 229 regulator-max-microvolt = < 0x10c8e0 >; 230 regulator-always-on; 231 regulator-boot-on; 232 op_mode = < 0x01 >; 233 }; 234 235 LDO7 { 236 regulator-name = "VDD_XPLL_1.1V"; 237 regulator-min-microvolt = < 0x10c8e0 >; 238 regulator-max-microvolt = < 0x10c8e0 >; 239 regulator-always-on; 240 regulator-boot-on; 241 op_mode = < 0x01 >; 242 }; 243 244 LDO8 { 245 regulator-name = "VDD_COMMON2_1.0V"; 246 regulator-min-microvolt = < 0xf4240 >; 247 regulator-max-microvolt = < 0xf4240 >; 248 regulator-always-on; 249 regulator-boot-on; 250 op_mode = < 0x01 >; 251 phandle = < 0x40 >; 252 }; 253 254 LDO9 { 255 regulator-name = "VDD_33ON_3.0V"; 256 regulator-min-microvolt = < 0x2dc6c0 >; 257 regulator-max-microvolt = < 0x2dc6c0 >; 258 op_mode = < 0x01 >; 259 }; 260 261 LDO10 { 262 regulator-name = "VDD_COMMON3_1.8V"; 263 regulator-min-microvolt = < 0x1b7740 >; 264 regulator-max-microvolt = < 0x1b7740 >; 265 regulator-always-on; 266 regulator-boot-on; 267 op_mode = < 0x01 >; 268 phandle = < 0x3f >; 269 }; 270 271 LDO11 { 272 regulator-name = "VDD_ABB2_1.8V"; 273 regulator-min-microvolt = < 0x1b7740 >; 274 regulator-max-microvolt = < 0x1b7740 >; 275 regulator-always-on; 276 regulator-boot-on; 277 op_mode = < 0x01 >; 278 }; 279 280 LDO12 { 281 regulator-name = "VDD_USB_3.0V"; 282 regulator-min-microvolt = < 0x2dc6c0 >; 283 regulator-max-microvolt = < 0x2dc6c0 >; 284 regulator-always-on; 285 regulator-boot-on; 286 op_mode = < 0x01 >; 287 }; 288 289 LDO13 { 290 regulator-name = "VDDQ_C2C_W_1.8V"; 291 regulator-min-microvolt = < 0x1b7740 >; 292 regulator-max-microvolt = < 0x1b7740 >; 293 regulator-always-on; 294 regulator-boot-on; 295 op_mode = < 0x01 >; 296 }; 297 298 LDO14 { 299 regulator-name = "VDD18_ABB0_3_1.8V"; 300 regulator-min-microvolt = < 0x1b7740 >; 301 regulator-max-microvolt = < 0x1b7740 >; 302 regulator-always-on; 303 regulator-boot-on; 304 op_mode = < 0x01 >; 305 }; 306 307 LDO15 { 308 regulator-name = "VDD10_COMMON4_1.0V"; 309 regulator-min-microvolt = < 0xf4240 >; 310 regulator-max-microvolt = < 0xf4240 >; 311 regulator-always-on; 312 regulator-boot-on; 313 op_mode = < 0x01 >; 314 }; 315 316 LDO16 { 317 regulator-name = "VDD18_HSIC_1.8V"; 318 regulator-min-microvolt = < 0x1b7740 >; 319 regulator-max-microvolt = < 0x1b7740 >; 320 regulator-always-on; 321 regulator-boot-on; 322 op_mode = < 0x01 >; 323 }; 324 325 LDO17 { 326 regulator-name = "VDDQ_MMC2_3_2.8V"; 327 regulator-min-microvolt = < 0x2ab980 >; 328 regulator-max-microvolt = < 0x2ab980 >; 329 regulator-always-on; 330 regulator-boot-on; 331 op_mode = < 0x01 >; 332 }; 333 334 LDO18 { 335 regulator-name = "VDD_33ON_2.8V"; 336 regulator-min-microvolt = < 0x2ab980 >; 337 regulator-max-microvolt = < 0x2ab980 >; 338 op_mode = < 0x01 >; 339 }; 340 341 LDO22 { 342 regulator-name = "EXT_33_OFF"; 343 regulator-min-microvolt = < 0x325aa0 >; 344 regulator-max-microvolt = < 0x325aa0 >; 345 op_mode = < 0x01 >; 346 }; 347 348 LDO23 { 349 regulator-name = "EXT_28_OFF"; 350 regulator-min-microvolt = < 0x2ab980 >; 351 regulator-max-microvolt = < 0x2ab980 >; 352 op_mode = < 0x01 >; 353 }; 354 355 LDO25 { 356 regulator-name = "PVDD_LDO25"; 357 regulator-min-microvolt = < 0x124f80 >; 358 regulator-max-microvolt = < 0x124f80 >; 359 op_mode = < 0x01 >; 360 }; 361 362 LDO26 { 363 regulator-name = "EXT_18_OFF"; 364 regulator-min-microvolt = < 0x1b7740 >; 365 regulator-max-microvolt = < 0x1b7740 >; 366 op_mode = < 0x01 >; 367 }; 368 369 BUCK1 { 370 regulator-name = "vdd_mif"; 371 regulator-min-microvolt = < 0xe7ef0 >; 372 regulator-max-microvolt = < 0x124f80 >; 373 regulator-always-on; 374 regulator-boot-on; 375 op_mode = < 0x01 >; 376 }; 377 378 BUCK2 { 379 regulator-name = "vdd_arm"; 380 regulator-min-microvolt = < 0xdec74 >; 381 regulator-max-microvolt = < 0x13d620 >; 382 regulator-always-on; 383 regulator-boot-on; 384 op_mode = < 0x01 >; 385 phandle = < 0x50 >; 386 }; 387 388 BUCK3 { 389 regulator-name = "vdd_int"; 390 regulator-min-microvolt = < 0xdbba0 >; 391 regulator-max-microvolt = < 0x124f80 >; 392 regulator-always-on; 393 regulator-boot-on; 394 op_mode = < 0x01 >; 395 }; 396 397 BUCK4 { 398 regulator-name = "vdd_g3d"; 399 regulator-min-microvolt = < 0xf4240 >; 400 regulator-max-microvolt = < 0xf4240 >; 401 regulator-always-on; 402 regulator-boot-on; 403 op_mode = < 0x01 >; 404 }; 405 406 BUCK5 { 407 regulator-name = "VDD_MEM_1.35V"; 408 regulator-min-microvolt = < 0xb71b0 >; 409 regulator-max-microvolt = < 0x14acf8 >; 410 regulator-always-on; 411 regulator-boot-on; 412 op_mode = < 0x01 >; 413 }; 414 415 BUCK7 { 416 regulator-name = "PVDD_BUCK7"; 417 regulator-always-on; 418 op_mode = < 0x01 >; 419 phandle = < 0x0a >; 420 }; 421 422 BUCK8 { 423 regulator-name = "PVDD_BUCK8"; 424 regulator-always-on; 425 op_mode = < 0x01 >; 426 phandle = < 0x0b >; 427 }; 428 429 BUCK9 { 430 regulator-name = "VDD_33_OFF_EXT1"; 431 regulator-min-microvolt = < 0xb71b0 >; 432 regulator-max-microvolt = < 0x2dc6c0 >; 433 op_mode = < 0x01 >; 434 }; 435 }; 436 }; 437 }; 438 439 i2c@12c70000 { 440 compatible = "samsung,s3c2440-i2c"; 441 reg = < 0x12c70000 0x100 >; 442 interrupts = < 0x00 0x39 0x04 >; 443 #address-cells = < 0x01 >; 444 #size-cells = < 0x00 >; 445 samsung,sysreg-phandle = < 0x05 >; 446 status = "disabled"; 447 clocks = < 0x02 0x127 >; 448 clock-names = "i2c"; 449 pinctrl-names = "default"; 450 pinctrl-0 = < 0x0e >; 451 }; 452 453 i2c@12c80000 { 454 compatible = "samsung,s3c2440-i2c"; 455 reg = < 0x12c80000 0x100 >; 456 interrupts = < 0x00 0x3a 0x04 >; 457 #address-cells = < 0x01 >; 458 #size-cells = < 0x00 >; 459 samsung,sysreg-phandle = < 0x05 >; 460 status = "disabled"; 461 clocks = < 0x02 0x128 >; 462 clock-names = "i2c"; 463 pinctrl-names = "default"; 464 pinctrl-0 = < 0x0f >; 465 }; 466 467 i2c@12c90000 { 468 compatible = "samsung,s3c2440-i2c"; 469 reg = < 0x12c90000 0x100 >; 470 interrupts = < 0x00 0x3b 0x04 >; 471 #address-cells = < 0x01 >; 472 #size-cells = < 0x00 >; 473 samsung,sysreg-phandle = < 0x05 >; 474 status = "okay"; 475 clocks = < 0x02 0x129 >; 476 clock-names = "i2c"; 477 pinctrl-names = "default"; 478 pinctrl-0 = < 0x10 >; 479 480 wm1811a@1a { 481 compatible = "wlf,wm1811"; 482 reg = < 0x1a >; 483 AVDD2-supply = < 0x09 >; 484 CPVDD-supply = < 0x09 >; 485 DBVDD1-supply = < 0x09 >; 486 DBVDD2-supply = < 0x09 >; 487 DBVDD3-supply = < 0x09 >; 488 LDO1VDD-supply = < 0x09 >; 489 SPKVDD1-supply = < 0x09 >; 490 SPKVDD2-supply = < 0x09 >; 491 wlf,ldo1ena = < 0x11 0x00 0x00 >; 492 wlf,ldo2ena = < 0x11 0x01 0x00 >; 493 }; 494 }; 495 496 pwm@12dd0000 { 497 compatible = "samsung,exynos4210-pwm"; 498 reg = < 0x12dd0000 0x100 >; 499 interrupts = < 0x00 0x24 0x04 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 >; 500 samsung,pwm-outputs = < 0x00 0x01 0x02 0x03 >; 501 #pwm-cells = < 0x03 >; 502 clocks = < 0x02 0x137 >; 503 clock-names = "timers"; 504 }; 505 506 rtc@101e0000 { 507 compatible = "samsung,s3c6410-rtc"; 508 reg = < 0x101e0000 0x100 >; 509 interrupts = < 0x00 0x2b 0x04 0x00 0x2c 0x04 >; 510 status = "okay"; 511 clocks = < 0x02 0x151 >; 512 clock-names = "rtc"; 513 interrupt-parent = < 0x12 >; 514 }; 515 516 fimd@14400000 { 517 compatible = "samsung,exynos5250-fimd"; 518 interrupt-parent = < 0x13 >; 519 reg = < 0x14400000 0x40000 >; 520 interrupt-names = "fifo\0vsync\0lcd_sys"; 521 interrupts = < 0x12 0x04 0x12 0x05 0x12 0x06 >; 522 samsung,sysreg = < 0x05 >; 523 status = "okay"; 524 power-domains = < 0x14 >; 525 clocks = < 0x02 0x85 0x02 0x153 >; 526 clock-names = "sclk_fimd\0fimd"; 527 iommus = < 0x15 >; 528 }; 529 530 dp-controller@145b0000 { 531 compatible = "samsung,exynos5-dp"; 532 reg = < 0x145b0000 0x1000 >; 533 interrupts = < 0x0a 0x03 >; 534 interrupt-parent = < 0x13 >; 535 status = "okay"; 536 power-domains = < 0x14 >; 537 clocks = < 0x02 0x156 >; 538 clock-names = "dp"; 539 phys = < 0x16 >; 540 phy-names = "dp"; 541 samsung,color-space = < 0x00 >; 542 samsung,color-depth = < 0x01 >; 543 samsung,link-rate = < 0x0a >; 544 samsung,lane-count = < 0x04 >; 545 546 display-timings { 547 native-mode = < 0x17 >; 548 549 timing { 550 clock-frequency = < 0xc350 >; 551 hactive = < 0xa00 >; 552 vactive = < 0x640 >; 553 hfront-porch = < 0x30 >; 554 hback-porch = < 0x50 >; 555 hsync-len = < 0x20 >; 556 vback-porch = < 0x10 >; 557 vfront-porch = < 0x08 >; 558 vsync-len = < 0x06 >; 559 phandle = < 0x17 >; 560 }; 561 }; 562 }; 563 564 sss@10830000 { 565 compatible = "samsung,exynos4210-secss"; 566 reg = < 0x10830000 0x300 >; 567 interrupts = < 0x00 0x70 0x04 >; 568 clocks = < 0x02 0x15c >; 569 clock-names = "secss"; 570 }; 571 572 rng@10830400 { 573 compatible = "samsung,exynos5250-prng"; 574 reg = < 0x10830400 0x200 >; 575 clocks = < 0x02 0x15c >; 576 clock-names = "secss"; 577 }; 578 579 rng@10830600 { 580 compatible = "samsung,exynos5250-trng"; 581 reg = < 0x10830600 0x100 >; 582 clocks = < 0x02 0x15c >; 583 clock-names = "secss"; 584 }; 585 586 g2d@10850000 { 587 compatible = "samsung,exynos5250-g2d"; 588 reg = < 0x10850000 0x1000 >; 589 interrupts = < 0x00 0x5b 0x04 >; 590 status = "okay"; 591 iommus = < 0x18 >; 592 clocks = < 0x02 0x159 >; 593 clock-names = "fimg2d"; 594 }; 595 596 sysram@2020000 { 597 compatible = "mmio-sram"; 598 reg = < 0x2020000 0x30000 >; 599 #address-cells = < 0x01 >; 600 #size-cells = < 0x01 >; 601 ranges = < 0x00 0x2020000 0x30000 >; 602 603 smp-sysram@0 { 604 compatible = "samsung,exynos4210-sysram"; 605 reg = < 0x00 0x1000 >; 606 }; 607 608 smp-sysram@2f000 { 609 compatible = "samsung,exynos4210-sysram-ns"; 610 reg = < 0x2f000 0x1000 >; 611 }; 612 }; 613 614 power-domain@10044000 { 615 compatible = "samsung,exynos4210-pd"; 616 reg = < 0x10044000 0x20 >; 617 #power-domain-cells = < 0x00 >; 618 label = "GSC"; 619 phandle = < 0x37 >; 620 }; 621 622 power-domain@10044040 { 623 compatible = "samsung,exynos4210-pd"; 624 reg = < 0x10044040 0x20 >; 625 #power-domain-cells = < 0x00 >; 626 label = "MFC"; 627 phandle = < 0x1b >; 628 }; 629 630 power-domain@10044060 { 631 compatible = "samsung,exynos4210-pd"; 632 reg = < 0x10044060 0x20 >; 633 #power-domain-cells = < 0x00 >; 634 label = "G3D"; 635 }; 636 637 power-domain@100440a0 { 638 compatible = "samsung,exynos4210-pd"; 639 reg = < 0x100440a0 0x20 >; 640 #power-domain-cells = < 0x00 >; 641 label = "DISP1"; 642 phandle = < 0x14 >; 643 }; 644 645 power-domain@100440c0 { 646 compatible = "samsung,exynos4210-pd"; 647 reg = < 0x100440c0 0x20 >; 648 #power-domain-cells = < 0x00 >; 649 label = "MAU"; 650 phandle = < 0x19 >; 651 }; 652 653 clock-controller@10010000 { 654 compatible = "samsung,exynos5250-clock"; 655 reg = < 0x10010000 0x30000 >; 656 #clock-cells = < 0x01 >; 657 phandle = < 0x02 >; 658 }; 659 660 audss-clock-controller@3810000 { 661 compatible = "samsung,exynos5250-audss-clock"; 662 reg = < 0x3810000 0x0c >; 663 #clock-cells = < 0x01 >; 664 clocks = < 0x02 0x01 0x02 0x07 0x02 0x8a 0x02 0xa0 >; 665 clock-names = "pll_ref\0pll_in\0sclk_audio\0sclk_pcm_in"; 666 power-domains = < 0x19 >; 667 phandle = < 0x31 >; 668 }; 669 670 timer { 671 compatible = "arm,armv7-timer"; 672 interrupts = < 0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08 >; 673 clock-frequency = < 0x16e3600 >; 674 }; 675 676 mct@101c0000 { 677 compatible = "samsung,exynos4210-mct"; 678 reg = < 0x101c0000 0x800 >; 679 interrupt-controller; 680 #interrupt-cells = < 0x02 >; 681 interrupt-parent = < 0x1a >; 682 interrupts = < 0x00 0x00 0x01 0x00 0x02 0x00 0x03 0x00 0x04 0x00 0x05 0x00 >; 683 clocks = < 0x02 0x01 0x02 0x14f >; 684 clock-names = "fin_pll\0mct"; 685 686 mct-map { 687 #interrupt-cells = < 0x02 >; 688 #address-cells = < 0x00 >; 689 #size-cells = < 0x00 >; 690 interrupt-map = < 0x00 0x00 0x13 0x17 0x03 0x01 0x00 0x13 0x17 0x04 0x02 0x00 0x13 0x19 0x02 0x03 0x00 0x13 0x19 0x03 0x04 0x00 0x01 0x00 0x78 0x04 0x05 0x00 0x01 0x00 0x79 0x04 >; 691 phandle = < 0x1a >; 692 }; 693 }; 694 695 pmu { 696 compatible = "arm,cortex-a15-pmu"; 697 interrupt-parent = < 0x13 >; 698 interrupts = < 0x01 0x02 0x16 0x04 >; 699 }; 700 701 pinctrl@11400000 { 702 compatible = "samsung,exynos5250-pinctrl"; 703 reg = < 0x11400000 0x1000 >; 704 interrupts = < 0x00 0x2e 0x04 >; 705 706 wakeup-interrupt-controller { 707 compatible = "samsung,exynos4210-wakeup-eint"; 708 interrupt-parent = < 0x01 >; 709 interrupts = < 0x00 0x20 0x04 >; 710 }; 711 712 gpa0 { 713 gpio-controller; 714 #gpio-cells = < 0x02 >; 715 interrupt-controller; 716 #interrupt-cells = < 0x02 >; 717 phandle = < 0x4a >; 718 }; 719 720 gpa1 { 721 gpio-controller; 722 #gpio-cells = < 0x02 >; 723 interrupt-controller; 724 #interrupt-cells = < 0x02 >; 725 }; 726 727 gpa2 { 728 gpio-controller; 729 #gpio-cells = < 0x02 >; 730 interrupt-controller; 731 #interrupt-cells = < 0x02 >; 732 }; 733 734 gpb0 { 735 gpio-controller; 736 #gpio-cells = < 0x02 >; 737 interrupt-controller; 738 #interrupt-cells = < 0x02 >; 739 phandle = < 0x11 >; 740 }; 741 742 gpb1 { 743 gpio-controller; 744 #gpio-cells = < 0x02 >; 745 interrupt-controller; 746 #interrupt-cells = < 0x02 >; 747 }; 748 749 gpb2 { 750 gpio-controller; 751 #gpio-cells = < 0x02 >; 752 interrupt-controller; 753 #interrupt-cells = < 0x02 >; 754 }; 755 756 gpb3 { 757 gpio-controller; 758 #gpio-cells = < 0x02 >; 759 interrupt-controller; 760 #interrupt-cells = < 0x02 >; 761 }; 762 763 gpc0 { 764 gpio-controller; 765 #gpio-cells = < 0x02 >; 766 interrupt-controller; 767 #interrupt-cells = < 0x02 >; 768 }; 769 770 gpc1 { 771 gpio-controller; 772 #gpio-cells = < 0x02 >; 773 interrupt-controller; 774 #interrupt-cells = < 0x02 >; 775 }; 776 777 gpc2 { 778 gpio-controller; 779 #gpio-cells = < 0x02 >; 780 interrupt-controller; 781 #interrupt-cells = < 0x02 >; 782 }; 783 784 gpc3 { 785 gpio-controller; 786 #gpio-cells = < 0x02 >; 787 interrupt-controller; 788 #interrupt-cells = < 0x02 >; 789 }; 790 791 gpd0 { 792 gpio-controller; 793 #gpio-cells = < 0x02 >; 794 interrupt-controller; 795 #interrupt-cells = < 0x02 >; 796 }; 797 798 gpd1 { 799 gpio-controller; 800 #gpio-cells = < 0x02 >; 801 interrupt-controller; 802 #interrupt-cells = < 0x02 >; 803 phandle = < 0x0c >; 804 }; 805 806 gpy0 { 807 gpio-controller; 808 #gpio-cells = < 0x02 >; 809 }; 810 811 gpy1 { 812 gpio-controller; 813 #gpio-cells = < 0x02 >; 814 }; 815 816 gpy2 { 817 gpio-controller; 818 #gpio-cells = < 0x02 >; 819 }; 820 821 gpy3 { 822 gpio-controller; 823 #gpio-cells = < 0x02 >; 824 }; 825 826 gpy4 { 827 gpio-controller; 828 #gpio-cells = < 0x02 >; 829 }; 830 831 gpy5 { 832 gpio-controller; 833 #gpio-cells = < 0x02 >; 834 }; 835 836 gpy6 { 837 gpio-controller; 838 #gpio-cells = < 0x02 >; 839 }; 840 841 gpc4 { 842 gpio-controller; 843 #gpio-cells = < 0x02 >; 844 interrupt-controller; 845 #interrupt-cells = < 0x02 >; 846 }; 847 848 gpx0 { 849 gpio-controller; 850 #gpio-cells = < 0x02 >; 851 interrupt-controller; 852 interrupt-parent = < 0x13 >; 853 #interrupt-cells = < 0x02 >; 854 interrupts = < 0x17 0x00 0x18 0x00 0x19 0x00 0x19 0x01 0x1a 0x00 0x1a 0x01 0x1b 0x00 0x1b 0x01 >; 855 }; 856 857 gpx1 { 858 gpio-controller; 859 #gpio-cells = < 0x02 >; 860 interrupt-controller; 861 interrupt-parent = < 0x13 >; 862 #interrupt-cells = < 0x02 >; 863 interrupts = < 0x1c 0x00 0x1c 0x01 0x1d 0x00 0x1d 0x01 0x1e 0x00 0x1e 0x01 0x1f 0x00 0x1f 0x01 >; 864 phandle = < 0x51 >; 865 }; 866 867 gpx2 { 868 gpio-controller; 869 #gpio-cells = < 0x02 >; 870 interrupt-controller; 871 #interrupt-cells = < 0x02 >; 872 phandle = < 0x0d >; 873 }; 874 875 gpx3 { 876 gpio-controller; 877 #gpio-cells = < 0x02 >; 878 interrupt-controller; 879 #interrupt-cells = < 0x02 >; 880 phandle = < 0x07 >; 881 }; 882 883 uart0-data { 884 samsung,pins = "gpa0-0\0gpa0-1"; 885 samsung,pin-function = < 0x02 >; 886 samsung,pin-pud = < 0x00 >; 887 samsung,pin-drv = < 0x00 >; 888 }; 889 890 uart0-fctl { 891 samsung,pins = "gpa0-2\0gpa0-3"; 892 samsung,pin-function = < 0x02 >; 893 samsung,pin-pud = < 0x00 >; 894 samsung,pin-drv = < 0x00 >; 895 }; 896 897 i2c2-bus { 898 samsung,pins = "gpa0-6\0gpa0-7"; 899 samsung,pin-function = < 0x03 >; 900 samsung,pin-pud = < 0x03 >; 901 samsung,pin-drv = < 0x00 >; 902 phandle = < 0x0f >; 903 }; 904 905 i2c2-hs-bus { 906 samsung,pins = "gpa0-6\0gpa0-7"; 907 samsung,pin-function = < 0x04 >; 908 samsung,pin-pud = < 0x03 >; 909 samsung,pin-drv = < 0x00 >; 910 }; 911 912 i2c2-gpio-bus { 913 samsung,pins = "gpa0-6\0gpa0-7"; 914 samsung,pin-pud = < 0x00 >; 915 samsung,pin-drv = < 0x00 >; 916 phandle = < 0x49 >; 917 }; 918 919 uart2-data { 920 samsung,pins = "gpa1-0\0gpa1-1"; 921 samsung,pin-function = < 0x02 >; 922 samsung,pin-pud = < 0x00 >; 923 samsung,pin-drv = < 0x00 >; 924 }; 925 926 uart2-fctl { 927 samsung,pins = "gpa1-2\0gpa1-3"; 928 samsung,pin-function = < 0x02 >; 929 samsung,pin-pud = < 0x00 >; 930 samsung,pin-drv = < 0x00 >; 931 }; 932 933 i2c3-bus { 934 samsung,pins = "gpa1-2\0gpa1-3"; 935 samsung,pin-function = < 0x03 >; 936 samsung,pin-pud = < 0x03 >; 937 samsung,pin-drv = < 0x00 >; 938 phandle = < 0x10 >; 939 }; 940 941 i2c3-hs-bus { 942 samsung,pins = "gpa1-2\0gpa1-3"; 943 samsung,pin-function = < 0x04 >; 944 samsung,pin-pud = < 0x03 >; 945 samsung,pin-drv = < 0x00 >; 946 }; 947 948 uart3-data { 949 samsung,pins = "gpa1-4\0gpa1-4"; 950 samsung,pin-function = < 0x02 >; 951 samsung,pin-pud = < 0x00 >; 952 samsung,pin-drv = < 0x00 >; 953 }; 954 955 spi0-bus { 956 samsung,pins = "gpa2-0\0gpa2-2\0gpa2-3"; 957 samsung,pin-function = < 0x02 >; 958 samsung,pin-pud = < 0x03 >; 959 samsung,pin-drv = < 0x00 >; 960 phandle = < 0x25 >; 961 }; 962 963 i2c4-bus { 964 samsung,pins = "gpa2-0\0gpa2-1"; 965 samsung,pin-function = < 0x03 >; 966 samsung,pin-pud = < 0x03 >; 967 samsung,pin-drv = < 0x00 >; 968 phandle = < 0x21 >; 969 }; 970 971 i2c5-bus { 972 samsung,pins = "gpa2-2\0gpa2-3"; 973 samsung,pin-function = < 0x03 >; 974 samsung,pin-pud = < 0x03 >; 975 samsung,pin-drv = < 0x00 >; 976 phandle = < 0x22 >; 977 }; 978 979 spi1-bus { 980 samsung,pins = "gpa2-4\0gpa2-6\0gpa2-7"; 981 samsung,pin-function = < 0x02 >; 982 samsung,pin-pud = < 0x03 >; 983 samsung,pin-drv = < 0x00 >; 984 phandle = < 0x26 >; 985 }; 986 987 i2s1-bus { 988 samsung,pins = "gpb0-0\0gpb0-1\0gpb0-2\0gpb0-3\0gpb0-4"; 989 samsung,pin-function = < 0x02 >; 990 samsung,pin-pud = < 0x00 >; 991 samsung,pin-drv = < 0x00 >; 992 phandle = < 0x33 >; 993 }; 994 995 pcm1-bus { 996 samsung,pins = "gpb0-0\0gpb0-1\0gpb0-2\0gpb0-3\0gpb0-4"; 997 samsung,pin-function = < 0x03 >; 998 samsung,pin-pud = < 0x00 >; 999 samsung,pin-drv = < 0x00 >; 1000 }; 1001 1002 ac97-bus { 1003 samsung,pins = "gpb0-0\0gpb0-1\0gpb0-2\0gpb0-3\0gpb0-4"; 1004 samsung,pin-function = < 0x04 >; 1005 samsung,pin-pud = < 0x00 >; 1006 samsung,pin-drv = < 0x00 >; 1007 }; 1008 1009 i2s2-bus { 1010 samsung,pins = "gpb1-0\0gpb1-1\0gpb1-2\0gpb1-3\0gpb1-4"; 1011 samsung,pin-function = < 0x02 >; 1012 samsung,pin-pud = < 0x00 >; 1013 samsung,pin-drv = < 0x00 >; 1014 phandle = < 0x34 >; 1015 }; 1016 1017 pcm2-bus { 1018 samsung,pins = "gpb1-0\0gpb1-1\0gpb1-2\0gpb1-3\0gpb1-4"; 1019 samsung,pin-function = < 0x03 >; 1020 samsung,pin-pud = < 0x00 >; 1021 samsung,pin-drv = < 0x00 >; 1022 }; 1023 1024 spdif-bus { 1025 samsung,pins = "gpb1-0\0gpb1-1"; 1026 samsung,pin-function = < 0x04 >; 1027 samsung,pin-pud = < 0x00 >; 1028 samsung,pin-drv = < 0x00 >; 1029 }; 1030 1031 spi2-bus { 1032 samsung,pins = "gpb1-1\0gpb1-3\0gpb1-4"; 1033 samsung,pin-function = < 0x05 >; 1034 samsung,pin-pud = < 0x03 >; 1035 samsung,pin-drv = < 0x00 >; 1036 phandle = < 0x27 >; 1037 }; 1038 1039 i2c6-bus { 1040 samsung,pins = "gpb1-3\0gpb1-4"; 1041 samsung,pin-function = < 0x04 >; 1042 samsung,pin-pud = < 0x03 >; 1043 samsung,pin-drv = < 0x00 >; 1044 phandle = < 0x23 >; 1045 }; 1046 1047 pwm0-out { 1048 samsung,pins = "gpb2-0"; 1049 samsung,pin-function = < 0x02 >; 1050 samsung,pin-pud = < 0x00 >; 1051 samsung,pin-drv = < 0x00 >; 1052 }; 1053 1054 pwm1-out { 1055 samsung,pins = "gpb2-1"; 1056 samsung,pin-function = < 0x02 >; 1057 samsung,pin-pud = < 0x00 >; 1058 samsung,pin-drv = < 0x00 >; 1059 }; 1060 1061 pwm2-out { 1062 samsung,pins = "gpb2-2"; 1063 samsung,pin-function = < 0x02 >; 1064 samsung,pin-pud = < 0x00 >; 1065 samsung,pin-drv = < 0x00 >; 1066 }; 1067 1068 pwm3-out { 1069 samsung,pins = "gpb2-3"; 1070 samsung,pin-function = < 0x02 >; 1071 samsung,pin-pud = < 0x00 >; 1072 samsung,pin-drv = < 0x00 >; 1073 }; 1074 1075 i2c7-bus { 1076 samsung,pins = "gpb2-2\0gpb2-3"; 1077 samsung,pin-function = < 0x03 >; 1078 samsung,pin-pud = < 0x03 >; 1079 samsung,pin-drv = < 0x00 >; 1080 phandle = < 0x24 >; 1081 }; 1082 1083 i2c0-bus { 1084 samsung,pins = "gpb3-0\0gpb3-1"; 1085 samsung,pin-function = < 0x02 >; 1086 samsung,pin-pud = < 0x03 >; 1087 samsung,pin-drv = < 0x00 >; 1088 phandle = < 0x06 >; 1089 }; 1090 1091 i2c1-bus { 1092 samsung,pins = "gpb3-2\0gpb3-3"; 1093 samsung,pin-function = < 0x02 >; 1094 samsung,pin-pud = < 0x03 >; 1095 samsung,pin-drv = < 0x00 >; 1096 phandle = < 0x0e >; 1097 }; 1098 1099 i2c0-hs-bus { 1100 samsung,pins = "gpb3-0\0gpb3-1"; 1101 samsung,pin-function = < 0x04 >; 1102 samsung,pin-pud = < 0x03 >; 1103 samsung,pin-drv = < 0x00 >; 1104 }; 1105 1106 i2c1-hs-bus { 1107 samsung,pins = "gpb3-2\0gpb3-3"; 1108 samsung,pin-function = < 0x04 >; 1109 samsung,pin-pud = < 0x03 >; 1110 samsung,pin-drv = < 0x00 >; 1111 }; 1112 1113 sd0-clk { 1114 samsung,pins = "gpc0-0"; 1115 samsung,pin-function = < 0x02 >; 1116 samsung,pin-pud = < 0x00 >; 1117 samsung,pin-drv = < 0x03 >; 1118 phandle = < 0x29 >; 1119 }; 1120 1121 sd0-cmd { 1122 samsung,pins = "gpc0-1"; 1123 samsung,pin-function = < 0x02 >; 1124 samsung,pin-pud = < 0x00 >; 1125 samsung,pin-drv = < 0x03 >; 1126 phandle = < 0x2a >; 1127 }; 1128 1129 sd0-cd { 1130 samsung,pins = "gpc0-2"; 1131 samsung,pin-function = < 0x02 >; 1132 samsung,pin-pud = < 0x03 >; 1133 samsung,pin-drv = < 0x03 >; 1134 }; 1135 1136 sd0-bus-width1 { 1137 samsung,pins = "gpc0-3"; 1138 samsung,pin-function = < 0x02 >; 1139 samsung,pin-pud = < 0x03 >; 1140 samsung,pin-drv = < 0x03 >; 1141 }; 1142 1143 sd0-bus-width4 { 1144 samsung,pins = "gpc0-3\0gpc0-4\0gpc0-5\0gpc0-6"; 1145 samsung,pin-function = < 0x02 >; 1146 samsung,pin-pud = < 0x03 >; 1147 samsung,pin-drv = < 0x03 >; 1148 phandle = < 0x2b >; 1149 }; 1150 1151 sd0-bus-width8 { 1152 samsung,pins = "gpc1-0\0gpc1-1\0gpc1-2\0gpc1-3"; 1153 samsung,pin-function = < 0x02 >; 1154 samsung,pin-pud = < 0x03 >; 1155 samsung,pin-drv = < 0x03 >; 1156 phandle = < 0x2c >; 1157 }; 1158 1159 sd1-clk { 1160 samsung,pins = "gpc2-0"; 1161 samsung,pin-function = < 0x02 >; 1162 samsung,pin-pud = < 0x00 >; 1163 samsung,pin-drv = < 0x03 >; 1164 }; 1165 1166 sd1-cmd { 1167 samsung,pins = "gpc2-1"; 1168 samsung,pin-function = < 0x02 >; 1169 samsung,pin-pud = < 0x00 >; 1170 samsung,pin-drv = < 0x03 >; 1171 }; 1172 1173 sd1-cd { 1174 samsung,pins = "gpc2-2"; 1175 samsung,pin-function = < 0x02 >; 1176 samsung,pin-pud = < 0x03 >; 1177 samsung,pin-drv = < 0x03 >; 1178 }; 1179 1180 sd1-bus-width1 { 1181 samsung,pins = "gpc2-3"; 1182 samsung,pin-function = < 0x02 >; 1183 samsung,pin-pud = < 0x03 >; 1184 samsung,pin-drv = < 0x03 >; 1185 }; 1186 1187 sd1-bus-width4 { 1188 samsung,pins = "gpc2-3\0gpc2-4\0gpc2-5\0gpc2-6"; 1189 samsung,pin-function = < 0x02 >; 1190 samsung,pin-pud = < 0x03 >; 1191 samsung,pin-drv = < 0x03 >; 1192 }; 1193 1194 sd2-clk { 1195 samsung,pins = "gpc3-0"; 1196 samsung,pin-function = < 0x02 >; 1197 samsung,pin-pud = < 0x00 >; 1198 samsung,pin-drv = < 0x03 >; 1199 phandle = < 0x2d >; 1200 }; 1201 1202 sd2-cmd { 1203 samsung,pins = "gpc3-1"; 1204 samsung,pin-function = < 0x02 >; 1205 samsung,pin-pud = < 0x00 >; 1206 samsung,pin-drv = < 0x03 >; 1207 phandle = < 0x2e >; 1208 }; 1209 1210 sd2-cd { 1211 samsung,pins = "gpc3-2"; 1212 samsung,pin-function = < 0x02 >; 1213 samsung,pin-pud = < 0x03 >; 1214 samsung,pin-drv = < 0x03 >; 1215 phandle = < 0x2f >; 1216 }; 1217 1218 sd2-bus-width1 { 1219 samsung,pins = "gpc3-3"; 1220 samsung,pin-function = < 0x02 >; 1221 samsung,pin-pud = < 0x03 >; 1222 samsung,pin-drv = < 0x03 >; 1223 }; 1224 1225 sd2-bus-width4 { 1226 samsung,pins = "gpc3-3\0gpc3-4\0gpc3-5\0gpc3-6"; 1227 samsung,pin-function = < 0x02 >; 1228 samsung,pin-pud = < 0x03 >; 1229 samsung,pin-drv = < 0x03 >; 1230 phandle = < 0x30 >; 1231 }; 1232 1233 sd2-bus-width8 { 1234 samsung,pins = "gpc4-3\0gpc4-4\0gpc4-5\0gpc4-6"; 1235 samsung,pin-function = < 0x03 >; 1236 samsung,pin-pud = < 0x03 >; 1237 samsung,pin-drv = < 0x03 >; 1238 }; 1239 1240 sd3-clk { 1241 samsung,pins = "gpc4-0"; 1242 samsung,pin-function = < 0x02 >; 1243 samsung,pin-pud = < 0x00 >; 1244 samsung,pin-drv = < 0x03 >; 1245 }; 1246 1247 sd3-cmd { 1248 samsung,pins = "gpc4-1"; 1249 samsung,pin-function = < 0x02 >; 1250 samsung,pin-pud = < 0x00 >; 1251 samsung,pin-drv = < 0x03 >; 1252 }; 1253 1254 sd3-cd { 1255 samsung,pins = "gpc4-2"; 1256 samsung,pin-function = < 0x02 >; 1257 samsung,pin-pud = < 0x03 >; 1258 samsung,pin-drv = < 0x03 >; 1259 }; 1260 1261 sd3-bus-width1 { 1262 samsung,pins = "gpc4-3"; 1263 samsung,pin-function = < 0x02 >; 1264 samsung,pin-pud = < 0x03 >; 1265 samsung,pin-drv = < 0x03 >; 1266 }; 1267 1268 sd3-bus-width4 { 1269 samsung,pins = "gpc4-3\0gpc4-4\0gpc4-5\0gpc4-6"; 1270 samsung,pin-function = < 0x02 >; 1271 samsung,pin-pud = < 0x03 >; 1272 samsung,pin-drv = < 0x03 >; 1273 }; 1274 1275 uart1-data { 1276 samsung,pins = "gpd0-0\0gpd0-1"; 1277 samsung,pin-function = < 0x02 >; 1278 samsung,pin-pud = < 0x00 >; 1279 samsung,pin-drv = < 0x00 >; 1280 }; 1281 1282 uart1-fctl { 1283 samsung,pins = "gpd0-2\0gpd0-3"; 1284 samsung,pin-function = < 0x02 >; 1285 samsung,pin-pud = < 0x00 >; 1286 samsung,pin-drv = < 0x00 >; 1287 }; 1288 1289 dp_hpd { 1290 samsung,pins = "gpx0-7"; 1291 samsung,pin-function = < 0x03 >; 1292 samsung,pin-pud = < 0x00 >; 1293 samsung,pin-drv = < 0x00 >; 1294 }; 1295 1296 hdmi-cec { 1297 samsung,pins = "gpx3-6"; 1298 samsung,pin-function = < 0x03 >; 1299 samsung,pin-pud = < 0x00 >; 1300 samsung,pin-drv = < 0x00 >; 1301 phandle = < 0x42 >; 1302 }; 1303 1304 hdmi-hpd { 1305 samsung,pins = "gpx3-7"; 1306 samsung,pin-pud = < 0x00 >; 1307 phandle = < 0x3d >; 1308 }; 1309 1310 s5m8767-irq { 1311 samsung,pins = "gpx3-2"; 1312 samsung,pin-pud = < 0x00 >; 1313 phandle = < 0x08 >; 1314 }; 1315 }; 1316 1317 pinctrl@13400000 { 1318 compatible = "samsung,exynos5250-pinctrl"; 1319 reg = < 0x13400000 0x1000 >; 1320 interrupts = < 0x00 0x2d 0x04 >; 1321 1322 gpe0 { 1323 gpio-controller; 1324 #gpio-cells = < 0x02 >; 1325 interrupt-controller; 1326 #interrupt-cells = < 0x02 >; 1327 }; 1328 1329 gpe1 { 1330 gpio-controller; 1331 #gpio-cells = < 0x02 >; 1332 interrupt-controller; 1333 #interrupt-cells = < 0x02 >; 1334 }; 1335 1336 gpf0 { 1337 gpio-controller; 1338 #gpio-cells = < 0x02 >; 1339 interrupt-controller; 1340 #interrupt-cells = < 0x02 >; 1341 }; 1342 1343 gpf1 { 1344 gpio-controller; 1345 #gpio-cells = < 0x02 >; 1346 interrupt-controller; 1347 #interrupt-cells = < 0x02 >; 1348 }; 1349 1350 gpg0 { 1351 gpio-controller; 1352 #gpio-cells = < 0x02 >; 1353 interrupt-controller; 1354 #interrupt-cells = < 0x02 >; 1355 }; 1356 1357 gpg1 { 1358 gpio-controller; 1359 #gpio-cells = < 0x02 >; 1360 interrupt-controller; 1361 #interrupt-cells = < 0x02 >; 1362 }; 1363 1364 gpg2 { 1365 gpio-controller; 1366 #gpio-cells = < 0x02 >; 1367 interrupt-controller; 1368 #interrupt-cells = < 0x02 >; 1369 }; 1370 1371 gph0 { 1372 gpio-controller; 1373 #gpio-cells = < 0x02 >; 1374 interrupt-controller; 1375 #interrupt-cells = < 0x02 >; 1376 }; 1377 1378 gph1 { 1379 gpio-controller; 1380 #gpio-cells = < 0x02 >; 1381 interrupt-controller; 1382 #interrupt-cells = < 0x02 >; 1383 }; 1384 1385 cam-gpio-a { 1386 samsung,pins = "gpe0-0\0gpe0-1\0gpe0-2\0gpe0-3\0gpe0-4\0gpe0-5\0gpe0-6\0gpe0-7\0gpe1-0\0gpe1-1"; 1387 samsung,pin-function = < 0x02 >; 1388 samsung,pin-pud = < 0x00 >; 1389 samsung,pin-drv = < 0x00 >; 1390 }; 1391 1392 cam-gpio-b { 1393 samsung,pins = "gpf0-0\0gpf0-1\0gpf0-2\0gpf0-3\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3"; 1394 samsung,pin-function = < 0x03 >; 1395 samsung,pin-pud = < 0x00 >; 1396 samsung,pin-drv = < 0x00 >; 1397 }; 1398 1399 cam-i2c2-bus { 1400 samsung,pins = "gpe0-6\0gpe1-0"; 1401 samsung,pin-function = < 0x04 >; 1402 samsung,pin-pud = < 0x03 >; 1403 samsung,pin-drv = < 0x00 >; 1404 }; 1405 1406 cam-spi1-bus { 1407 samsung,pins = "gpe0-4\0gpe0-5\0gpf0-2\0gpf0-3"; 1408 samsung,pin-function = < 0x04 >; 1409 samsung,pin-pud = < 0x00 >; 1410 samsung,pin-drv = < 0x00 >; 1411 }; 1412 1413 cam-i2c1-bus { 1414 samsung,pins = "gpf0-2\0gpf0-3"; 1415 samsung,pin-function = < 0x02 >; 1416 samsung,pin-pud = < 0x03 >; 1417 samsung,pin-drv = < 0x00 >; 1418 }; 1419 1420 cam-i2c0-bus { 1421 samsung,pins = "gpf0-0\0gpf0-1"; 1422 samsung,pin-function = < 0x02 >; 1423 samsung,pin-pud = < 0x03 >; 1424 samsung,pin-drv = < 0x00 >; 1425 }; 1426 1427 cam-spi0-bus { 1428 samsung,pins = "gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3"; 1429 samsung,pin-function = < 0x02 >; 1430 samsung,pin-pud = < 0x00 >; 1431 samsung,pin-drv = < 0x00 >; 1432 }; 1433 1434 cam-bayrgb-bus { 1435 samsung,pins = "gpg0-0\0gpg0-1\0gpg0-2\0gpg0-3\0gpg0-4\0gpg0-5\0gpg0-6\0gpg0-7\0gpg1-0\0gpg1-1\0gpg1-2\0gpg1-3\0gpg1-4\0gpg1-5\0gpg1-6\0gpg1-7\0gpg2-0\0gpg2-1"; 1436 samsung,pin-function = < 0x02 >; 1437 samsung,pin-pud = < 0x00 >; 1438 samsung,pin-drv = < 0x00 >; 1439 }; 1440 1441 cam-port-a { 1442 samsung,pins = "gph0-0\0gph0-1\0gph0-2\0gph0-3\0gph1-0\0gph1-1\0gph1-2\0gph1-3\0gph1-4\0gph1-5\0gph1-6\0gph1-7"; 1443 samsung,pin-function = < 0x02 >; 1444 samsung,pin-pud = < 0x00 >; 1445 samsung,pin-drv = < 0x00 >; 1446 }; 1447 }; 1448 1449 pinctrl@10d10000 { 1450 compatible = "samsung,exynos5250-pinctrl"; 1451 reg = < 0x10d10000 0x1000 >; 1452 interrupts = < 0x00 0x32 0x04 >; 1453 1454 gpv0 { 1455 gpio-controller; 1456 #gpio-cells = < 0x02 >; 1457 interrupt-controller; 1458 #interrupt-cells = < 0x02 >; 1459 }; 1460 1461 gpv1 { 1462 gpio-controller; 1463 #gpio-cells = < 0x02 >; 1464 interrupt-controller; 1465 #interrupt-cells = < 0x02 >; 1466 }; 1467 1468 gpv2 { 1469 gpio-controller; 1470 #gpio-cells = < 0x02 >; 1471 interrupt-controller; 1472 #interrupt-cells = < 0x02 >; 1473 }; 1474 1475 gpv3 { 1476 gpio-controller; 1477 #gpio-cells = < 0x02 >; 1478 interrupt-controller; 1479 #interrupt-cells = < 0x02 >; 1480 }; 1481 1482 gpv4 { 1483 gpio-controller; 1484 #gpio-cells = < 0x02 >; 1485 interrupt-controller; 1486 #interrupt-cells = < 0x02 >; 1487 }; 1488 1489 c2c-rxd { 1490 samsung,pins = "gpv0-0\0gpv0-1\0gpv0-2\0gpv0-3\0gpv0-4\0gpv0-5\0gpv0-6\0gpv0-7\0gpv1-0\0gpv1-1\0gpv1-2\0gpv1-3\0gpv1-4\0gpv1-5\0gpv1-6\0gpv1-7"; 1491 samsung,pin-function = < 0x02 >; 1492 samsung,pin-pud = < 0x00 >; 1493 samsung,pin-drv = < 0x00 >; 1494 }; 1495 1496 c2c-txd { 1497 samsung,pins = "gpv2-0\0gpv2-1\0gpv2-2\0gpv2-3\0gpv2-4\0gpv2-5\0gpv2-6\0gpv2-7\0gpv3-0\0gpv3-1\0gpv3-2\0gpv3-3\0gpv3-4\0gpv3-5\0gpv3-6\0gpv3-7"; 1498 samsung,pin-function = < 0x02 >; 1499 samsung,pin-pud = < 0x00 >; 1500 samsung,pin-drv = < 0x00 >; 1501 }; 1502 }; 1503 1504 pinctrl@3860000 { 1505 compatible = "samsung,exynos5250-pinctrl"; 1506 reg = < 0x3860000 0x1000 >; 1507 interrupts = < 0x00 0x2f 0x04 >; 1508 power-domains = < 0x19 >; 1509 1510 gpz { 1511 gpio-controller; 1512 #gpio-cells = < 0x02 >; 1513 interrupt-controller; 1514 #interrupt-cells = < 0x02 >; 1515 }; 1516 1517 i2s0-bus { 1518 samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4\0gpz-5\0gpz-6"; 1519 samsung,pin-function = < 0x02 >; 1520 samsung,pin-pud = < 0x00 >; 1521 samsung,pin-drv = < 0x00 >; 1522 phandle = < 0x32 >; 1523 }; 1524 }; 1525 1526 system-controller@10040000 { 1527 compatible = "samsung,exynos5250-pmu\0syscon"; 1528 reg = < 0x10040000 0x5000 >; 1529 clock-names = "clkout16"; 1530 clocks = < 0x02 0x01 >; 1531 #clock-cells = < 0x01 >; 1532 interrupt-controller; 1533 #interrupt-cells = < 0x03 >; 1534 interrupt-parent = < 0x01 >; 1535 phandle = < 0x12 >; 1536 1537 syscon-poweroff { 1538 compatible = "syscon-poweroff"; 1539 regmap = < 0x12 >; 1540 offset = < 0x330c >; 1541 mask = < 0x5200 >; 1542 }; 1543 1544 syscon-reboot { 1545 compatible = "syscon-reboot"; 1546 regmap = < 0x12 >; 1547 offset = < 0x400 >; 1548 mask = < 0x01 >; 1549 }; 1550 }; 1551 1552 watchdog@101d0000 { 1553 compatible = "samsung,exynos5250-wdt"; 1554 reg = < 0x101d0000 0x100 >; 1555 interrupts = < 0x00 0x2a 0x04 >; 1556 clocks = < 0x02 0x150 >; 1557 clock-names = "watchdog"; 1558 samsung,syscon-phandle = < 0x12 >; 1559 }; 1560 1561 codec@11000000 { 1562 compatible = "samsung,mfc-v6"; 1563 reg = < 0x11000000 0x10000 >; 1564 interrupts = < 0x00 0x60 0x04 >; 1565 power-domains = < 0x1b >; 1566 clocks = < 0x02 0x10a >; 1567 clock-names = "mfc"; 1568 iommus = < 0x1c 0x1d >; 1569 iommu-names = "left\0right"; 1570 }; 1571 1572 rotator@11c00000 { 1573 compatible = "samsung,exynos5250-rotator"; 1574 reg = < 0x11c00000 0x64 >; 1575 interrupts = < 0x00 0x54 0x04 >; 1576 clocks = < 0x02 0x10d >; 1577 clock-names = "rotator"; 1578 iommus = < 0x1e >; 1579 }; 1580 1581 tmu@10060000 { 1582 compatible = "samsung,exynos5250-tmu"; 1583 reg = < 0x10060000 0x100 >; 1584 interrupts = < 0x00 0x41 0x04 >; 1585 clocks = < 0x02 0x152 >; 1586 clock-names = "tmu_apbif"; 1587 #thermal-sensor-cells = < 0x00 >; 1588 phandle = < 0x4b >; 1589 }; 1590 1591 sata@122f0000 { 1592 compatible = "snps,dwc-ahci"; 1593 samsung,sata-freq = < 0x42 >; 1594 reg = < 0x122f0000 0x1ff >; 1595 interrupts = < 0x00 0x73 0x04 >; 1596 clocks = < 0x02 0x115 0x02 0x8f >; 1597 clock-names = "sata\0sclk_sata"; 1598 phys = < 0x1f >; 1599 phy-names = "sata-phy"; 1600 status = "okay"; 1601 }; 1602 1603 sata-phy@12170000 { 1604 compatible = "samsung,exynos5250-sata-phy"; 1605 reg = < 0x12170000 0x1ff >; 1606 clocks = < 0x02 0x11f >; 1607 clock-names = "sata_phyctrl"; 1608 #phy-cells = < 0x00 >; 1609 samsung,syscon-phandle = < 0x12 >; 1610 status = "okay"; 1611 samsung,exynos-sataphy-i2c-phandle = < 0x20 >; 1612 phandle = < 0x1f >; 1613 }; 1614 1615 i2c@12ca0000 { 1616 compatible = "samsung,s3c2440-i2c"; 1617 reg = < 0x12ca0000 0x100 >; 1618 interrupts = < 0x00 0x3c 0x04 >; 1619 #address-cells = < 0x01 >; 1620 #size-cells = < 0x00 >; 1621 clocks = < 0x02 0x12a >; 1622 clock-names = "i2c"; 1623 pinctrl-names = "default"; 1624 pinctrl-0 = < 0x21 >; 1625 status = "disabled"; 1626 }; 1627 1628 i2c@12cb0000 { 1629 compatible = "samsung,s3c2440-i2c"; 1630 reg = < 0x12cb0000 0x100 >; 1631 interrupts = < 0x00 0x3d 0x04 >; 1632 #address-cells = < 0x01 >; 1633 #size-cells = < 0x00 >; 1634 clocks = < 0x02 0x12b >; 1635 clock-names = "i2c"; 1636 pinctrl-names = "default"; 1637 pinctrl-0 = < 0x22 >; 1638 status = "disabled"; 1639 }; 1640 1641 i2c@12cc0000 { 1642 compatible = "samsung,s3c2440-i2c"; 1643 reg = < 0x12cc0000 0x100 >; 1644 interrupts = < 0x00 0x3e 0x04 >; 1645 #address-cells = < 0x01 >; 1646 #size-cells = < 0x00 >; 1647 clocks = < 0x02 0x12c >; 1648 clock-names = "i2c"; 1649 pinctrl-names = "default"; 1650 pinctrl-0 = < 0x23 >; 1651 status = "disabled"; 1652 }; 1653 1654 i2c@12cd0000 { 1655 compatible = "samsung,s3c2440-i2c"; 1656 reg = < 0x12cd0000 0x100 >; 1657 interrupts = < 0x00 0x3f 0x04 >; 1658 #address-cells = < 0x01 >; 1659 #size-cells = < 0x00 >; 1660 clocks = < 0x02 0x12d >; 1661 clock-names = "i2c"; 1662 pinctrl-names = "default"; 1663 pinctrl-0 = < 0x24 >; 1664 status = "disabled"; 1665 }; 1666 1667 i2c@12ce0000 { 1668 compatible = "samsung,s3c2440-hdmiphy-i2c"; 1669 reg = < 0x12ce0000 0x1000 >; 1670 interrupts = < 0x00 0x40 0x04 >; 1671 #address-cells = < 0x01 >; 1672 #size-cells = < 0x00 >; 1673 clocks = < 0x02 0x12e >; 1674 clock-names = "i2c"; 1675 status = "okay"; 1676 samsung,i2c-sda-delay = < 0x64 >; 1677 samsung,i2c-max-bus-freq = < 0x101d0 >; 1678 1679 hdmiphy@38 { 1680 compatible = "samsung,exynos4212-hdmiphy"; 1681 reg = < 0x38 >; 1682 phandle = < 0x3c >; 1683 }; 1684 }; 1685 1686 i2c@121d0000 { 1687 compatible = "samsung,exynos5-sata-phy-i2c"; 1688 reg = < 0x121d0000 0x100 >; 1689 #address-cells = < 0x01 >; 1690 #size-cells = < 0x00 >; 1691 clocks = < 0x02 0x120 >; 1692 clock-names = "i2c"; 1693 status = "okay"; 1694 samsung,i2c-sda-delay = < 0x64 >; 1695 samsung,i2c-max-bus-freq = < 0x9c40 >; 1696 samsung,i2c-slave-addr = < 0x38 >; 1697 1698 sata-phy@38 { 1699 compatible = "samsung,exynos-sataphy-i2c"; 1700 reg = < 0x38 >; 1701 phandle = < 0x20 >; 1702 }; 1703 }; 1704 1705 spi@12d20000 { 1706 compatible = "samsung,exynos4210-spi"; 1707 status = "disabled"; 1708 reg = < 0x12d20000 0x100 >; 1709 interrupts = < 0x00 0x42 0x04 >; 1710 dmas = < 0x03 0x05 0x03 0x04 >; 1711 dma-names = "tx\0rx"; 1712 #address-cells = < 0x01 >; 1713 #size-cells = < 0x00 >; 1714 clocks = < 0x02 0x130 0x02 0x9a >; 1715 clock-names = "spi\0spi_busclk0"; 1716 pinctrl-names = "default"; 1717 pinctrl-0 = < 0x25 >; 1718 }; 1719 1720 spi@12d30000 { 1721 compatible = "samsung,exynos4210-spi"; 1722 status = "disabled"; 1723 reg = < 0x12d30000 0x100 >; 1724 interrupts = < 0x00 0x43 0x04 >; 1725 dmas = < 0x04 0x05 0x04 0x04 >; 1726 dma-names = "tx\0rx"; 1727 #address-cells = < 0x01 >; 1728 #size-cells = < 0x00 >; 1729 clocks = < 0x02 0x131 0x02 0x9b >; 1730 clock-names = "spi\0spi_busclk0"; 1731 pinctrl-names = "default"; 1732 pinctrl-0 = < 0x26 >; 1733 }; 1734 1735 spi@12d40000 { 1736 compatible = "samsung,exynos4210-spi"; 1737 status = "disabled"; 1738 reg = < 0x12d40000 0x100 >; 1739 interrupts = < 0x00 0x44 0x04 >; 1740 dmas = < 0x03 0x07 0x03 0x06 >; 1741 dma-names = "tx\0rx"; 1742 #address-cells = < 0x01 >; 1743 #size-cells = < 0x00 >; 1744 clocks = < 0x02 0x132 0x02 0x9c >; 1745 clock-names = "spi\0spi_busclk0"; 1746 pinctrl-names = "default"; 1747 pinctrl-0 = < 0x27 >; 1748 }; 1749 1750 mmc@12200000 { 1751 compatible = "samsung,exynos5250-dw-mshc"; 1752 interrupts = < 0x00 0x4b 0x04 >; 1753 #address-cells = < 0x01 >; 1754 #size-cells = < 0x00 >; 1755 reg = < 0x12200000 0x1000 >; 1756 clocks = < 0x02 0x118 0x02 0x8b >; 1757 clock-names = "biu\0ciu"; 1758 fifo-depth = < 0x80 >; 1759 status = "okay"; 1760 broken-cd; 1761 card-detect-delay = < 0xc8 >; 1762 samsung,dw-mshc-ciu-div = < 0x03 >; 1763 samsung,dw-mshc-sdr-timing = < 0x02 0x03 >; 1764 samsung,dw-mshc-ddr-timing = < 0x01 0x02 >; 1765 vmmc-supply = < 0x28 >; 1766 pinctrl-names = "default"; 1767 pinctrl-0 = < 0x29 0x2a 0x2b 0x2c >; 1768 bus-width = < 0x08 >; 1769 cap-mmc-highspeed; 1770 }; 1771 1772 mmc@12210000 { 1773 compatible = "samsung,exynos5250-dw-mshc"; 1774 interrupts = < 0x00 0x4c 0x04 >; 1775 #address-cells = < 0x01 >; 1776 #size-cells = < 0x00 >; 1777 reg = < 0x12210000 0x1000 >; 1778 clocks = < 0x02 0x119 0x02 0x8c >; 1779 clock-names = "biu\0ciu"; 1780 fifo-depth = < 0x80 >; 1781 status = "disabled"; 1782 }; 1783 1784 mmc@12220000 { 1785 compatible = "samsung,exynos5250-dw-mshc"; 1786 interrupts = < 0x00 0x4d 0x04 >; 1787 #address-cells = < 0x01 >; 1788 #size-cells = < 0x00 >; 1789 reg = < 0x12220000 0x1000 >; 1790 clocks = < 0x02 0x11a 0x02 0x8d >; 1791 clock-names = "biu\0ciu"; 1792 fifo-depth = < 0x80 >; 1793 status = "okay"; 1794 card-detect-delay = < 0xc8 >; 1795 samsung,dw-mshc-ciu-div = < 0x03 >; 1796 samsung,dw-mshc-sdr-timing = < 0x02 0x03 >; 1797 samsung,dw-mshc-ddr-timing = < 0x01 0x02 >; 1798 vmmc-supply = < 0x28 >; 1799 pinctrl-names = "default"; 1800 pinctrl-0 = < 0x2d 0x2e 0x2f 0x30 >; 1801 bus-width = < 0x04 >; 1802 disable-wp; 1803 cap-sd-highspeed; 1804 }; 1805 1806 mmc@12230000 { 1807 compatible = "samsung,exynos5250-dw-mshc"; 1808 reg = < 0x12230000 0x1000 >; 1809 interrupts = < 0x00 0x4e 0x04 >; 1810 #address-cells = < 0x01 >; 1811 #size-cells = < 0x00 >; 1812 clocks = < 0x02 0x11b 0x02 0x8e >; 1813 clock-names = "biu\0ciu"; 1814 fifo-depth = < 0x80 >; 1815 status = "disabled"; 1816 }; 1817 1818 i2s@3830000 { 1819 compatible = "samsung,s5pv210-i2s"; 1820 status = "okay"; 1821 reg = < 0x3830000 0x100 >; 1822 dmas = < 0x03 0x0a 0x03 0x09 0x03 0x08 >; 1823 dma-names = "tx\0rx\0tx-sec"; 1824 clocks = < 0x31 0x06 0x31 0x06 0x31 0x07 >; 1825 clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; 1826 samsung,idma-addr = < 0x3000000 >; 1827 pinctrl-names = "default"; 1828 pinctrl-0 = < 0x32 >; 1829 power-domains = < 0x19 >; 1830 #clock-cells = < 0x01 >; 1831 #sound-dai-cells = < 0x01 >; 1832 }; 1833 1834 i2s@12d60000 { 1835 compatible = "samsung,s3c6410-i2s"; 1836 status = "disabled"; 1837 reg = < 0x12d60000 0x100 >; 1838 dmas = < 0x04 0x0c 0x04 0x0b >; 1839 dma-names = "tx\0rx"; 1840 clocks = < 0x02 0x133 0x02 0x9d >; 1841 clock-names = "iis\0i2s_opclk0"; 1842 pinctrl-names = "default"; 1843 pinctrl-0 = < 0x33 >; 1844 power-domains = < 0x19 >; 1845 #sound-dai-cells = < 0x01 >; 1846 }; 1847 1848 i2s@12d70000 { 1849 compatible = "samsung,s3c6410-i2s"; 1850 status = "disabled"; 1851 reg = < 0x12d70000 0x100 >; 1852 dmas = < 0x03 0x0c 0x03 0x0b >; 1853 dma-names = "tx\0rx"; 1854 clocks = < 0x02 0x134 0x02 0x9e >; 1855 clock-names = "iis\0i2s_opclk0"; 1856 pinctrl-names = "default"; 1857 pinctrl-0 = < 0x34 >; 1858 power-domains = < 0x19 >; 1859 #sound-dai-cells = < 0x01 >; 1860 }; 1861 1862 usb_dwc3 { 1863 compatible = "samsung,exynos5250-dwusb3"; 1864 clocks = < 0x02 0x11e >; 1865 clock-names = "usbdrd30"; 1866 #address-cells = < 0x01 >; 1867 #size-cells = < 0x01 >; 1868 ranges; 1869 1870 dwc3@12000000 { 1871 compatible = "synopsys,dwc3"; 1872 reg = < 0x12000000 0x10000 >; 1873 interrupts = < 0x00 0x48 0x04 >; 1874 phys = < 0x35 0x00 0x35 0x01 >; 1875 phy-names = "usb2-phy\0usb3-phy"; 1876 }; 1877 }; 1878 1879 phy@12100000 { 1880 compatible = "samsung,exynos5250-usbdrd-phy"; 1881 reg = < 0x12100000 0x100 >; 1882 clocks = < 0x02 0x11e 0x02 0x01 >; 1883 clock-names = "phy\0ref"; 1884 samsung,pmu-syscon = < 0x12 >; 1885 #phy-cells = < 0x01 >; 1886 phandle = < 0x35 >; 1887 }; 1888 1889 usb@12110000 { 1890 compatible = "samsung,exynos4210-ehci"; 1891 reg = < 0x12110000 0x100 >; 1892 interrupts = < 0x00 0x47 0x04 >; 1893 clocks = < 0x02 0x11d >; 1894 clock-names = "usbhost"; 1895 #address-cells = < 0x01 >; 1896 #size-cells = < 0x00 >; 1897 1898 port@0 { 1899 reg = < 0x00 >; 1900 phys = < 0x36 0x01 >; 1901 }; 1902 }; 1903 1904 usb@12120000 { 1905 compatible = "samsung,exynos4210-ohci"; 1906 reg = < 0x12120000 0x100 >; 1907 interrupts = < 0x00 0x47 0x04 >; 1908 clocks = < 0x02 0x11d >; 1909 clock-names = "usbhost"; 1910 #address-cells = < 0x01 >; 1911 #size-cells = < 0x00 >; 1912 1913 port@0 { 1914 reg = < 0x00 >; 1915 phys = < 0x36 0x01 >; 1916 }; 1917 }; 1918 1919 phy@12130000 { 1920 compatible = "samsung,exynos5250-usb2-phy"; 1921 reg = < 0x12130000 0x100 >; 1922 clocks = < 0x02 0x11d 0x02 0x01 >; 1923 clock-names = "phy\0ref"; 1924 #phy-cells = < 0x01 >; 1925 samsung,sysreg-phandle = < 0x05 >; 1926 samsung,pmureg-phandle = < 0x12 >; 1927 phandle = < 0x36 >; 1928 }; 1929 1930 amba { 1931 #address-cells = < 0x01 >; 1932 #size-cells = < 0x01 >; 1933 compatible = "simple-bus"; 1934 interrupt-parent = < 0x01 >; 1935 ranges; 1936 1937 pdma@121a0000 { 1938 compatible = "arm,pl330\0arm,primecell"; 1939 reg = < 0x121a0000 0x1000 >; 1940 interrupts = < 0x00 0x22 0x04 >; 1941 clocks = < 0x02 0x113 >; 1942 clock-names = "apb_pclk"; 1943 #dma-cells = < 0x01 >; 1944 #dma-channels = < 0x08 >; 1945 #dma-requests = < 0x20 >; 1946 phandle = < 0x03 >; 1947 }; 1948 1949 pdma@121b0000 { 1950 compatible = "arm,pl330\0arm,primecell"; 1951 reg = < 0x121b0000 0x1000 >; 1952 interrupts = < 0x00 0x23 0x04 >; 1953 clocks = < 0x02 0x114 >; 1954 clock-names = "apb_pclk"; 1955 #dma-cells = < 0x01 >; 1956 #dma-channels = < 0x08 >; 1957 #dma-requests = < 0x20 >; 1958 phandle = < 0x04 >; 1959 }; 1960 1961 mdma@10800000 { 1962 compatible = "arm,pl330\0arm,primecell"; 1963 reg = < 0x10800000 0x1000 >; 1964 interrupts = < 0x00 0x21 0x04 >; 1965 clocks = < 0x02 0x15a >; 1966 clock-names = "apb_pclk"; 1967 #dma-cells = < 0x01 >; 1968 #dma-channels = < 0x08 >; 1969 #dma-requests = < 0x01 >; 1970 }; 1971 1972 mdma@11c10000 { 1973 compatible = "arm,pl330\0arm,primecell"; 1974 reg = < 0x11c10000 0x1000 >; 1975 interrupts = < 0x00 0x7c 0x04 >; 1976 clocks = < 0x02 0x10f >; 1977 clock-names = "apb_pclk"; 1978 #dma-cells = < 0x01 >; 1979 #dma-channels = < 0x08 >; 1980 #dma-requests = < 0x01 >; 1981 }; 1982 }; 1983 1984 gsc@13e00000 { 1985 compatible = "samsung,exynos5250-gsc\0samsung,exynos5-gsc"; 1986 reg = < 0x13e00000 0x1000 >; 1987 interrupts = < 0x00 0x55 0x04 >; 1988 power-domains = < 0x37 >; 1989 clocks = < 0x02 0x100 >; 1990 clock-names = "gscl"; 1991 iommus = < 0x38 >; 1992 }; 1993 1994 gsc@13e10000 { 1995 compatible = "samsung,exynos5250-gsc\0samsung,exynos5-gsc"; 1996 reg = < 0x13e10000 0x1000 >; 1997 interrupts = < 0x00 0x56 0x04 >; 1998 power-domains = < 0x37 >; 1999 clocks = < 0x02 0x101 >; 2000 clock-names = "gscl"; 2001 iommus = < 0x39 >; 2002 }; 2003 2004 gsc@13e20000 { 2005 compatible = "samsung,exynos5250-gsc\0samsung,exynos5-gsc"; 2006 reg = < 0x13e20000 0x1000 >; 2007 interrupts = < 0x00 0x57 0x04 >; 2008 power-domains = < 0x37 >; 2009 clocks = < 0x02 0x102 >; 2010 clock-names = "gscl"; 2011 iommus = < 0x3a >; 2012 }; 2013 2014 gsc@13e30000 { 2015 compatible = "samsung,exynos5250-gsc\0samsung,exynos5-gsc"; 2016 reg = < 0x13e30000 0x1000 >; 2017 interrupts = < 0x00 0x58 0x04 >; 2018 power-domains = < 0x37 >; 2019 clocks = < 0x02 0x103 >; 2020 clock-names = "gscl"; 2021 iommus = < 0x3b >; 2022 }; 2023 2024 hdmi@14530000 { 2025 compatible = "samsung,exynos4212-hdmi"; 2026 reg = < 0x14530000 0x70000 >; 2027 power-domains = < 0x14 >; 2028 interrupts = < 0x00 0x5f 0x04 >; 2029 clocks = < 0x02 0x158 0x02 0x88 0x02 0x89 0x02 0x9f 0x02 0x400 >; 2030 clock-names = "hdmi\0sclk_hdmi\0sclk_pixel\0sclk_hdmiphy\0mout_hdmi"; 2031 samsung,syscon-phandle = < 0x12 >; 2032 phy = < 0x3c >; 2033 #sound-dai-cells = < 0x00 >; 2034 status = "okay"; 2035 pinctrl-names = "default"; 2036 pinctrl-0 = < 0x3d >; 2037 ddc = < 0x3e >; 2038 hpd-gpios = < 0x07 0x07 0x00 >; 2039 vdd_osc-supply = < 0x3f >; 2040 vdd_pll-supply = < 0x40 >; 2041 vdd-supply = < 0x40 >; 2042 phandle = < 0x41 >; 2043 }; 2044 2045 cec@101b0000 { 2046 compatible = "samsung,s5p-cec"; 2047 reg = < 0x101b0000 0x200 >; 2048 interrupts = < 0x00 0x72 0x04 >; 2049 clocks = < 0x02 0x14e >; 2050 clock-names = "hdmicec"; 2051 samsung,syscon-phandle = < 0x12 >; 2052 hdmi-phandle = < 0x41 >; 2053 pinctrl-names = "default"; 2054 pinctrl-0 = < 0x42 >; 2055 status = "disabled"; 2056 }; 2057 2058 mixer@14450000 { 2059 compatible = "samsung,exynos5250-mixer"; 2060 reg = < 0x14450000 0x10000 >; 2061 power-domains = < 0x14 >; 2062 interrupts = < 0x00 0x5e 0x04 >; 2063 clocks = < 0x02 0x157 0x02 0x158 0x02 0x88 >; 2064 clock-names = "mixer\0hdmi\0sclk_hdmi"; 2065 iommus = < 0x43 >; 2066 status = "okay"; 2067 }; 2068 2069 video-phy { 2070 compatible = "samsung,exynos5250-dp-video-phy"; 2071 samsung,pmu-syscon = < 0x12 >; 2072 #phy-cells = < 0x00 >; 2073 phandle = < 0x16 >; 2074 }; 2075 2076 video-phy@10040710 { 2077 compatible = "samsung,s5pv210-mipi-video-phy"; 2078 reg = < 0x10040710 0x100 >; 2079 #phy-cells = < 0x01 >; 2080 syscon = < 0x12 >; 2081 phandle = < 0x44 >; 2082 }; 2083 2084 dsi@14500000 { 2085 compatible = "samsung,exynos4210-mipi-dsi"; 2086 reg = < 0x14500000 0x10000 >; 2087 interrupts = < 0x00 0x52 0x04 >; 2088 samsung,power-domain = < 0x14 >; 2089 phys = < 0x44 0x03 >; 2090 phy-names = "dsim"; 2091 clocks = < 0x02 0x155 0x02 0x86 >; 2092 clock-names = "bus_clk\0sclk_mipi"; 2093 status = "okay"; 2094 #address-cells = < 0x01 >; 2095 #size-cells = < 0x00 >; 2096 vddcore-supply = < 0x40 >; 2097 vddio-supply = < 0x3f >; 2098 samsung,pll-clock-frequency = < 0x16e3600 >; 2099 samsung,burst-clock-frequency = < 0x1312d000 >; 2100 samsung,esc-clock-frequency = < 0x989680 >; 2101 2102 bridge@0 { 2103 reg = < 0x00 >; 2104 compatible = "toshiba,tc358764"; 2105 vddc-supply = < 0x45 >; 2106 vddio-supply = < 0x46 >; 2107 vddlvds-supply = < 0x47 >; 2108 reset-gpios = < 0x0c 0x06 0x01 >; 2109 #address-cells = < 0x01 >; 2110 #size-cells = < 0x00 >; 2111 2112 port@1 { 2113 reg = < 0x01 >; 2114 2115 endpoint { 2116 remote-endpoint = < 0x48 >; 2117 phandle = < 0x52 >; 2118 }; 2119 }; 2120 }; 2121 }; 2122 2123 adc@12d10000 { 2124 compatible = "samsung,exynos-adc-v1"; 2125 reg = < 0x12d10000 0x100 >; 2126 interrupts = < 0x00 0x6a 0x04 >; 2127 clocks = < 0x02 0x12f >; 2128 clock-names = "adc"; 2129 #io-channel-cells = < 0x01 >; 2130 io-channel-ranges; 2131 samsung,syscon-phandle = < 0x12 >; 2132 status = "disabled"; 2133 }; 2134 2135 sysmmu@10a60000 { 2136 compatible = "samsung,exynos-sysmmu"; 2137 reg = < 0x10a60000 0x1000 >; 2138 interrupt-parent = < 0x13 >; 2139 interrupts = < 0x18 0x05 >; 2140 clock-names = "sysmmu\0master"; 2141 clocks = < 0x02 0x160 0x02 0x159 >; 2142 #iommu-cells = < 0x00 >; 2143 phandle = < 0x18 >; 2144 }; 2145 2146 sysmmu@11200000 { 2147 compatible = "samsung,exynos-sysmmu"; 2148 reg = < 0x11200000 0x1000 >; 2149 interrupt-parent = < 0x13 >; 2150 interrupts = < 0x06 0x02 >; 2151 power-domains = < 0x1b >; 2152 clock-names = "sysmmu\0master"; 2153 clocks = < 0x02 0x10c 0x02 0x10a >; 2154 #iommu-cells = < 0x00 >; 2155 phandle = < 0x1d >; 2156 }; 2157 2158 sysmmu@11210000 { 2159 compatible = "samsung,exynos-sysmmu"; 2160 reg = < 0x11210000 0x1000 >; 2161 interrupt-parent = < 0x13 >; 2162 interrupts = < 0x08 0x05 >; 2163 power-domains = < 0x1b >; 2164 clock-names = "sysmmu\0master"; 2165 clocks = < 0x02 0x10b 0x02 0x10a >; 2166 #iommu-cells = < 0x00 >; 2167 phandle = < 0x1c >; 2168 }; 2169 2170 sysmmu@11d40000 { 2171 compatible = "samsung,exynos-sysmmu"; 2172 reg = < 0x11d40000 0x1000 >; 2173 interrupt-parent = < 0x13 >; 2174 interrupts = < 0x04 0x00 >; 2175 clock-names = "sysmmu\0master"; 2176 clocks = < 0x02 0x110 0x02 0x10d >; 2177 #iommu-cells = < 0x00 >; 2178 phandle = < 0x1e >; 2179 }; 2180 2181 sysmmu@11f20000 { 2182 compatible = "samsung,exynos-sysmmu"; 2183 reg = < 0x11f20000 0x1000 >; 2184 interrupt-parent = < 0x13 >; 2185 interrupts = < 0x04 0x02 >; 2186 power-domains = < 0x37 >; 2187 clock-names = "sysmmu\0master"; 2188 clocks = < 0x02 0x111 0x02 0x10e >; 2189 #iommu-cells = < 0x00 >; 2190 }; 2191 2192 sysmmu@13260000 { 2193 compatible = "samsung,exynos-sysmmu"; 2194 reg = < 0x13260000 0x1000 >; 2195 interrupt-parent = < 0x13 >; 2196 interrupts = < 0x0a 0x06 >; 2197 clock-names = "sysmmu"; 2198 clocks = < 0x02 0x161 >; 2199 #iommu-cells = < 0x00 >; 2200 }; 2201 2202 sysmmu@13270000 { 2203 compatible = "samsung,exynos-sysmmu"; 2204 reg = < 0x13270000 0x1000 >; 2205 interrupt-parent = < 0x13 >; 2206 interrupts = < 0x0b 0x06 >; 2207 clock-names = "sysmmu"; 2208 clocks = < 0x02 0x162 >; 2209 #iommu-cells = < 0x00 >; 2210 }; 2211 2212 sysmmu@132a0000 { 2213 compatible = "samsung,exynos-sysmmu"; 2214 reg = < 0x132a0000 0x1000 >; 2215 interrupt-parent = < 0x13 >; 2216 interrupts = < 0x05 0x00 >; 2217 clock-names = "sysmmu"; 2218 clocks = < 0x02 0x165 >; 2219 #iommu-cells = < 0x00 >; 2220 }; 2221 2222 sysmmu@13280000 { 2223 compatible = "samsung,exynos-sysmmu"; 2224 reg = < 0x13280000 0x1000 >; 2225 interrupt-parent = < 0x13 >; 2226 interrupts = < 0x05 0x02 >; 2227 clock-names = "sysmmu"; 2228 clocks = < 0x02 0x163 >; 2229 #iommu-cells = < 0x00 >; 2230 }; 2231 2232 sysmmu@13290000 { 2233 compatible = "samsung,exynos-sysmmu"; 2234 reg = < 0x13290000 0x1000 >; 2235 interrupt-parent = < 0x13 >; 2236 interrupts = < 0x03 0x06 >; 2237 clock-names = "sysmmu"; 2238 clocks = < 0x02 0x164 >; 2239 #iommu-cells = < 0x00 >; 2240 }; 2241 2242 sysmmu@132b0000 { 2243 compatible = "samsung,exynos-sysmmu"; 2244 reg = < 0x132b0000 0x1000 >; 2245 interrupt-parent = < 0x13 >; 2246 interrupts = < 0x05 0x04 >; 2247 clock-names = "sysmmu"; 2248 clocks = < 0x02 0x166 >; 2249 #iommu-cells = < 0x00 >; 2250 }; 2251 2252 sysmmu@132c0000 { 2253 compatible = "samsung,exynos-sysmmu"; 2254 reg = < 0x132c0000 0x1000 >; 2255 interrupt-parent = < 0x13 >; 2256 interrupts = < 0x0b 0x00 >; 2257 clock-names = "sysmmu"; 2258 clocks = < 0x02 0x167 >; 2259 #iommu-cells = < 0x00 >; 2260 }; 2261 2262 sysmmu@132d0000 { 2263 compatible = "samsung,exynos-sysmmu"; 2264 reg = < 0x132d0000 0x1000 >; 2265 interrupt-parent = < 0x13 >; 2266 interrupts = < 0x0a 0x04 >; 2267 clock-names = "sysmmu"; 2268 clocks = < 0x02 0x168 >; 2269 #iommu-cells = < 0x00 >; 2270 }; 2271 2272 sysmmu@132e0000 { 2273 compatible = "samsung,exynos-sysmmu"; 2274 reg = < 0x132e0000 0x1000 >; 2275 interrupt-parent = < 0x13 >; 2276 interrupts = < 0x09 0x04 >; 2277 clock-names = "sysmmu"; 2278 clocks = < 0x02 0x169 >; 2279 #iommu-cells = < 0x00 >; 2280 }; 2281 2282 sysmmu@132f0000 { 2283 compatible = "samsung,exynos-sysmmu"; 2284 reg = < 0x132f0000 0x1000 >; 2285 interrupt-parent = < 0x13 >; 2286 interrupts = < 0x05 0x06 >; 2287 clock-names = "sysmmu"; 2288 clocks = < 0x02 0x16a >; 2289 #iommu-cells = < 0x00 >; 2290 }; 2291 2292 sysmmu@13c40000 { 2293 compatible = "samsung,exynos-sysmmu"; 2294 reg = < 0x13c40000 0x1000 >; 2295 interrupt-parent = < 0x13 >; 2296 interrupts = < 0x03 0x04 >; 2297 power-domains = < 0x37 >; 2298 clock-names = "sysmmu\0master"; 2299 clocks = < 0x02 0x16b 0x02 0x16d >; 2300 #iommu-cells = < 0x00 >; 2301 }; 2302 2303 sysmmu@13c50000 { 2304 compatible = "samsung,exynos-sysmmu"; 2305 reg = < 0x13c50000 0x1000 >; 2306 interrupt-parent = < 0x13 >; 2307 interrupts = < 0x18 0x01 >; 2308 power-domains = < 0x37 >; 2309 clock-names = "sysmmu\0master"; 2310 clocks = < 0x02 0x16c 0x02 0x16d >; 2311 #iommu-cells = < 0x00 >; 2312 }; 2313 2314 sysmmu@13e80000 { 2315 compatible = "samsung,exynos-sysmmu"; 2316 reg = < 0x13e80000 0x1000 >; 2317 interrupt-parent = < 0x13 >; 2318 interrupts = < 0x02 0x00 >; 2319 power-domains = < 0x37 >; 2320 clock-names = "sysmmu\0master"; 2321 clocks = < 0x02 0x106 0x02 0x100 >; 2322 #iommu-cells = < 0x00 >; 2323 phandle = < 0x38 >; 2324 }; 2325 2326 sysmmu@13e90000 { 2327 compatible = "samsung,exynos-sysmmu"; 2328 reg = < 0x13e90000 0x1000 >; 2329 interrupt-parent = < 0x13 >; 2330 interrupts = < 0x02 0x02 >; 2331 power-domains = < 0x37 >; 2332 clock-names = "sysmmu\0master"; 2333 clocks = < 0x02 0x107 0x02 0x101 >; 2334 #iommu-cells = < 0x00 >; 2335 phandle = < 0x39 >; 2336 }; 2337 2338 sysmmu@13ea0000 { 2339 compatible = "samsung,exynos-sysmmu"; 2340 reg = < 0x13ea0000 0x1000 >; 2341 interrupt-parent = < 0x13 >; 2342 interrupts = < 0x02 0x04 >; 2343 power-domains = < 0x37 >; 2344 clock-names = "sysmmu\0master"; 2345 clocks = < 0x02 0x108 0x02 0x102 >; 2346 #iommu-cells = < 0x00 >; 2347 phandle = < 0x3a >; 2348 }; 2349 2350 sysmmu@13eb0000 { 2351 compatible = "samsung,exynos-sysmmu"; 2352 reg = < 0x13eb0000 0x1000 >; 2353 interrupt-parent = < 0x13 >; 2354 interrupts = < 0x02 0x06 >; 2355 power-domains = < 0x37 >; 2356 clock-names = "sysmmu\0master"; 2357 clocks = < 0x02 0x109 0x02 0x103 >; 2358 #iommu-cells = < 0x00 >; 2359 phandle = < 0x3b >; 2360 }; 2361 2362 sysmmu@14640000 { 2363 compatible = "samsung,exynos-sysmmu"; 2364 reg = < 0x14640000 0x1000 >; 2365 interrupt-parent = < 0x13 >; 2366 interrupts = < 0x03 0x02 >; 2367 power-domains = < 0x14 >; 2368 clock-names = "sysmmu\0master"; 2369 clocks = < 0x02 0x15f 0x02 0x153 >; 2370 #iommu-cells = < 0x00 >; 2371 phandle = < 0x15 >; 2372 }; 2373 2374 sysmmu@14650000 { 2375 compatible = "samsung,exynos-sysmmu"; 2376 reg = < 0x14650000 0x1000 >; 2377 interrupt-parent = < 0x13 >; 2378 interrupts = < 0x07 0x04 >; 2379 power-domains = < 0x14 >; 2380 clock-names = "sysmmu\0master"; 2381 clocks = < 0x02 0x15e 0x02 0x157 >; 2382 #iommu-cells = < 0x00 >; 2383 phandle = < 0x43 >; 2384 }; 2385 2386 i2c-gpio { 2387 pinctrl-names = "default"; 2388 pinctrl-0 = < 0x49 >; 2389 status = "okay"; 2390 compatible = "i2c-gpio"; 2391 gpios = < 0x4a 0x06 0x00 0x4a 0x07 0x00 >; 2392 i2c-gpio,delay-us = < 0x02 >; 2393 #address-cells = < 0x01 >; 2394 #size-cells = < 0x00 >; 2395 phandle = < 0x3e >; 2396 }; 2397 }; 2398 2399 thermal-zones { 2400 2401 cpu-thermal { 2402 thermal-sensors = < 0x4b 0x00 >; 2403 polling-delay-passive = < 0x00 >; 2404 polling-delay = < 0x00 >; 2405 2406 trips { 2407 2408 cpu-alert-0 { 2409 temperature = < 0x11170 >; 2410 hysteresis = < 0x2710 >; 2411 type = "active"; 2412 phandle = < 0x4c >; 2413 }; 2414 2415 cpu-alert-1 { 2416 temperature = < 0x17318 >; 2417 hysteresis = < 0x2710 >; 2418 type = "active"; 2419 phandle = < 0x4e >; 2420 }; 2421 2422 cpu-alert-2 { 2423 temperature = < 0x1adb0 >; 2424 hysteresis = < 0x2710 >; 2425 type = "active"; 2426 }; 2427 2428 cpu-crit-0 { 2429 temperature = < 0x1d4c0 >; 2430 hysteresis = < 0x00 >; 2431 type = "critical"; 2432 }; 2433 }; 2434 2435 cooling-maps { 2436 2437 map0 { 2438 trip = < 0x4c >; 2439 cooling-device = < 0x4d 0x09 0x09 >; 2440 }; 2441 2442 map1 { 2443 trip = < 0x4e >; 2444 cooling-device = < 0x4d 0x0f 0x0f >; 2445 }; 2446 }; 2447 }; 2448 }; 2449 2450 cpus { 2451 #address-cells = < 0x01 >; 2452 #size-cells = < 0x00 >; 2453 2454 cpu@0 { 2455 device_type = "cpu"; 2456 compatible = "arm,cortex-a15"; 2457 reg = < 0x00 >; 2458 clocks = < 0x02 0x09 >; 2459 clock-names = "cpu"; 2460 operating-points-v2 = < 0x4f >; 2461 #cooling-cells = < 0x02 >; 2462 cpu0-supply = < 0x50 >; 2463 phandle = < 0x4d >; 2464 }; 2465 2466 cpu@1 { 2467 device_type = "cpu"; 2468 compatible = "arm,cortex-a15"; 2469 reg = < 0x01 >; 2470 clocks = < 0x02 0x09 >; 2471 clock-names = "cpu"; 2472 operating-points-v2 = < 0x4f >; 2473 #cooling-cells = < 0x02 >; 2474 }; 2475 }; 2476 2477 opp_table0 { 2478 compatible = "operating-points-v2"; 2479 opp-shared; 2480 phandle = < 0x4f >; 2481 2482 opp-200000000 { 2483 opp-hz = < 0x00 0xbebc200 >; 2484 opp-microvolt = < 0xe1d48 >; 2485 clock-latency-ns = < 0x222e0 >; 2486 }; 2487 2488 opp-300000000 { 2489 opp-hz = < 0x00 0x11e1a300 >; 2490 opp-microvolt = < 0xe4e1c >; 2491 clock-latency-ns = < 0x222e0 >; 2492 }; 2493 2494 opp-400000000 { 2495 opp-hz = < 0x00 0x17d78400 >; 2496 opp-microvolt = < 0xe7ef0 >; 2497 clock-latency-ns = < 0x222e0 >; 2498 }; 2499 2500 opp-500000000 { 2501 opp-hz = < 0x00 0x1dcd6500 >; 2502 opp-microvolt = < 0xee098 >; 2503 clock-latency-ns = < 0x222e0 >; 2504 }; 2505 2506 opp-600000000 { 2507 opp-hz = < 0x00 0x23c34600 >; 2508 opp-microvolt = < 0xf4240 >; 2509 clock-latency-ns = < 0x222e0 >; 2510 }; 2511 2512 opp-700000000 { 2513 opp-hz = < 0x00 0x29b92700 >; 2514 opp-microvolt = < 0xf7314 >; 2515 clock-latency-ns = < 0x222e0 >; 2516 }; 2517 2518 opp-800000000 { 2519 opp-hz = < 0x00 0x2faf0800 >; 2520 opp-microvolt = < 0xfa3e8 >; 2521 clock-latency-ns = < 0x222e0 >; 2522 }; 2523 2524 opp-900000000 { 2525 opp-hz = < 0x00 0x35a4e900 >; 2526 opp-microvolt = < 0x100590 >; 2527 clock-latency-ns = < 0x222e0 >; 2528 }; 2529 2530 opp-1000000000 { 2531 opp-hz = < 0x00 0x3b9aca00 >; 2532 opp-microvolt = < 0x106738 >; 2533 clock-latency-ns = < 0x222e0 >; 2534 opp-suspend; 2535 }; 2536 2537 opp-1100000000 { 2538 opp-hz = < 0x00 0x4190ab00 >; 2539 opp-microvolt = < 0x10c8e0 >; 2540 clock-latency-ns = < 0x222e0 >; 2541 }; 2542 2543 opp-1200000000 { 2544 opp-hz = < 0x00 0x47868c00 >; 2545 opp-microvolt = < 0x112a88 >; 2546 clock-latency-ns = < 0x222e0 >; 2547 }; 2548 2549 opp-1300000000 { 2550 opp-hz = < 0x00 0x4d7c6d00 >; 2551 opp-microvolt = < 0x118c30 >; 2552 clock-latency-ns = < 0x222e0 >; 2553 }; 2554 2555 opp-1400000000 { 2556 opp-hz = < 0x00 0x53724e00 >; 2557 opp-microvolt = < 0x124f80 >; 2558 clock-latency-ns = < 0x222e0 >; 2559 }; 2560 2561 opp-1500000000 { 2562 opp-hz = < 0x00 0x59682f00 >; 2563 opp-microvolt = < 0x12b128 >; 2564 clock-latency-ns = < 0x222e0 >; 2565 }; 2566 2567 opp-1600000000 { 2568 opp-hz = < 0x00 0x5f5e1000 >; 2569 opp-microvolt = < 0x1312d0 >; 2570 clock-latency-ns = < 0x222e0 >; 2571 }; 2572 2573 opp-1700000000 { 2574 opp-hz = < 0x00 0x6553f100 >; 2575 opp-microvolt = < 0x13d620 >; 2576 clock-latency-ns = < 0x222e0 >; 2577 }; 2578 }; 2579 2580 memory@40000000 { 2581 device_type = "memory"; 2582 reg = < 0x40000000 0x80000000 >; 2583 }; 2584 2585 chosen { 2586 bootargs = "console=ttySAC2,115200"; 2587 }; 2588 2589 gpio_keys { 2590 compatible = "gpio-keys"; 2591 2592 menu { 2593 label = "SW-TACT2"; 2594 gpios = < 0x51 0x04 0x01 >; 2595 linux,code = < 0x8b >; 2596 wakeup-source; 2597 }; 2598 2599 home { 2600 label = "SW-TACT3"; 2601 gpios = < 0x51 0x05 0x01 >; 2602 linux,code = < 0x66 >; 2603 wakeup-source; 2604 }; 2605 2606 up { 2607 label = "SW-TACT4"; 2608 gpios = < 0x51 0x06 0x01 >; 2609 linux,code = < 0x67 >; 2610 wakeup-source; 2611 }; 2612 2613 down { 2614 label = "SW-TACT5"; 2615 gpios = < 0x51 0x07 0x01 >; 2616 linux,code = < 0x6c >; 2617 wakeup-source; 2618 }; 2619 2620 back { 2621 label = "SW-TACT6"; 2622 gpios = < 0x0d 0x00 0x01 >; 2623 linux,code = < 0x9e >; 2624 wakeup-source; 2625 }; 2626 2627 wakeup { 2628 label = "SW-TACT7"; 2629 gpios = < 0x0d 0x01 0x01 >; 2630 linux,code = < 0x8f >; 2631 wakeup-source; 2632 }; 2633 }; 2634 2635 panel { 2636 compatible = "boe,hv070wsa-100"; 2637 power-supply = < 0x47 >; 2638 enable-gpios = < 0x0c 0x03 0x00 >; 2639 2640 port { 2641 2642 endpoint { 2643 remote-endpoint = < 0x52 >; 2644 phandle = < 0x48 >; 2645 }; 2646 }; 2647 }; 2648 2649 regulators { 2650 compatible = "simple-bus"; 2651 #address-cells = < 0x01 >; 2652 #size-cells = < 0x00 >; 2653 2654 regulator@0 { 2655 compatible = "regulator-fixed"; 2656 reg = < 0x00 >; 2657 regulator-name = "MAIN_DC"; 2658 phandle = < 0x09 >; 2659 }; 2660 2661 regulator@1 { 2662 compatible = "regulator-fixed"; 2663 reg = < 0x01 >; 2664 regulator-name = "VDD_33ON_2.8V"; 2665 regulator-min-microvolt = < 0x2ab980 >; 2666 regulator-max-microvolt = < 0x2ab980 >; 2667 gpio = < 0x51 0x01 0x01 >; 2668 enable-active-high; 2669 phandle = < 0x28 >; 2670 }; 2671 2672 regulator@2 { 2673 compatible = "regulator-fixed"; 2674 reg = < 0x02 >; 2675 regulator-name = "hdmi-en"; 2676 }; 2677 2678 regulator@3 { 2679 compatible = "regulator-fixed"; 2680 reg = < 0x03 >; 2681 regulator-name = "VCC_1V2"; 2682 regulator-min-microvolt = < 0x124f80 >; 2683 regulator-max-microvolt = < 0x124f80 >; 2684 phandle = < 0x45 >; 2685 }; 2686 2687 regulator@4 { 2688 compatible = "regulator-fixed"; 2689 reg = < 0x04 >; 2690 regulator-name = "VCC_1V8"; 2691 regulator-min-microvolt = < 0x1b7740 >; 2692 regulator-max-microvolt = < 0x1b7740 >; 2693 phandle = < 0x46 >; 2694 }; 2695 2696 regulator@5 { 2697 compatible = "regulator-fixed"; 2698 reg = < 0x05 >; 2699 regulator-name = "VCC_3V3"; 2700 regulator-min-microvolt = < 0x325aa0 >; 2701 regulator-max-microvolt = < 0x325aa0 >; 2702 phandle = < 0x47 >; 2703 }; 2704 }; 2705 2706 fixed-rate-clocks { 2707 2708 xxti { 2709 compatible = "samsung,clock-xxti"; 2710 clock-frequency = < 0x16e3600 >; 2711 }; 2712 }; 2713 2714 usb-hub { 2715 compatible = "smsc,usb3503a"; 2716 reset-gpios = < 0x07 0x05 0x01 >; 2717 connect-gpios = < 0x0c 0x07 0x01 >; 2718 }; 2719}; 2720