1-- 2-- Copyright 2014, General Dynamics C4 Systems 3-- 4-- SPDX-License-Identifier: GPL-2.0-only 5-- 6 7#include <mode/object/structures.bf> 8 9 10base 32 11 12block x86_pat_msr { 13 padding 5 14 field pa7 3 15 padding 5 16 field pa6 3 17 padding 5 18 field pa5 3 19 padding 5 20 field pa4 3 21 padding 5 22 field pa3 3 23 padding 5 24 field pa2 3 25 padding 5 26 field pa1 3 27 padding 5 28 field pa0 3 29} 30 31-- Local APIC 32 33block apic_base_msr { 34 field_high base_addr 20 35 field enabled 1 36 field x2apic 1 37 padding 1 38 field is_bsp 1 39 padding 8 40} 41 42block apic_version { 43 padding 8 44 field max_lvt_entry 8 45 padding 8 46 field version 8 47} 48 49block apic_svr { 50 padding 22 51 field focus_processor_chk 1 52 field enabled 1 53 field spurious_vector 8 54} 55 56block apic_lvt { 57 padding 13 58 field timer_mode 2 59 field masked 1 60 field trigger_mode 1 61 field remote_irr 1 62 field pin_polarity 1 63 field delivery_status 1 64 padding 1 65 field delivery_mode 3 66 field vector 8 67} 68 69block apic_icr1 { 70 padding 12 71 field dest_shorthand 2 72 padding 2 73 field trigger_mode 1 74 field level 1 75 padding 1 76 field delivery_status 1 77 field dest_mode 1 78 field delivery_mode 3 79 field vector 8 80} 81 82block apic_icr2 { 83 field dest 8 84 padding 24 85} 86 87block x2apic_icr1 { 88 padding 12 89 field dest_shorthand 2 90 padding 2 91 field trigger_mode 1 92 field level 1 93 padding 2 94 field dest_mode 1 95 field delivery_mode 3 96 field vector 8 97} 98 99block x2apic_icr2 { 100 field dest 32 101} 102 103-- x86-specific IRQ state structure 104 105block irq_ioapic { 106 field irqType 4 107 field id 5 108 field pin 5 109 field level 1 110 field polarity_low 1 111 field masked 1 112 padding 15 113 padding 32 114} 115 116block irq_msi { 117 field irqType 4 118 field bus 8 119 field dev 5 120 field func 3 121 padding 12 122 123 field handle 32 124} 125 126block irq_free { 127 field irqType 4 128 padding 28 129 padding 32 130} 131 132block irq_reserved { 133 field irqType 4 134 padding 28 135 padding 32 136} 137 138tagged_union x86_irq_state irqType { 139 tag irq_free 0 140 tag irq_ioapic 1 141 tag irq_msi 2 142 tag irq_reserved 3 143} 144 145-- CPUID bitfields. Same on 32 and 64 bit. 146 147block cpuid_001h_eax { 148 padding 4 149 field extended_family 8 150 field extended_model 4 151 padding 2 152 field type 2 153 field family 4 154 field model 4 155 field stepping 4 156} 157 158block cpuid_001h_ebx { 159 padding 24 160 field brand 8 161} 162 163block cpuid_007h_ebx { 164 padding 2 165 field sha 1 166 padding 3 167 field intel_processor_trace 1 168 padding 1 169 field clfushopt 1 170 padding 2 171 field smap 1 172 field adx 1 173 field rdseed 1 174 padding 2 175 field rdt_a 1 176 field mpx 1 177 field deprecate_fpu_cs_ds 1 178 field rdt_m 1 179 field rtm 1 180 field invpcid 1 181 field enhanced_rep_mov 1 182 field bmi2 1 183 field smep 1 184 field fdp_excptn_only 1 185 field avx2 1 186 field hle 1 187 field bmi1 1 188 field sgx 1 189 field ia32_tsc_adjust 1 190 field fsgsbase 1 191} 192 193block cpuid_007h_edx { 194 padding 2 195 field ia32_arch_cap_msr 1 196 padding 1 197 field stibp 1 198 field ibrs_ibpb 1 199 padding 26 200} 201 202#ifdef CONFIG_VTX 203 204block vmx_basic_msr { 205 padding 8 206 field true_msrs 1 207 field in_out_exit_info 1 208 field memory_type 4 209 field monitor_smm_int 1 210 field physical_address_limit 1 211 padding 3 212 field vmxon_size 13 213 padding 1 214 field vmcs_revision 31 215} 216 217block feature_control_msr { 218 padding 16 219 field senter 1 220 field senter_functions 7 221 padding 5 222 field vmx_outside_smx 1 223 field vmx_in_smx 1 224 field lock 1 225} 226 227block vmx_ept_vpid_cap_msr { 228 padding 20 229 field invvpid_single_context_ng 1 230 field invvpid_all_context 1 231 field invvpid_single_context 1 232 field invvpid_single_address 1 233 padding 7 234 field invvpid 1 235 padding 5 236 field invept_all_context 1 237 field invept_single_context 1 238 padding 3 239 field ept_flags 1 240 field invept 1 241 padding 2 242 field ept_1g 1 243 field ept_2m 1 244 padding 1 245 field ept_wb 1 246 padding 5 247 field ept_uc 1 248 padding 1 249 field ept_depth_4 1 250 padding 5 251 field ept_exec_only 1 252} 253 254-- This is the layout of the data exit qualification register 255-- when the exit reason (as read from the data exit reason) 256-- register is 'control register' 257block vmx_data_exit_qualification_control_regster { 258 field data 16 259 padding 4 260 field reg 4 261 padding 1 262 field msw_type 1 263 field access_type 2 264 field cr 4 265} 266 267#endif 268 269block ia32_arch_capabilities_msr { 270 padding 30 271 field ibrs_all 1 272 field rdcl_no 1 273} 274