1/*
2 * Copyright 2017, Data61
3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4 * ABN 41 687 119 230.
5 *
6 * This software may be distributed and modified according to the terms of
7 * the BSD 2-Clause license. Note that NO WARRANTY is provided.
8 * See "LICENSE_BSD2.txt" for details.
9 *
10 * @TAG(DATA61_BSD)
11 */
12
13#pragma once
14
15#include <platsupport/gpio.h>
16
17/* Port encodings */
18#define _GPIOPORT(bank, port)       (((bank) << 8) | (port))
19#define GPIOPORT_GET_BANK(port)     ((port) >> 8)
20#define GPIOPORT_GET_PORT(port)     ((port) & 0xff)
21#define GPIOPORT(bank, port)        _GPIOPORT(GPIO_##bank##_BANK, port)
22#define GPIOPORT_NONE               _GPIOPORT(GPIO_NBANKS, 0)
23
24/* GPIO IDs */
25#define XEINT0   GPIOID(GPX0, 0)
26#define XEINT1   GPIOID(GPX0, 1)
27#define XEINT2   GPIOID(GPX0, 2)
28#define XEINT3   GPIOID(GPX0, 3)
29#define XEINT4   GPIOID(GPX0, 4)
30#define XEINT5   GPIOID(GPX0, 5)
31#define XEINT6   GPIOID(GPX0, 6)
32#define XEINT7   GPIOID(GPX0, 7)
33#define XEINT8   GPIOID(GPX1, 0)
34#define XEINT9   GPIOID(GPX1, 1)
35#define XEINT10  GPIOID(GPX1, 2)
36#define XEINT11  GPIOID(GPX1, 3)
37#define XEINT12  GPIOID(GPX1, 4)
38#define XEINT13  GPIOID(GPX1, 5)
39#define XEINT14  GPIOID(GPX1, 6)
40#define XEINT15  GPIOID(GPX1, 7)
41#define XEINT16  GPIOID(GPX2, 0)
42#define XEINT17  GPIOID(GPX2, 1)
43#define XEINT18  GPIOID(GPX2, 2)
44#define XEINT19  GPIOID(GPX2, 3)
45#define XEINT20  GPIOID(GPX2, 4)
46#define XEINT21  GPIOID(GPX2, 5)
47#define XEINT22  GPIOID(GPX2, 6)
48#define XEINT23  GPIOID(GPX2, 7)
49#define XEINT24  GPIOID(GPX3, 0)
50#define XEINT25  GPIOID(GPX3, 1)
51#define XEINT26  GPIOID(GPX3, 2)
52#define XEINT27  GPIOID(GPX3, 3)
53#define XEINT28  GPIOID(GPX3, 4)
54#define XEINT29  GPIOID(GPX3, 5)
55#define XEINT30  GPIOID(GPX3, 6)
56#define XEINT31  GPIOID(GPX3, 7)
57
58#define MAX_GPIO_ID XEINT31
59
60enum gpio_bank {
61    GPIO_LEFT_BANK,
62    GPIO_RIGHT_BANK,
63    GPIO_C2C_BANK,
64    GPIO_AUDIO_BANK,
65    GPIO_NBANKS
66};
67
68enum gpio_port {
69    /* LEFT */
70    GPA0 = GPIOPORT(LEFT,   0), /* 0x000 */
71    GPA1 = GPIOPORT(LEFT,   1), /* 0x020 */
72    GPA2 = GPIOPORT(LEFT,   2), /* 0x040 */
73    GPB0 = GPIOPORT(LEFT,   3), /* 0x060 */
74    GPB1 = GPIOPORT(LEFT,   4), /* 0x080 */
75    GPB2 = GPIOPORT(LEFT,   5), /* 0x0A0 */
76    GPB3 = GPIOPORT(LEFT,   6), /* 0x0C0 */
77    GPC0 = GPIOPORT(LEFT,   7), /* 0x0E0 */
78    GPC1 = GPIOPORT(LEFT,   8), /* 0x100 */
79    GPC2 = GPIOPORT(LEFT,   9), /* 0x120 */
80    GPC3 = GPIOPORT(LEFT,  10), /* 0x140 */
81    GPD0 = GPIOPORT(LEFT,  11), /* 0x160 */
82    GPD1 = GPIOPORT(LEFT,  12), /* 0x180 */
83    GPY0 = GPIOPORT(LEFT,  13), /* 0x1A0 */
84    GPY1 = GPIOPORT(LEFT,  14), /* 0x1C0 */
85    GPY2 = GPIOPORT(LEFT,  15), /* 0x1E0 */
86    GPY3 = GPIOPORT(LEFT,  16), /* 0x200 */
87    GPY4 = GPIOPORT(LEFT,  17), /* 0x220 */
88    GPY5 = GPIOPORT(LEFT,  18), /* 0x240 */
89    GPY6 = GPIOPORT(LEFT,  19), /* 0x260 */
90    ETC0 = GPIOPORT(LEFT,  20), /* 0x280 */
91    ETC6 = GPIOPORT(LEFT,  21), /* 0x2A0 */
92    ETC7 = GPIOPORT(LEFT,  22), /* 0x2C0 */
93    GPC4 = GPIOPORT(LEFT,  23), /* 0x2E0 */
94    /*---*/
95    GPX0 = GPIOPORT(LEFT,  96), /* 0xC00 */
96    GPX1 = GPIOPORT(LEFT,  97), /* 0xC20 */
97    GPX2 = GPIOPORT(LEFT,  98), /* 0xC40 */
98    GPX3 = GPIOPORT(LEFT,  99), /* 0xC60 */
99    /* RIGHT */
100    GPE0 = GPIOPORT(RIGHT,  0), /* 0x000 */
101    GPE1 = GPIOPORT(RIGHT,  1), /* 0x020 */
102    GPF0 = GPIOPORT(RIGHT,  2), /* 0x040 */
103    GPF1 = GPIOPORT(RIGHT,  3), /* 0x060 */
104    GPG0 = GPIOPORT(RIGHT,  4), /* 0x080 */
105    GPG1 = GPIOPORT(RIGHT,  5), /* 0x0A0 */
106    GPG2 = GPIOPORT(RIGHT,  6), /* 0x0C0 */
107    GPH0 = GPIOPORT(RIGHT,  7), /* 0x0E0 */
108    GPH1 = GPIOPORT(RIGHT,  8), /* 0x100 */
109    /* C2C */
110    GPV0 = GPIOPORT(C2C,    0), /* 0x000 */
111    GPV1 = GPIOPORT(C2C,    1), /* 0x020 */
112    ETC5 = GPIOPORT(C2C,    2), /* 0x040 */
113    GPV2 = GPIOPORT(C2C,    3), /* 0x060 */
114    GPV3 = GPIOPORT(C2C,    4), /* 0x080 */
115    ETC8 = GPIOPORT(C2C,    5), /* 0x0A0 */
116    GPV4 = GPIOPORT(C2C,    6), /* 0x0C0 */
117    /* AUDIO */
118    GPZ  = GPIOPORT(AUDIO,  0), /* 0x000 */
119};
120
121/**
122 * Initialise the exynos GPIO system given an exynos MUX subsystem
123 * @param[in] mux_sys    A handle to the mux subsystem. This subsystem
124 *                       must contain memory mapped IO for the MUX regions.
125 * @param[out] gpio_sys  A handle to a gpio subsystem to populate.
126 * @return               0 on success
127 */
128int exynos_gpio_sys_init(mux_sys_t *mux_sys, gpio_sys_t *gpio_sys);
129
130