1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12 13#pragma once 14 15#include <platsupport/gpio.h> 16#include <platsupport/mux.h> 17 18/* Port encodings */ 19#define _GPIOPORT(bank, port) (((bank) << 8) | (port)) 20#define GPIOPORT_GET_BANK(port) ((port) >> 8) 21#define GPIOPORT_GET_PORT(port) ((port) & 0xff) 22#define GPIOPORT(bank, port) _GPIOPORT(GPIO_##bank##_BANK, port) 23#define GPIOPORT_NONE _GPIOPORT(GPIO_NBANKS, 0) 24 25#define XEINT0 GPIOID(GPX0, 0) 26#define XEINT1 GPIOID(GPX0, 1) 27#define XEINT2 GPIOID(GPX0, 2) 28#define XEINT3 GPIOID(GPX0, 3) 29#define XEINT4 GPIOID(GPX0, 4) 30#define XEINT5 GPIOID(GPX0, 5) 31#define XEINT6 GPIOID(GPX0, 6) 32#define XEINT7 GPIOID(GPX0, 7) 33#define XEINT8 GPIOID(GPX1, 0) 34#define XEINT9 GPIOID(GPX1, 1) 35#define XEINT10 GPIOID(GPX1, 2) 36#define XEINT11 GPIOID(GPX1, 3) 37#define XEINT12 GPIOID(GPX1, 4) 38#define XEINT13 GPIOID(GPX1, 5) 39#define XEINT14 GPIOID(GPX1, 6) 40#define XEINT15 GPIOID(GPX1, 7) 41#define XEINT16 GPIOID(GPX2, 0) 42#define XEINT17 GPIOID(GPX2, 1) 43#define XEINT18 GPIOID(GPX2, 2) 44#define XEINT19 GPIOID(GPX2, 3) 45#define XEINT20 GPIOID(GPX2, 4) 46#define XEINT21 GPIOID(GPX2, 5) 47#define XEINT22 GPIOID(GPX2, 6) 48#define XEINT23 GPIOID(GPX2, 7) 49#define XEINT24 GPIOID(GPX3, 0) 50#define XEINT25 GPIOID(GPX3, 1) 51#define XEINT26 GPIOID(GPX3, 2) 52#define XEINT27 GPIOID(GPX3, 3) 53#define XEINT28 GPIOID(GPX3, 4) 54#define XEINT29 GPIOID(GPX3, 5) 55#define XEINT30 GPIOID(GPX3, 6) 56#define XEINT31 GPIOID(GPX3, 7) 57 58#define MAX_GPIO_ID XEINT31 59 60enum gpio_bank { 61 GPIO_LEFT_BANK, 62 GPIO_RIGHT_BANK, 63 GPIO_C2C_BANK, 64 GPIO_AUDIO_BANK, 65 GPIO_NBANKS 66}; 67 68enum gpio_port { 69 /* LEFT */ 70 GPA0 = GPIOPORT(LEFT, 0), /* 0x000 */ 71 GPA1 = GPIOPORT(LEFT, 1), /* 0x020 */ 72 GPB = GPIOPORT(LEFT, 2), /* 0x040 */ 73 GPC0 = GPIOPORT(LEFT, 3), /* 0x060 */ 74 GPC1 = GPIOPORT(LEFT, 4), /* 0x080 */ 75 GPD0 = GPIOPORT(LEFT, 5), /* 0x0A0 */ 76 GPD1 = GPIOPORT(LEFT, 6), /* 0x0C0 */ 77 78 GPF0 = GPIOPORT(LEFT, 12), /* 0x180 */ 79 GPF1 = GPIOPORT(LEFT, 13), /* 0x1A0 */ 80 GPF2 = GPIOPORT(LEFT, 14), /* 0x1C0 */ 81 GPF3 = GPIOPORT(LEFT, 15), /* 0x1E0 */ 82 ETC1 = GPIOPORT(LEFT, 17), /* 0x220 */ 83 GPJ0 = GPIOPORT(LEFT, 18), /* 0x240 */ 84 GPJ1 = GPIOPORT(LEFT, 19), /* 0x260 */ 85 86 /* RIGHT */ 87 GPK0 = GPIOPORT(RIGHT, 2), /* 0x040 */ 88 GPK1 = GPIOPORT(RIGHT, 3), /* 0x060 */ 89 GPK2 = GPIOPORT(RIGHT, 4), /* 0x080 */ 90 GPK3 = GPIOPORT(RIGHT, 5), /* 0x0A0 */ 91 GPL0 = GPIOPORT(RIGHT, 6), /* 0x0C0 */ 92 GPL1 = GPIOPORT(RIGHT, 7), /* 0x0E0 */ 93 GPL2 = GPIOPORT(RIGHT, 8), /* 0x100 */ 94 GPY0 = GPIOPORT(RIGHT, 9), /* 0x120 */ 95 GPY1 = GPIOPORT(RIGHT, 10), /* 0x140 */ 96 GPY2 = GPIOPORT(RIGHT, 11), /* 0x160 */ 97 GPY3 = GPIOPORT(RIGHT, 12), /* 0x180 */ 98 GPY4 = GPIOPORT(RIGHT, 13), /* 0x1A0 */ 99 GPY5 = GPIOPORT(RIGHT, 14), /* 0x1C0 */ 100 GPY6 = GPIOPORT(RIGHT, 15), /* 0x1E0 */ 101 ETC0 = GPIOPORT(RIGHT, 16), /* 0x200 */ 102 GPM0 = GPIOPORT(RIGHT, 19), /* 0x260 */ 103 GPM1 = GPIOPORT(RIGHT, 20), /* 0x280 */ 104 GPM2 = GPIOPORT(RIGHT, 21), /* 0x2A0 */ 105 GPM3 = GPIOPORT(RIGHT, 22), /* 0x2C0 */ 106 GPM4 = GPIOPORT(RIGHT, 23), /* 0x2E0 */ 107 /* GPX */ 108 GPX0 = GPIOPORT(RIGHT, 96), /* 0xC00 */ 109 GPX1 = GPIOPORT(RIGHT, 97), /* 0xC20 */ 110 GPX2 = GPIOPORT(RIGHT, 98), /* 0xC40 */ 111 GPX3 = GPIOPORT(RIGHT, 99), /* 0xC60 */ 112 113 /* C2C */ 114 GPZ = GPIOPORT(C2C, 0), /* 0x000 */ 115 116 /* AUDIO */ 117 GPV0 = GPIOPORT(AUDIO, 0), /* 0x000 */ 118 GPV1 = GPIOPORT(AUDIO, 1), /* 0x020 */ 119 ETC7 = GPIOPORT(AUDIO, 2), /* 0x040 */ 120 GPV2 = GPIOPORT(AUDIO, 3), /* 0x060 */ 121 GPV3 = GPIOPORT(AUDIO, 4), /* 0x080 */ 122 ETC8 = GPIOPORT(AUDIO, 5), /* 0x0A0 */ 123 GPV4 = GPIOPORT(AUDIO, 6), /* 0x0C0 */ 124}; 125 126/** 127 * Initialise the exynos GPIO system given an exynos MUX subsystem 128 * @param[in] mux_sys A handle to the mux subsystem. This subsystem 129 * must contain memory mapped IO for the MUX regions. 130 * @param[out] gpio_sys A handle to a gpio subsystem to populate. 131 * @return 0 on success 132 */ 133int exynos_gpio_sys_init(mux_sys_t *mux_sys, gpio_sys_t *gpio_sys); 134 135