1/*
2 * Copyright 2017, Data61
3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4 * ABN 41 687 119 230.
5 *
6 * This software may be distributed and modified according to the terms of
7 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
8 * See "LICENSE_GPLv2.txt" for details.
9 *
10 * @TAG(DATA61_GPL)
11 */
12
13#ifndef _ETHDRIVER_ZYNQ7000_IO_H_
14#define _ETHDRIVER_ZYNQ7000_IO_H_
15
16#define __arch_getl(addr)         *((volatile uint32_t*)(addr))
17#define __arch_getw(addr)         *((volatile uint16_t*)(addr))
18#define __arch_getb(addr)         *((volatile uint8_t*)(addr))
19
20#define __arch_putl(val, addr)    *((volatile uint32_t*)(addr)) = val
21#define __arch_putw(val, addr)    *((volatile uint16_t*)(addr)) = val
22#define __arch_putb(val, addr)    *((volatile uint8_t*)(addr)) = val
23
24
25//#define __raw_writel(...) writel(__VA_ARGS__)
26//#define __raw_readl(...) readl(__VA_ARGS__)
27
28
29
30
31#define __raw_writeb(v,a)	__arch_putb(v,a)
32#define __raw_writew(v,a)	__arch_putw(v,a)
33#define __raw_writel(v,a)	__arch_putl(v,a)
34
35#define __raw_readb(a)		__arch_getb(a)
36#define __raw_readw(a)		__arch_getw(a)
37#define __raw_readl(a)		__arch_getl(a)
38
39/*
40 * TODO: The kernel offers some more advanced versions of barriers, it might
41 * have some advantages to use them instead of the simple one here.
42 */
43#define dmb()     asm volatile("dmb" ::: "memory")
44#define dsb()     asm volatile("dsb" ::: "memory")
45#define isb()     asm volatile("isb" ::: "memory")
46#define __iormb()	dmb()
47#define __iowmb()	dmb()
48
49#define writeb(v,c)	({ uint8_t  __v = v; __iowmb(); __arch_putb(__v,c); __v; })
50#define writew(v,c)	({ uint16_t __v = v; __iowmb(); __arch_putw(__v,c); __v; })
51#define writel(v,c)	({ uint32_t __v = v; __iowmb(); __arch_putl(__v,c); __v; })
52
53#define readb(c)	({ uint8_t  __v = __arch_getb(c); __iormb(); __v; })
54#define readw(c)	({ uint16_t __v = __arch_getw(c); __iormb(); __v; })
55#define readl(c)	({ uint32_t __v = __arch_getl(c); __iormb(); __v; })
56
57
58
59#define __cpu_to_le64(x) ((__force __le64)(__u64)(x))
60#define __le64_to_cpu(x) ((__force __u64)(__le64)(x))
61#define __cpu_to_le32(x) ((__force __le32)(__u32)(x))
62#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
63#define __cpu_to_le16(x) ((__force __le16)(__u16)(x))
64#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
65#define __cpu_to_be64(x) ((__force __be64)__swab64((x)))
66#define __be64_to_cpu(x) __swab64((__force __u64)(__be64)(x))
67#define __cpu_to_be32(x) ((__force __be32)__swab32((x)))
68#define __be32_to_cpu(x) __swab32((__force __u32)(__be32)(x))
69#define __cpu_to_be16(x) ((__force __be16)__swab16((x)))
70#define __be16_to_cpu(x) __swab16((__force __u16)(__be16)(x))
71
72#define cpu_to_le64 __cpu_to_le64
73#define le64_to_cpu __le64_to_cpu
74#define cpu_to_le32 __cpu_to_le32
75#define le32_to_cpu __le32_to_cpu
76#define cpu_to_le16 __cpu_to_le16
77#define le16_to_cpu __le16_to_cpu
78#define cpu_to_be64 __cpu_to_be64
79#define be64_to_cpu __be64_to_cpu
80#define cpu_to_be32 __cpu_to_be32
81#define be32_to_cpu __be32_to_cpu
82#define cpu_to_be16 __cpu_to_be16
83#define be16_to_cpu __be16_to_cpu
84#define cpu_to_le64p __cpu_to_le64p
85#define le64_to_cpup __le64_to_cpup
86#define cpu_to_le32p __cpu_to_le32p
87#define le32_to_cpup __le32_to_cpup
88#define cpu_to_le16p __cpu_to_le16p
89#define le16_to_cpup __le16_to_cpup
90#define cpu_to_be64p __cpu_to_be64p
91#define be64_to_cpup __be64_to_cpup
92#define cpu_to_be32p __cpu_to_be32p
93#define be32_to_cpup __be32_to_cpup
94#define cpu_to_be16p __cpu_to_be16p
95#define be16_to_cpup __be16_to_cpup
96#define cpu_to_le64s __cpu_to_le64s
97#define le64_to_cpus __le64_to_cpus
98#define cpu_to_le32s __cpu_to_le32s
99#define le32_to_cpus __le32_to_cpus
100#define cpu_to_le16s __cpu_to_le16s
101#define le16_to_cpus __le16_to_cpus
102#define cpu_to_be64s __cpu_to_be64s
103#define be64_to_cpus __be64_to_cpus
104#define cpu_to_be32s __cpu_to_be32s
105#define be32_to_cpus __be32_to_cpus
106#define cpu_to_be16s __cpu_to_be16s
107#define be16_to_cpus __be16_to_cpus
108
109#define out_arch(type, endian, a, v)	__raw_write##type(cpu_to_##endian(v), a)
110#define in_arch(type, endian, a)	endian##_to_cpu(__raw_read##type(a))
111
112#define out_le32(a, v)	out_arch(l, le32, a, v)
113#define out_le16(a, v)	out_arch(w, le16, a, v)
114
115#define in_le32(a)	in_arch(l, le32, a)
116#define in_le16(a)	in_arch(w, le16, a)
117
118#define out_be32(a, v)	out_arch(l, be32, a, v)
119#define out_be16(a, v)	out_arch(w, be16, a, v)
120
121#define in_be32(a)	in_arch(l, be32, a)
122#define in_be16(a)	in_arch(w, be16, a)
123
124#define out_8(a, v)	__raw_writeb(v, a)
125#define in_8(a)		__raw_readb(a)
126
127/*
128 * Clear and set bits in one shot. These macros can be used to clear and
129 * set multiple bits in a register using a single call. These macros can
130 * also be used to set a multiple-bit bit pattern using a mask, by
131 * specifying the mask in the 'clear' parameter and the new bit pattern
132 * in the 'set' parameter.
133 */
134
135#define clrbits(type, addr, clear) \
136	out_##type((addr), in_##type(addr) & ~(clear))
137
138#define setbits(type, addr, set) \
139	out_##type((addr), in_##type(addr) | (set))
140
141#define clrsetbits(type, addr, clear, set) \
142	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
143
144#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
145#define setbits_be32(addr, set) setbits(be32, addr, set)
146#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
147
148#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
149#define setbits_le32(addr, set) setbits(le32, addr, set)
150#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
151
152#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
153#define setbits_be16(addr, set) setbits(be16, addr, set)
154#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
155
156#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
157#define setbits_le16(addr, set) setbits(le16, addr, set)
158#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
159
160#define clrbits_8(addr, clear) clrbits(8, addr, clear)
161#define setbits_8(addr, set) setbits(8, addr, set)
162#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
163
164#endif /* _ETHDRIVER_ZYNQ7000_IO_H_ */
165