1/*
2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7#pragma once
8
9#include <drivers/timer/mct.h>
10
11static inline void resetTimer(void)
12{
13    mct_reset();
14}
15
16#ifdef CONFIG_KERNEL_MCS
17/** DONT_TRANSLATE **/
18static inline ticks_t getCurrentTime(void)
19{
20    uint32_t hi, hi2, lo;
21    hi2 = mct->global.cnth;
22
23    do {
24        hi = hi2;
25        lo = mct->global.cntl;
26        hi2 = mct->global.cnth;
27    } while (hi != hi2);
28
29    return ((((uint64_t) hi) << 32llu) | (uint64_t) lo);
30}
31
32/** DONT_TRANSLATE **/
33static inline void setDeadline(ticks_t deadline)
34{
35    /*
36     * After writing a value to a comp register a bit in the wstat
37     * register is asserted. A write of 1 clears this bit.
38     */
39    mct->global.comp0h = (uint32_t)(deadline >> 32u);
40    while (!(mct->global.wstat & GWSTAT_COMP0H));
41    mct->global.wstat |= GWSTAT_COMP0H;
42
43    mct->global.comp0l = (uint32_t) deadline;
44
45    while (!(mct->global.wstat & GWSTAT_COMP0L));
46    mct->global.wstat |= GWSTAT_COMP0L;
47}
48
49static inline void ackDeadlineIRQ(void)
50{
51    /* ack everything */
52    mct_reset();
53}
54
55#endif
56
57
58