1/* 2 * Copyright 2014, General Dynamics C4 Systems 3 * 4 * This software may be distributed and modified according to the terms of 5 * the GNU General Public License version 2. Note that NO WARRANTY is provided. 6 * See "LICENSE_GPLv2.txt" for details. 7 * 8 * @TAG(GD_GPL) 9 */ 10 11#ifndef __PLAT_MACHINE_H 12#define __PLAT_MACHINE_H 13 14#define N_INTERRUPTS 160 15 16enum IRQConstants { 17// INTERRUPT_RESERVED = 0, 18// INTERRUPT_RESERVED = 1, 19// INTERRUPT_RESERVED = 2, 20// INTERRUPT_RESERVED = 3, 21// INTERRUPT_RESERVED = 4, 22// INTERRUPT_RESERVED = 5, 23// INTERRUPT_RESERVED = 6, 24// INTERRUPT_RESERVED = 7, 25// INTERRUPT_RESERVED = 8, 26// INTERRUPT_RESERVED = 9, 27// INTERRUPT_RESERVED = 10, 28// INTERRUPT_RESERVED = 11, 29// INTERRUPT_RESERVED = 12, 30// INTERRUPT_RESERVED = 13, 31// INTERRUPT_RESERVED = 14, 32// INTERRUPT_RESERVED = 15, 33// INTERRUPT_RESERVED = 16, 34// INTERRUPT_RESERVED = 17, 35// INTERRUPT_RESERVED = 18, 36// INTERRUPT_RESERVED = 19, 37// INTERRUPT_RESERVED = 20, 38// INTERRUPT_RESERVED = 21, 39// INTERRUPT_RESERVED = 22, 40// INTERRUPT_RESERVED = 23, 41// INTERRUPT_RESERVED = 24, 42// INTERRUPT_RESERVED = 25, 43// INTERRUPT_RESERVED = 26, 44 INTERRUPT_GLOBAL_TIMER = 27, 45 INTERRUPT_PL_FIQ = 28, 46 INTERRUPT_PRIV_TIMER = 29, 47 INTERRUPT_PRIV_WDT = 30, 48 INTERRUPT_PL_F2P = 31, 49 INTERRUPT_APU_CPU0 = 32, 50 INTERRUPT_APU_CPU1 = 33, 51 INTERRUPT_APU_L2CC = 34, 52 INTERRUPT_APU_OCM = 35, 53// INTERRUPT_RESERVED = 36, 54 INTERRUPT_PMU0 = 37, 55 INTERRUPT_PMU1 = 38, 56 INTERRUPT_XADC = 39, 57 INTERRUPT_DEVC = 40, 58 INTERRUPT_SWDT = 41, 59 INTERRUPT_TTIMER0_0 = 42, 60 INTERRUPT_TTIMER0_1 = 43, 61 INTERRUPT_TTIMER0_2 = 44, 62 INTERRUPT_DMAC_ABORT = 45, 63 INTERRUPT_DMAC0 = 46, 64 INTERRUPT_DMAC1 = 47, 65 INTERRUPT_DMAC2 = 48, 66 INTERRUPT_DMAC3 = 49, 67 INTERRUPT_MEM_SMC = 50, 68 INTERRUPT_MEM_QSPI = 51, 69 INTERRUPT_GPIO = 52, 70 INTERRUPT_USB0 = 53, 71 INTERRUPT_ETH0 = 54, 72 INTERRUPT_ETH0_WAKEUP = 55, 73 INTERRUPT_SDIO0 = 56, 74 INTERRUPT_I2C0 = 57, 75 INTERRUPT_SPI0 = 58, 76 INTERRUPT_UART0 = 59, 77 INTERRUPT_CAN0 = 60, 78 INTERRUPT_PL00 = 61, 79 INTERRUPT_PL01 = 62, 80 INTERRUPT_PL02 = 63, 81 INTERRUPT_PL03 = 64, 82 INTERRUPT_PL04 = 65, 83 INTERRUPT_PL05 = 66, 84 INTERRUPT_PL06 = 67, 85 INTERRUPT_PL07 = 68, 86 INTERRUPT_TTIMER1_0 = 69, 87 INTERRUPT_TTIMER1_1 = 70, 88 INTERRUPT_TTIMER1_2 = 71, 89 INTERRUPT_DMAC4 = 72, 90 INTERRUPT_DMAC5 = 73, 91 INTERRUPT_DMAC6 = 74, 92 INTERRUPT_DMAC7 = 75, 93 INTERRUPT_USB1 = 76, 94 INTERRUPT_ETH1 = 77, 95 INTERRUPT_ETH1_WAKEUP = 78, 96 INTERRUPT_SDIO1 = 79, 97 INTERRUPT_I2C1 = 80, 98 INTERRUPT_SPI1 = 81, 99 INTERRUPT_UART1 = 82, 100 INTERRUPT_CAN1 = 83, 101 INTERRUPT_PL08 = 84, 102 INTERRUPT_PL09 = 85, 103 INTERRUPT_PL10 = 86, 104 INTERRUPT_PL11 = 87, 105 INTERRUPT_PL12 = 88, 106 INTERRUPT_PL13 = 89, 107 INTERRUPT_PL14 = 90, 108 INTERRUPT_PL15 = 91, 109 INTERRUPT_SCU_PARITY = 92, 110 maxIRQ = 92 111} platform_interrupt_t; 112 113#define IRQ_CNODE_BITS 12 114 115#define KERNEL_TIMER_IRQ INTERRUPT_PRIV_TIMER 116#define KERNEL_PMU_IRQ INTERRUPT_PMU0 117 118#include <arch/machine/gic_pl390.h> 119 120#endif /* !__PLAT_MACHINE_H */ 121