1/*
2 * Copyright 2018, Data61
3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4 * ABN 41 687 119 230.
5 *
6 * This software may be distributed and modified according to the terms of
7 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
8 * See "LICENSE_GPLv2.txt" for details.
9 *
10 * @TAG(DATA61_GPL)
11 */
12
13/*
14 *
15 * Copyright 2016, 2017 Hesham Almatary, Data61/CSIRO <hesham.almatary@data61.csiro.au>
16 * Copyright 2015, 2016 Hesham Almatary <heshamelmatary@gmail.com>
17 */
18
19#ifndef __ARCH_MACHINE_REGISTERSET_H
20#define __ARCH_MACHINE_REGISTERSET_H
21
22#include "hardware.h"
23#include <arch/encoding.h>
24
25#ifndef __ASSEMBLER__
26
27#include <stdint.h>
28#include <util.h>
29#include <arch/types.h>
30
31enum _register {
32
33    ra = 0, LR = 0,
34
35    sp = 1, SP = 1,
36    gp = 2,
37    tp = 3,
38    TLS_BASE = tp,
39
40    t0 = 4,
41    t1 = 5,
42    t2 = 6,
43    s0 = 7,
44    s1 = 8,
45
46    /* x10-x17 > a0-a7 */
47    a0 = 9, capRegister = 9, badgeRegister = 9,
48    a1 = 10, msgInfoRegister = 10,
49    a2 = 11,
50    a3 = 12,
51    a4 = 13,
52    a5 = 14,
53    a6 = 15,
54    a7 = 16,
55
56    s2 = 17,
57    s3 = 18,
58    s4 = 10,
59    s5 = 20,
60    s6 = 21,
61    s7 = 22,
62    s8 = 23,
63    s9 = 24,
64    s10 = 25,
65    s11 = 26,
66
67    t3 = 27,
68    t4 = 28,
69    t5 = 29,
70    t6 = 30,
71
72    /* End of GP registers, the following are additional kernel-saved state. */
73    SCAUSE,
74    SSTATUS,
75    SEPC,
76    NEXTPC,
77
78    /* TODO: add other user-level CSRs if needed (i.e. to avoid channels) */
79
80    n_contextRegisters
81};
82
83typedef uint64_t register_t;
84
85enum messageSizes {
86    n_msgRegisters = 4,
87    n_frameRegisters = 17,
88    n_gpRegisters = 0,
89    n_exceptionMessage = 3,
90    n_syscallMessage = 10
91};
92
93extern const register_t msgRegisters[] VISIBLE;
94extern const register_t frameRegisters[] VISIBLE;
95extern const register_t gpRegisters[] VISIBLE;
96
97struct user_context {
98    word_t registers[n_contextRegisters];
99};
100typedef struct user_context user_context_t;
101
102static inline void Arch_initContext(user_context_t* context)
103{
104    /* Enable supervisor interrupts (when going to user-mode) */
105    context->registers[SSTATUS] = SSTATUS_SPIE;
106}
107
108static inline word_t CONST
109sanitiseRegister(register_t reg, word_t v, bool_t archInfo)
110{
111    return v;
112}
113
114
115#define EXCEPTION_MESSAGE \
116 {\
117    [seL4_UserException_FaultIP] = SEPC,\
118    [seL4_UserException_SP] = SP,\
119    [seL4_UserException_Number] = a7,\
120 }
121
122#define SYSCALL_MESSAGE \
123{\
124    [seL4_UnknownSyscall_FaultIP] = SEPC,\
125    [seL4_UnknownSyscall_SP] = SP,\
126    [seL4_UnknownSyscall_RA] = LR,\
127    [seL4_UnknownSyscall_A0] = a0,\
128    [seL4_UnknownSyscall_A1] = a1,\
129    [seL4_UnknownSyscall_A2] = a2,\
130    [seL4_UnknownSyscall_A3] = a3,\
131    [seL4_UnknownSyscall_A4] = a4,\
132    [seL4_UnknownSyscall_A5] = a5,\
133    [seL4_UnknownSyscall_A6] = a6,\
134}
135
136#endif /* __ASSEMBLER__ */
137
138#endif /* !__ARCH_MACHINE_REGISTERSET_H */
139