1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12 13#pragma once 14 15enum irq_combiner_id { 16 IRQ_COMBINER0, 17 NIRQ_COMBINERS 18}; 19 20#define SYSMMU_G2D1_CIRQ COMBINER_IRQ(24, 6) 21#define SYSMMU_G2D0_CIRQ COMBINER_IRQ(24, 5) 22#define SYSMMU_FIMC_LITE11_CIRQ COMBINER_IRQ(24, 2) 23#define SYSMMU_FIMC_LITE10_CIRQ COMBINER_IRQ(24, 1) 24#define SYSMMU_DRCISP1_CIRQ COMBINER_IRQ(11, 7) 25#define SYSMMU_DRCISP0_CIRQ COMBINER_IRQ(11, 6) 26#define SYSMMU_ODC1_CIRQ COMBINER_IRQ(11, 1) 27#define SYSMMU_ODC0_CIRQ COMBINER_IRQ(11, 0) 28#define SYSMMU_ISP1_CIRQ COMBINER_IRQ(10, 7) 29#define SYSMMU_ISP0_CIRQ COMBINER_IRQ(10, 6) 30#define SYSMMU_DIS01_CIRQ COMBINER_IRQ(10, 5) 31#define SYSMMU_DIS00_CIRQ COMBINER_IRQ(10, 4) 32#define SYSMMU_DIS11_CIRQ COMBINER_IRQ( 9, 5) 33#define SYSMMU_DIS10_CIRQ COMBINER_IRQ( 9, 4) 34#define SYSMMU_MFCL1_CIRQ COMBINER_IRQ( 8, 6) 35#define SYSMMU_MFCL0_CIRQ COMBINER_IRQ( 8, 5) 36#define SYSMMU_TV_M01_CIRQ COMBINER_IRQ( 7, 5) 37#define SYSMMU_TV_M00_CIRQ COMBINER_IRQ( 7, 4) 38#define SYSMMU_MDMA11_CIRQ COMBINER_IRQ( 7, 3) 39#define SYSMMU_MDMA10_CIRQ COMBINER_IRQ( 7, 2) 40#define SYSMMU_MDMA01_CIRQ COMBINER_IRQ( 7, 1) 41#define SYSMMU_MDMA00_CIRQ COMBINER_IRQ( 7, 0) 42#define SYSMMU_SSS1_CIRQ COMBINER_IRQ( 6, 7) 43#define SYSMMU_SSS0_CIRQ COMBINER_IRQ( 6, 6) 44#define SYSMMU_RTIC1_CIRQ COMBINER_IRQ( 6, 5) 45#define SYSMMU_RTIC0_CIRQ COMBINER_IRQ( 6, 4) 46#define SYSMMU_MFCR1_CIRQ COMBINER_IRQ( 6, 3) 47#define SYSMMU_MFCR0_CIRQ COMBINER_IRQ( 6, 2) 48#define SYSMMU_ARM1_CIRQ COMBINER_IRQ( 6, 1) 49#define SYSMMU_ARM0_CIRQ COMBINER_IRQ( 6, 0) 50#define SYSMMU_3DNR1_CIRQ COMBINER_IRQ( 5, 7) 51#define SYSMMU_3DNR0_CIRQ COMBINER_IRQ( 5, 6) 52#define SYSMMU_MCUISP1_CIRQ COMBINER_IRQ( 5, 5) 53#define SYSMMU_MCUISP0_CIRQ COMBINER_IRQ( 5, 4) 54#define SYSMMU_SCALERCISP1_CIRQ COMBINER_IRQ( 5, 3) 55#define SYSMMU_SCALERCISP0_CIRQ COMBINER_IRQ( 5, 2) 56#define SYSMMU_FDISP1_CIRQ COMBINER_IRQ( 5, 1) 57#define SYSMMU_FDISP0_CIRQ COMBINER_IRQ( 5, 0) 58#define SYSMMU_JPEGX1_CIRQ COMBINER_IRQ( 4, 3) 59#define SYSMMU_JPEGX0_CIRQ COMBINER_IRQ( 4, 2) 60#define SYSMMU_ROTATOR1_CIRQ COMBINER_IRQ( 4, 1) 61#define SYSMMU_ROTATOR0_CIRQ COMBINER_IRQ( 4, 0) 62#define SYSMMU_SCALERPISP1_CIRQ COMBINER_IRQ( 3, 7) 63#define SYSMMU_SCALERPISP0_CIRQ COMBINER_IRQ( 3, 6) 64#define SYSMMU_FIMC_LITE01_CIRQ COMBINER_IRQ( 3, 5) 65#define SYSMMU_FIMC_LITE00_CIRQ COMBINER_IRQ( 3, 4) 66#define SYSMMU_DISP1_M01_CIRQ COMBINER_IRQ( 3, 3) 67#define SYSMMU_DISP1_M00_CIRQ COMBINER_IRQ( 3, 2) 68#define SYSMMU_FIMC_LITE21_CIRQ COMBINER_IRQ( 3, 1) 69#define SYSMMU_FIMC_LITE20_CIRQ COMBINER_IRQ( 3, 0) 70#define SYSMMU_GSCL31_CIRQ COMBINER_IRQ( 2, 7) 71#define SYSMMU_GSCL30_CIRQ COMBINER_IRQ( 2, 6) 72#define SYSMMU_GSCL21_CIRQ COMBINER_IRQ( 2, 5) 73#define SYSMMU_GSCL20_CIRQ COMBINER_IRQ( 2, 4) 74#define SYSMMU_GSCL11_CIRQ COMBINER_IRQ( 2, 3) 75#define SYSMMU_GSCL10_CIRQ COMBINER_IRQ( 2, 2) 76#define SYSMMU_GSCL01_CIRQ COMBINER_IRQ( 2, 1) 77#define SYSMMU_GSCL00_CIRQ COMBINER_IRQ( 2, 0) 78 79#define XEINT0_CIRQ COMBINER_IRQ(23, 0) 80#define XEINT1_CIRQ COMBINER_IRQ(24, 0) 81#define XEINT2_CIRQ COMBINER_IRQ(25, 0) 82#define XEINT3_CIRQ COMBINER_IRQ(25, 1) 83#define XEINT4_CIRQ COMBINER_IRQ(26, 0) 84#define XEINT5_CIRQ COMBINER_IRQ(26, 1) 85#define XEINT6_CIRQ COMBINER_IRQ(27, 0) 86#define XEINT7_CIRQ COMBINER_IRQ(27, 1) 87#define XEINT8_CIRQ COMBINER_IRQ(28, 0) 88#define XEINT9_CIRQ COMBINER_IRQ(28, 1) 89#define XEINT10_CIRQ COMBINER_IRQ(29, 0) 90#define XEINT11_CIRQ COMBINER_IRQ(29, 1) 91#define XEINT12_CIRQ COMBINER_IRQ(30, 0) 92#define XEINT13_CIRQ COMBINER_IRQ(30, 1) 93#define XEINT14_CIRQ COMBINER_IRQ(31, 0) 94#define XEINT15_CIRQ COMBINER_IRQ(31, 1) 95 96#define EXYNOS5_IRQ_COMBINER_PADDR 0x10440000 97#define EXYNOS5_IRQ_COMBINER_SIZE 0x1000 98 99#define EXYNOS_IRQ_COMBINER_PADDR EXYNOS5_IRQ_COMBINER_PADDR 100#define EXYNOS_IRQ_COMBINER_SIZE EXYNOS5_IRQ_COMBINER_SIZE 101 102/** 103 * Initialise the IRQ combiner with a provided address for IO access 104 * @param[in] base The memory address of the combiner registers 105 * @param[out] combiner An IRQ combiner structure to populate 106 * @return 0 on success. 107 */ 108int exynos_irq_combiner_init(void* base, irq_combiner_t* combiner); 109 110