1/*
2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 */
6
7#include <config.h>
8#include <arch/machine/registerset.h>
9
10void Arch_initContext(user_context_t *context)
11{
12    Mode_initContext(context);
13    context->registers[FS_BASE] = 0;
14    context->registers[GS_BASE] = 0;
15    context->registers[Error] = 0;
16    context->registers[FaultIP] = 0;
17    context->registers[NextIP] = 0;            /* overwritten by setNextPC() later on */
18    context->registers[CS] = SEL_CS_3;
19    context->registers[FLAGS] = FLAGS_USER_DEFAULT;
20    context->registers[SS] = SEL_DS_3;
21
22    Arch_initFpuContext(context);
23#ifdef CONFIG_HARDWARE_DEBUG_API
24    Arch_initBreakpointContext(&context->breakpointState);
25#endif
26}
27
28word_t sanitiseRegister(register_t reg, word_t v, bool_t archInfo)
29{
30    /* First perform any mode specific sanitization */
31    v = Mode_sanitiseRegister(reg, v);
32    if (reg == FLAGS) {
33        /* Set architecturally defined high and low bits */
34        v |=  FLAGS_HIGH;
35        v &= ~FLAGS_LOW;
36        /* require user to have interrupts and no traps */
37        v |=  FLAGS_IF;
38        v &= ~FLAGS_TF;
39        /* remove any other bits that shouldn't be set */
40        v &=  FLAGS_MASK;
41    }
42    return v;
43}
44