1/* 2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230) 3 * 4 * SPDX-License-Identifier: BSD-2-Clause 5 */ 6 7#pragma once 8 9#include <sel4/simple_types.h> 10#include <sel4/sel4_arch/types.h> 11 12typedef seL4_CPtr seL4_ARM_Page; 13typedef seL4_CPtr seL4_ARM_PageTable; 14typedef seL4_CPtr seL4_ARM_PageDirectory; 15typedef seL4_CPtr seL4_ARM_ASIDControl; 16typedef seL4_CPtr seL4_ARM_ASIDPool; 17typedef seL4_CPtr seL4_ARM_VCPU; 18typedef seL4_CPtr seL4_ARM_IOSpace; 19typedef seL4_CPtr seL4_ARM_IOPageTable; 20typedef seL4_CPtr seL4_ARM_SIDControl; 21typedef seL4_CPtr seL4_ARM_SID; 22typedef seL4_CPtr seL4_ARM_CBControl; 23typedef seL4_CPtr seL4_ARM_CB; 24 25typedef enum { 26 seL4_ARM_PageCacheable = 0x01, 27 seL4_ARM_ParityEnabled = 0x02, 28 seL4_ARM_Default_VMAttributes = 0x03, 29 seL4_ARM_ExecuteNever = 0x04, 30 /* seL4_ARM_PageCacheable | seL4_ARM_ParityEnabled */ 31 SEL4_FORCE_LONG_ENUM(seL4_ARM_VMAttributes), 32} seL4_ARM_VMAttributes; 33 34typedef enum { 35 seL4_ARM_CacheI = 1, 36 seL4_ARM_CacheD = 2, 37 seL4_ARM_CacheID = 3, 38 SEL4_FORCE_LONG_ENUM(seL4_ARM_CacheType), 39} seL4_ARM_CacheType; 40 41