1/*
2 * Buffalo WZR-450HP2 board support
3 *
4 * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * Based on the Qualcomm Atheros AP135/AP136 reference board support code
7 *   Copyright (c) 2012 Qualcomm Atheros
8 *
9 * Permission to use, copy, modify, and/or distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 *
21 */
22
23#include <linux/phy.h>
24#include <linux/gpio.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/partitions.h>
27#include <linux/platform_device.h>
28#include <linux/ar8216_platform.h>
29
30#include <asm/mach-ath79/ar71xx_regs.h>
31
32#include "common.h"
33#include "dev-eth.h"
34#include "dev-gpio-buttons.h"
35#include "dev-leds-gpio.h"
36#include "dev-m25p80.h"
37#include "dev-spi.h"
38#include "dev-usb.h"
39#include "dev-wmac.h"
40#include "machtypes.h"
41
42#define WZR_450HP2_KEYS_POLL_INTERVAL	20	/* msecs */
43#define WZR_450HP2_KEYS_DEBOUNCE_INTERVAL (3 * WZR_450HP2_KEYS_POLL_INTERVAL)
44
45#define WZR_450HP2_WMAC_CALDATA_OFFSET	0x1000
46
47static struct mtd_partition wzrhpg450h_partitions[] = {
48	{
49		.name		= "u-boot",
50		.offset		= 0,
51		.size		= 0x0040000,
52		.mask_flags	= MTD_WRITEABLE,
53	}, {
54		.name		= "u-boot-env",
55		.offset		= 0x0040000,
56		.size		= 0x0010000,
57	}, {
58		.name		= "ART",
59		.offset		= 0x0ff0000,
60		.size		= 0x0010000,
61		.mask_flags	= MTD_WRITEABLE,
62	}, {
63		.name		= "firmware",
64		.offset		= 0x0050000,
65		.size		= 0x0f90000,
66	}, {
67		.name		= "user_property",
68		.offset		= 0x0fe0000,
69		.size		= 0x0010000,
70	}
71};
72
73static struct flash_platform_data wzr_450hp2_flash_data = {
74	.parts		= wzrhpg450h_partitions,
75	.nr_parts	= ARRAY_SIZE(wzrhpg450h_partitions),
76};
77
78static struct gpio_led wzr_450hp2_leds_gpio[] __initdata = {
79	{
80		.name		= "buffalo:green:wps",
81		.gpio		= 3,
82		.active_low	= 1,
83	},
84	{
85		.name		= "buffalo:green:system",
86		.gpio		= 20,
87		.active_low	= 1,
88	},
89	{
90		.name		= "buffalo:green:wlan",
91		.gpio		= 18,
92		.active_low	= 1,
93	},
94};
95
96static struct gpio_keys_button wzr_450hp2_gpio_keys[] __initdata = {
97	{
98		.desc		= "Reset button",
99		.type		= EV_KEY,
100		.code		= KEY_RESTART,
101		.debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL,
102		.gpio		= 17,
103		.active_low	= 1,
104	},
105	{
106		.desc		= "RFKILL button",
107		.type		= EV_KEY,
108		.code		= KEY_RFKILL,
109		.debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL,
110		.gpio		= 21,
111		.active_low	= 1,
112	},
113};
114
115static const struct ar8327_led_info wzr_450hp2_leds_ar8327[] = {
116	AR8327_LED_INFO(PHY0_0, HW, "buffalo:green:lan1"),
117	AR8327_LED_INFO(PHY1_0, HW, "buffalo:green:lan2"),
118	AR8327_LED_INFO(PHY2_0, HW, "buffalo:green:lan3"),
119	AR8327_LED_INFO(PHY3_0, HW, "buffalo:green:lan4"),
120	AR8327_LED_INFO(PHY4_0, HW, "buffalo:green:wan"),
121};
122
123/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
124static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad0_cfg = {
125	.mode = AR8327_PAD_MAC_SGMII,
126	.sgmii_delay_en = true,
127};
128
129/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
130static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad6_cfg = {
131	.mode = AR8327_PAD_MAC_RGMII,
132	.txclk_delay_en = true,
133	.rxclk_delay_en = true,
134	.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
135	.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
136};
137
138static struct ar8327_led_cfg wzr_450hp2_ar8327_led_cfg = {
139	.led_ctrl0 = 0xcc35cc35,
140	.led_ctrl1 = 0xca35ca35,
141	.led_ctrl2 = 0xc935c935,
142	.led_ctrl3 = 0x03ffff00,
143	.open_drain = true,
144};
145
146static struct ar8327_platform_data wzr_450hp2_ar8327_data = {
147	.pad0_cfg = &wzr_450hp2_ar8327_pad0_cfg,
148	.pad6_cfg = &wzr_450hp2_ar8327_pad6_cfg,
149	.port0_cfg = {
150		.force_link = 1,
151		.speed = AR8327_PORT_SPEED_1000,
152		.duplex = 1,
153		.txpause = 1,
154		.rxpause = 1,
155	},
156	.port6_cfg = {
157		.force_link = 1,
158		.speed = AR8327_PORT_SPEED_1000,
159		.duplex = 1,
160		.txpause = 1,
161		.rxpause = 1,
162	},
163	.led_cfg = &wzr_450hp2_ar8327_led_cfg,
164	.num_leds = ARRAY_SIZE(wzr_450hp2_leds_ar8327),
165	.leds = wzr_450hp2_leds_ar8327,
166};
167
168static struct mdio_board_info wzr_450hp2_mdio0_info[] = {
169	{
170		.bus_id = "ag71xx-mdio.0",
171		.phy_addr = 0,
172		.platform_data = &wzr_450hp2_ar8327_data,
173	},
174};
175
176static void __init wzr_450hp2_setup(void)
177{
178	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
179	u8 *mac_wan = art;
180	u8 *mac_lan = mac_wan + ETH_ALEN;
181
182	ath79_register_m25p80(&wzr_450hp2_flash_data);
183
184	ath79_register_leds_gpio(-1, ARRAY_SIZE(wzr_450hp2_leds_gpio),
185				 wzr_450hp2_leds_gpio);
186	ath79_register_gpio_keys_polled(-1, WZR_450HP2_KEYS_POLL_INTERVAL,
187					ARRAY_SIZE(wzr_450hp2_gpio_keys),
188					wzr_450hp2_gpio_keys);
189
190	ath79_register_wmac(art + WZR_450HP2_WMAC_CALDATA_OFFSET, mac_lan);
191
192	mdiobus_register_board_info(wzr_450hp2_mdio0_info,
193				    ARRAY_SIZE(wzr_450hp2_mdio0_info));
194	ath79_register_mdio(0, 0x0);
195
196	ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
197
198	/* GMAC0 is connected to the RMGII interface */
199	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
200	ath79_eth0_data.phy_mask = BIT(0);
201	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
202	ath79_eth0_pll_data.pll_1000 = 0x56000000;
203
204	ath79_init_mac(ath79_eth0_data.mac_addr, mac_wan, 0);
205	ath79_register_eth(0);
206
207	/* GMAC1 is connected to the SGMII interface */
208	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
209	ath79_eth1_data.speed = SPEED_1000;
210	ath79_eth1_data.duplex = DUPLEX_FULL;
211	ath79_eth1_pll_data.pll_1000 = 0x03000101;
212
213	ath79_init_mac(ath79_eth1_data.mac_addr, mac_lan, 0);
214	ath79_register_eth(1);
215
216	ath79_register_usb();
217}
218
219MIPS_MACHINE(ATH79_MACH_WZR_450HP2, "WZR-450HP2",
220	     "Buffalo WZR-450HP2", wzr_450hp2_setup);
221
222