1/*
2 *  TP-LINK TL-WDR3320 v2 board support
3 *
4 *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
5 *  Copyright (C) 2015 Weijie Gao <hackpascal@gmail.com>
6 *
7 *  This program is free software; you can redistribute it and/or modify it
8 *  under the terms of the GNU General Public License version 2 as published
9 *  by the Free Software Foundation.
10 */
11
12#include <linux/pci.h>
13#include <linux/phy.h>
14#include <linux/gpio.h>
15#include <linux/platform_device.h>
16#include <linux/ath9k_platform.h>
17
18#include <asm/mach-ath79/ar71xx_regs.h>
19
20#include "common.h"
21#include "dev-ap9x-pci.h"
22#include "dev-eth.h"
23#include "dev-gpio-buttons.h"
24#include "dev-leds-gpio.h"
25#include "dev-m25p80.h"
26#include "dev-spi.h"
27#include "dev-usb.h"
28#include "dev-wmac.h"
29#include "machtypes.h"
30
31#define WDR3320_GPIO_LED_WLAN5G		12
32#define WDR3320_GPIO_LED_SYSTEM		14
33#define WDR3320_GPIO_LED_QSS		15
34#define WDR3320_GPIO_LED_WAN		4
35#define WDR3320_GPIO_LED_LAN1		18
36#define WDR3320_GPIO_LED_LAN2		20
37#define WDR3320_GPIO_LED_LAN3		21
38#define WDR3320_GPIO_LED_LAN4		22
39
40#define WDR3320_GPIO_BTN_RESET		16
41
42#define WDR3320_KEYS_POLL_INTERVAL	20	/* msecs */
43#define WDR3320_KEYS_DEBOUNCE_INTERVAL	(3 * WDR3320_KEYS_POLL_INTERVAL)
44
45#define WDR3320_WMAC_CALDATA_OFFSET	0x1000
46#define WDR3320_PCIE_CALDATA_OFFSET	0x5000
47
48static const char *wdr3320_part_probes[] = {
49	"tp-link",
50	NULL,
51};
52
53static struct flash_platform_data wdr3320_flash_data = {
54	.part_probes	= wdr3320_part_probes,
55};
56
57static struct gpio_led wdr3320_leds_gpio[] __initdata = {
58	{
59		.name		= "tp-link:green:qss",
60		.gpio		= WDR3320_GPIO_LED_QSS,
61		.active_low	= 1,
62	},
63	{
64		.name		= "tp-link:green:system",
65		.gpio		= WDR3320_GPIO_LED_SYSTEM,
66		.active_low	= 1,
67	},
68	{
69		.name		= "tp-link:green:wlan5g",
70		.gpio		= WDR3320_GPIO_LED_WLAN5G,
71		.active_low	= 1,
72	},
73};
74
75static struct gpio_keys_button wdr3320_gpio_keys[] __initdata = {
76	{
77		.desc		= "reset",
78		.type		= EV_KEY,
79		.code		= KEY_RESTART,
80		.debounce_interval = WDR3320_KEYS_DEBOUNCE_INTERVAL,
81		.gpio		= WDR3320_GPIO_BTN_RESET,
82		.active_low	= 1,
83	},
84};
85
86static void __init wdr3320_setup(void)
87{
88	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
89	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
90	u8 tmpmac[ETH_ALEN];
91
92	ath79_register_m25p80(&wdr3320_flash_data);
93	ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3320_leds_gpio),
94				 wdr3320_leds_gpio);
95	ath79_register_gpio_keys_polled(-1, WDR3320_KEYS_POLL_INTERVAL,
96					ARRAY_SIZE(wdr3320_gpio_keys),
97					wdr3320_gpio_keys);
98
99	ath79_init_mac(tmpmac, mac, 0);
100	ath79_register_wmac(art + WDR3320_WMAC_CALDATA_OFFSET, tmpmac);
101
102	ath79_init_mac(tmpmac, mac, -1);
103	ap9x_pci_setup_wmac_led_pin(0, 0);
104	ap91_pci_init(art + WDR3320_PCIE_CALDATA_OFFSET, tmpmac);
105
106	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
107
108	ath79_register_mdio(1, 0x0);
109
110	/* LAN */
111	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
112
113	/* GMAC1 is connected to the internal switch */
114	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
115
116	ath79_register_eth(1);
117
118	/* WAN */
119	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
120
121	/* GMAC0 is connected to the PHY4 of the internal switch */
122	ath79_switch_data.phy4_mii_en = 1;
123	ath79_switch_data.phy_poll_mask = BIT(4);
124	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
125	ath79_eth0_data.phy_mask = BIT(4);
126	ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
127
128	ath79_register_eth(0);
129
130	ath79_register_usb();
131
132	ath79_gpio_output_select(WDR3320_GPIO_LED_LAN1,
133				 AR934X_GPIO_OUT_LED_LINK0);
134	ath79_gpio_output_select(WDR3320_GPIO_LED_LAN2,
135				 AR934X_GPIO_OUT_LED_LINK1);
136	ath79_gpio_output_select(WDR3320_GPIO_LED_LAN3,
137				 AR934X_GPIO_OUT_LED_LINK2);
138	ath79_gpio_output_select(WDR3320_GPIO_LED_LAN4,
139				 AR934X_GPIO_OUT_LED_LINK3);
140	ath79_gpio_output_select(WDR3320_GPIO_LED_WAN,
141				 AR934X_GPIO_OUT_LED_LINK4);
142}
143
144MIPS_MACHINE(ATH79_MACH_TL_WDR3320_V2, "TL-WDR3320-v2",
145	     "TP-LINK TL-WDR3320 v2",
146	     wdr3320_setup);
147