1/* 2 * OpenMesh OM5P support 3 * 4 * Copyright (C) 2013 Marek Lindner <marek@open-mesh.com> 5 * Copyright (C) 2014 Sven Eckelmann <sven@open-mesh.com> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation. 10 */ 11 12#include <linux/gpio.h> 13#include <linux/mtd/mtd.h> 14#include <linux/mtd/partitions.h> 15#include <linux/platform_device.h> 16#include <linux/i2c.h> 17#include <linux/i2c-algo-bit.h> 18#include <linux/i2c-gpio.h> 19#include <linux/platform_data/phy-at803x.h> 20 21#include <asm/mach-ath79/ar71xx_regs.h> 22#include <asm/mach-ath79/ath79.h> 23 24#include "common.h" 25#include "dev-ap9x-pci.h" 26#include "dev-eth.h" 27#include "dev-gpio-buttons.h" 28#include "dev-leds-gpio.h" 29#include "dev-m25p80.h" 30#include "dev-wmac.h" 31#include "machtypes.h" 32 33#define OM5P_GPIO_LED_POWER 13 34#define OM5P_GPIO_LED_GREEN 16 35#define OM5P_GPIO_LED_RED 19 36#define OM5P_GPIO_LED_YELLOW 17 37#define OM5P_GPIO_LED_LAN 14 38#define OM5P_GPIO_LED_WAN 15 39#define OM5P_GPIO_BTN_RESET 4 40#define OM5P_GPIO_I2C_SCL 20 41#define OM5P_GPIO_I2C_SDA 21 42 43#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */ 44#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL) 45 46#define OM5P_WMAC_CALDATA_OFFSET 0x1000 47#define OM5P_PCI_CALDATA_OFFSET 0x5000 48 49static struct gpio_led om5p_leds_gpio[] __initdata = { 50 { 51 .name = "om5p:blue:power", 52 .gpio = OM5P_GPIO_LED_POWER, 53 .active_low = 1, 54 }, { 55 .name = "om5p:red:wifi", 56 .gpio = OM5P_GPIO_LED_RED, 57 .active_low = 1, 58 }, { 59 .name = "om5p:yellow:wifi", 60 .gpio = OM5P_GPIO_LED_YELLOW, 61 .active_low = 1, 62 }, { 63 .name = "om5p:green:wifi", 64 .gpio = OM5P_GPIO_LED_GREEN, 65 .active_low = 1, 66 }, { 67 .name = "om5p:blue:lan", 68 .gpio = OM5P_GPIO_LED_LAN, 69 .active_low = 1, 70 }, { 71 .name = "om5p:blue:wan", 72 .gpio = OM5P_GPIO_LED_WAN, 73 .active_low = 1, 74 } 75}; 76 77static struct gpio_keys_button om5p_gpio_keys[] __initdata = { 78 { 79 .desc = "reset", 80 .type = EV_KEY, 81 .code = KEY_RESTART, 82 .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL, 83 .gpio = OM5P_GPIO_BTN_RESET, 84 .active_low = 1, 85 } 86}; 87 88static struct flash_platform_data om5p_flash_data = { 89 .type = "mx25l12805d", 90}; 91 92static void __init om5p_setup(void) 93{ 94 u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); 95 u8 mac[6]; 96 97 /* make lan / wan leds software controllable */ 98 ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); 99 ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); 100 101 ath79_register_m25p80(&om5p_flash_data); 102 ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), 103 om5p_leds_gpio); 104 ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL, 105 ARRAY_SIZE(om5p_gpio_keys), 106 om5p_gpio_keys); 107 108 ath79_init_mac(mac, art, 2); 109 ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); 110 111 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); 112 ath79_register_mdio(1, 0x0); 113 114 ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); 115 ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); 116 117 /* GMAC0 is connected to the PHY0 of the internal switch */ 118 ath79_switch_data.phy4_mii_en = 1; 119 ath79_switch_data.phy_poll_mask = BIT(0); 120 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; 121 ath79_eth0_data.phy_mask = BIT(0); 122 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; 123 ath79_register_eth(0); 124 125 /* GMAC1 is connected to the internal switch */ 126 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; 127 ath79_register_eth(1); 128} 129 130MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup); 131 132static struct i2c_gpio_platform_data om5pan_i2c_device_platdata = { 133 .sda_pin = OM5P_GPIO_I2C_SDA, 134 .scl_pin = OM5P_GPIO_I2C_SCL, 135 .udelay = 10, 136 .sda_is_open_drain = 1, 137 .scl_is_open_drain = 1, 138}; 139 140static struct platform_device om5pan_i2c_device = { 141 .name = "i2c-gpio", 142 .id = 0, 143 .dev = { 144 .platform_data = &om5pan_i2c_device_platdata, 145 }, 146}; 147 148static struct i2c_board_info om5pan_i2c_devs[] __initdata = { 149 { 150 I2C_BOARD_INFO("tmp423", 0x4c), 151 }, 152}; 153 154static struct at803x_platform_data om5p_an_at803x_data = { 155 .disable_smarteee = 1, 156 .enable_rgmii_rx_delay = 1, 157 .enable_rgmii_tx_delay = 1, 158}; 159 160static struct mdio_board_info om5p_an_mdio0_info[] = { 161 { 162 .bus_id = "ag71xx-mdio.0", 163 .phy_addr = 7, 164 .platform_data = &om5p_an_at803x_data, 165 }, 166}; 167 168static void __init om5p_an_setup(void) 169{ 170 u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); 171 u8 mac[6]; 172 173 /* temperature sensor */ 174 platform_device_register(&om5pan_i2c_device); 175 i2c_register_board_info(0, om5pan_i2c_devs, 176 ARRAY_SIZE(om5pan_i2c_devs)); 177 178 /* make lan / wan leds software controllable */ 179 ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); 180 ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); 181 182 ath79_register_m25p80(&om5p_flash_data); 183 ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), 184 om5p_leds_gpio); 185 186 ath79_init_mac(mac, art, 0x02); 187 ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); 188 189 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); 190 ath79_setup_ar934x_eth_rx_delay(2, 2); 191 ath79_register_mdio(0, 0x0); 192 ath79_register_mdio(1, 0x0); 193 194 mdiobus_register_board_info(om5p_an_mdio0_info, 195 ARRAY_SIZE(om5p_an_mdio0_info)); 196 197 ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00); 198 ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01); 199 200 /* GMAC0 is connected to the PHY7 */ 201 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; 202 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; 203 ath79_eth0_data.phy_mask = BIT(7); 204 ath79_eth0_pll_data.pll_1000 = 0x02000000; 205 ath79_eth0_pll_data.pll_100 = 0x00000101; 206 ath79_eth0_pll_data.pll_10 = 0x00001313; 207 ath79_register_eth(0); 208 209 /* GMAC1 is connected to the internal switch */ 210 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; 211 ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; 212 ath79_register_eth(1); 213 214 ath79_init_mac(mac, art, 0x10); 215 ap91_pci_init(art + OM5P_PCI_CALDATA_OFFSET, mac); 216} 217 218MIPS_MACHINE(ATH79_MACH_OM5P_AN, "OM5P-AN", "OpenMesh OM5P AN", om5p_an_setup); 219