sysctrl.h revision 1341:6d7c4f090a72
174462Salfred/* 274462Salfred * CDDL HEADER START 374462Salfred * 474462Salfred * The contents of this file are subject to the terms of the 574462Salfred * Common Development and Distribution License (the "License"). 674462Salfred * You may not use this file except in compliance with the License. 774462Salfred * 874462Salfred * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 974462Salfred * or http://www.opensolaris.org/os/licensing. 1074462Salfred * See the License for the specific language governing permissions 1174462Salfred * and limitations under the License. 1274462Salfred * 1374462Salfred * When distributing Covered Code, include this CDDL HEADER in each 1499775Salfred * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1574462Salfred * If applicable, add the following below this CDDL HEADER, with the 1699775Salfred * fields enclosed by brackets "[]" replaced with your own identifying 1774462Salfred * information: Portions Copyright [yyyy] [name of copyright owner] 1874462Salfred * 1974462Salfred * CDDL HEADER END 2074462Salfred */ 2174462Salfred 2274462Salfred/* 2374462Salfred * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 2499775Salfred * Use is subject to license terms. 2574462Salfred */ 2674462Salfred 2774462Salfred#ifndef _SYS_SYSCTRL_H 2874462Salfred#define _SYS_SYSCTRL_H 2974462Salfred 3074462Salfred#pragma ident "%Z%%M% %I% %E% SMI" 3174462Salfred 3274462Salfred#ifdef __cplusplus 3384306Sruextern "C" { 3474462Salfred#endif 3574462Salfred 3674462Salfred#ifndef TRUE 3774462Salfred#define TRUE (1) 3874462Salfred#endif 3999775Salfred#ifndef FALSE 4099775Salfred#define FALSE (0) 4184425Sbde#endif 4299775Salfred 43152720Sru/* 4474462Salfred * Debugging macros 4578397Smikeh * 4674462Salfred * The DPRINTF macro can be used by setting the sysc_debug_print_level to the 4774462Salfred * appropriate debugging level. The debug levels are defined in each source 4874462Salfred * file where this header file is included. The scoping of sysc_debug_info, 4974462Salfred * and sysc_debug_print_level is to the file which included the header file. 5074462Salfred * If multiple levels need to be output, the values can be 'ored' 5174462Salfred * together into sysc_debug_print_level. If sysc_debug_print_line's bit 1 is 5274462Salfred * set, the line number of the debugging statement is printed out. If it has 5374462Salfred * bit 2 set, the macro will drop into either the debugger or the OBP PROM. 5474462Salfred */ 55152720Sru 5674462Salfred#ifdef DEBUG 5774462Salfred 5874462Salfred#define SYSCTRL_ATTACH_DEBUG 0x1 5999775Salfred#define SYSCTRL_INTERRUPT_DEBUG 0x2 6099775Salfred#define SYSCTRL_REGISTERS_DEBUG 0x4 61100001Salfred#define SYSC_DEBUG SYSCTRL_ATTACH_DEBUG 6274462Salfred 6374462Salfred#include <sys/promif.h> 6474462Salfredextern void debug_enter(char *); 6574462Salfred 6674462Salfredextern int sysc_debug_info; 6774462Salfredextern int sysc_debug_print_level; 6874462Salfred 6974462Salfred#define PRINT_LINE_NUMBER 0x1 7074462Salfred#define ENTER_MON 0x2 7174462Salfred 7274462Salfred#define _PRINTF prom_printf /* For logging to the console */ 7374462Salfred 7474462Salfred#define DPRINTF(print_flag, args) \ 7574462Salfred if (sysc_debug_print_level & (print_flag) && sysc_debug_info & \ 76108087Sru PRINT_LINE_NUMBER) \ 7774462Salfred _PRINTF("%s line %d:\n", __FILE__, __LINE__); \ 78108087Sru if (sysc_debug_print_level & (print_flag)) { \ 7974462Salfred _PRINTF args; \ 8074462Salfred if (sysc_debug_info & ENTER_MON) \ 8174462Salfred debug_enter(""); \ 8274462Salfred } 8374462Salfred 8474462Salfred#else 8574462Salfred#define DPRINTF(print_flag, args) 8674462Salfred#endif /* DEBUG */ 8774462Salfred 8874462Salfred/* 8974462Salfred * OBP supplies us with 3 register sets for the clock-board node. The code for 9074462Salfred * the syctrl driver relies on these register sets being presented by the 9174462Salfred * PROM in the order specified below. If this changes, the following comments 9274462Salfred * must be revised and the code in sysctrl_attach() must be changed to reflect 9374462Salfred * these revisions. 9474462Salfred * 9574462Salfred * They are: 9674462Salfred * 0 Clock frequency registers 9774462Salfred * 1 Misc registers 9874462Salfred * 2 Clock version register 9974462Salfred */ 10074462Salfred 10174462Salfred/* 10274462Salfred * The offsets are defined as offsets in bytes from the base of the OBP 103108087Sru * register to which the register belongs to. 104162385Sru */ 10574462Salfred 10674462Salfred/* Register set 0 */ 10774462Salfred#define SYS_OFF_CLK_FREQ2 0x2 /* offset of clock register 2 */ 108141846Sru 109231564Sed/* Important bits for Clock Frequency register 2 */ 110231564Sed#define RCONS_UART_EN 0x80 /* Remote console reset enabled */ 111231564Sed#define GEN_RESET_EN 0x40 /* Enable reset on freq change */ 112231564Sed#define TOD_RESET_EN 0x20 /* Enable reset from TOD watchdog */ 11374462Salfred#define CLOCK_FREQ_8 0x01 /* Frequency bit 8 */ 11474462Salfred#define CLOCK_DIV_0 0x02 /* Cpu module divisor bit 0 */ 11574462Salfred#define CLOCK_RANGE 0x0c /* Bits 3:2 control the clock range */ 11674462Salfred#define CLOCK_DIV_1 0x10 /* Cpu module divisor bit 1 */ 11774462Salfred 11874462Salfred/* Register set 1 */ 11978678Siedowse#define SYS_OFF_CTRL 0x0 /* Offset of System Control register */ 12074462Salfred#define SYS_OFF_STAT1 0x10 /* Offset of System Status1 register */ 12174462Salfred#define SYS_OFF_STAT2 0x20 /* Offset of System Status2 register */ 12274462Salfred#define SYS_OFF_PSSTAT 0x30 /* Offset of Power Supply Status */ 12374462Salfred#define SYS_OFF_PSPRES 0x40 /* Offset of Power Supply Presence */ 124108037Sru#define SYS_OFF_TEMP 0x50 /* Offset of temperature register */ 12574462Salfred#define SYS_OFF_DIAG 0x60 /* Offset of interrupt diag register */ 126108037Sru#define SYS_OFF_PPPSR 0x70 /* Offset of second Power Supply Status */ 12774462Salfred#define SYS_STATUS1_PADDR 0x1fff8906010 /* physical address for physio */ 12874462Salfred 12974462Salfred/* Register set 2 (not present on old vintage clock boards) */ 13074462Salfred#define CLK_VERSION_REG 0x0 /* Offset of clock version register */ 13174462Salfred#define CLK_VERSION_REG_PADDR 0x1fff890c000 /* physical address for physio */ 13274462Salfred 13374462Salfred/* Important bits for the board version register */ 13474462Salfred#define OLD_CLK_GEN 0x1 13574462Salfred#define OLD_CLK_DIV 0x2 13674462Salfred 137108087Sru#define RMT_CONS_OFFSET 0x4004 /* Offset of Remote Console UART */ 13874462Salfred#define RMT_CONS_LEN 0x8 /* Size of Remote Console UART */ 139108087Sru 14074462Salfred/* Bit field defines for System Control register */ 14174462Salfred#define SYS_PPS_FAN_FAIL_EN 0x80 /* PPS Fan Fail Interrupt Enable */ 142108087Sru#define SYS_PS_FAIL_EN 0x40 /* PS DC Fail Interrupt Enable */ 14374462Salfred#define SYS_AC_PWR_FAIL_EN 0x20 /* AC Power Fail Interrupt Enable */ 144108087Sru#define SYS_SBRD_PRES_EN 0x10 /* Board Insertion Interrupt En */ 14574462Salfred#define SYS_PWR_OFF 0x08 /* Bit to turn system power */ 14674462Salfred#define SYS_LED_LEFT 0x04 /* System Left LED. Reverse Logic */ 14774462Salfred#define SYS_LED_MID 0x02 /* System Middle LED */ 14874462Salfred#define SYS_LED_RIGHT 0x01 /* System Right LED */ 14974462Salfred 150108037Sru/* Bit field defines for System Status1 register */ 15174462Salfred#define SYS_SLOTS 0xC0 /* system type slot field */ 152108037Sru#define SYS_NOT_SECURE 0x20 /* ==0 Keyswitch in secure pos. */ 15374462Salfred#define SYS_NOT_P_FAN_PRES 0x10 /* ==0 PPS cooling tray present */ 15474462Salfred#define SYS_NOT_BRD_PRES 0x08 /* ==0 When board inserted */ 15574462Salfred#define SYS_NOT_PPS0_PRES 0x04 /* ==0 If PPS0 present */ 15674462Salfred#define SYS_TOD_NOT_RST 0x02 /* ==0 if TOD reset occurred */ 15774462Salfred#define SYS_GEN_NOT_RST 0x01 /* ==0 if clock freq reset occured */ 15874462Salfred 15974462Salfred/* Macros to determine system type from System Status1 register */ 16074462Salfred#define SYS_TYPE(x) ((x) & SYS_SLOTS) 16174462Salfred#define SYS_16_SLOT 0x40 16274462Salfred#define SYS_8_SLOT 0xC0 16374462Salfred#define SYS_4_SLOT 0x80 16474462Salfred#define SYS_TESTBED 0x00 16574462Salfred 16674462Salfred/* Bit field defines for Clock Version Register */ 16774462Salfred#define SYS_SLOTS2 0x80 /* system type slot2 mask */ 16874462Salfred#define SYS_PLUS_SYSTEM 0x00 /* bit 7 is low for plus system */ 16974462Salfred 17074462Salfred/* Macros to determine frequency capability from clock version register */ 17174462Salfred#define SYS_TYPE2(x) ((x) & SYS_SLOTS2) 17274462Salfred#define ISPLUSSYS(reg) ((reg != 0) && \ 17374462Salfred (SYS_TYPE2(*reg) == SYS_PLUS_SYSTEM)) 17474462Salfred 17574462Salfred/* Macros to determine system type based on number of physical slots */ 17674462Salfred#define IS4SLOT(n) ((n) == 4) 17774462Salfred#define IS5SLOT(n) ((n) == 5) 17874462Salfred#define IS8SLOT(n) ((n) == 8) 17974462Salfred#define IS16SLOT(n) ((n) == 16) 18099775Salfred#define ISTESTBED(n) ((n) == 0) 18199775Salfred 18299775Salfred/* Bit field defines for System Status2 register */ 183108087Sru#define SYS_RMTE_NOT_RST 0x80 /* Remote Console reset occurred */ 18499775Salfred#define SYS_PPS0_OK 0x40 /* ==1 PPS0 OK */ 18599775Salfred#define SYS_CLK_33_OK 0x20 /* 3.3V OK on clock board */ 186101577Sru#define SYS_CLK_50_OK 0x10 /* 5.0V OK on clock board */ 187101577Sru#define SYS_AC_FAIL 0x08 /* System lost AC Power source */ 18899775Salfred#define SYS_RACK_FANFAIL 0x04 /* Peripheral Rack fan status */ 18999775Salfred#define SYS_AC_FAN_OK 0x02 /* Status of 4 AC box fans */ 19099775Salfred#define SYS_KEYSW_FAN_OK 0x01 /* Status of keyswitch fan */ 19199775Salfred 19274462Salfred/* Bit field defines for Power Supply Presence register */ 19374462Salfred#define SYS_NOT_PPS1_PRES 0x80 /* ==0 if PPS1 present in 4slot */ 19474462Salfred 19574462Salfred/* Bit field defines for Precharge and Peripheral Power Status register */ 19674462Salfred#define SYS_NOT_CURRENT_S 0x80 /* Current share backplane */ 197108087Sru#define SYS_PPPSR_BITS 0x7f /* bulk test bit mask */ 19874462Salfred#define SYS_V5_P_OK 0x40 /* ==1 peripheral 5v ok */ 199108087Sru#define SYS_V12_P_OK 0x20 /* ==1 peripheral 12v ok */ 20074462Salfred#define SYS_V5_AUX_OK 0x10 /* ==1 auxiliary 5v ok */ 20174462Salfred#define SYS_V5_P_PCH_OK 0x08 /* ==1 peripheral 5v precharge ok */ 202108087Sru#define SYS_V12_P_PCH_OK 0x04 /* ==1 peripheral 12v precharge ok */ 20374462Salfred#define SYS_V3_PCH_OK 0x02 /* ==1 system 3.3v precharge ok */ 204108087Sru#define SYS_V5_PCH_OK 0x01 /* ==1 system 5.0v precharge ok */ 20574462Salfred 20674462Salfred#ifndef _ASM 20774462Salfred 20874462Salfred#define SYSCTRL_KSTAT_NAME "sysctrl" 20974462Salfred#define CSR_KSTAT_NAMED "csr" 21074462Salfred#define STAT1_KSTAT_NAMED "status1" 21174462Salfred#define STAT2_KSTAT_NAMED "status2" 212108087Sru#define CLK_FREQ2_KSTAT_NAMED "clk_freq2" 21374462Salfred#define FAN_KSTAT_NAMED "fan_status" 214108087Sru#define KEY_KSTAT_NAMED "key_status" 21574462Salfred#define POWER_KSTAT_NAMED "power_status" 21674462Salfred#define BDLIST_KSTAT_NAME "bd_list" 21774462Salfred#define CLK_VER_KSTAT_NAME "clk_ver" 21874462Salfred 21974462Salfred/* 22074462Salfred * The Power Supply shadow kstat is too large to fit in a kstat_named 22174462Salfred * struct, so it has been changed to be a raw kstat. 22274462Salfred */ 22374462Salfred#define PSSHAD_KSTAT_NAME "ps_shadow" 22474462Salfred 22574462Salfred/* States of a power supply DC voltage. */ 22674462Salfredenum e_state { PS_BOOT = 0, PS_OUT, PS_UNKNOWN, PS_OK, PS_FAIL }; 22774462Salfredenum e_pres_state { PRES_UNKNOWN = 0, PRES_IN, PRES_OUT }; 22874462Salfred 22974462Salfred/* 23074462Salfred * several power supplies are managed -- 8 core power supplies, 23174462Salfred * up to two pps, a couple of clock board powers and a register worth 23274462Salfred * of precharges. 23374462Salfred */ 23474462Salfred#define SYS_PS_COUNT 19 23574462Salfred/* core PS 0 thru 7 are index 0 thru 7 */ 23674462Salfred#define SYS_PPS0_INDEX 8 23774462Salfred#define SYS_CLK_33_INDEX 9 23874462Salfred#define SYS_CLK_50_INDEX 10 23974462Salfred#define SYS_V5_P_INDEX 11 24074462Salfred#define SYS_V12_P_INDEX 12 24174462Salfred#define SYS_V5_AUX_INDEX 13 24274462Salfred#define SYS_V5_P_PCH_INDEX 14 24374462Salfred#define SYS_V12_P_PCH_INDEX 15 24474462Salfred#define SYS_V3_PCH_INDEX 16 24574462Salfred#define SYS_V5_PCH_INDEX 17 24674462Salfred#define SYS_P_FAN_INDEX 18 /* the peripheral fan assy */ 24774462Salfred 24874462Salfred/* fan timeout structures */ 24974462Salfredenum pps_fan_type { RACK = 0, AC = 1, KEYSW = 2 }; 25074462Salfred#define SYS_PPS_FAN_COUNT 3 25174462Salfred 25274462Salfred/* 25399775Salfred * States of the secure key switch position. 25499775Salfred */ 25599775Salfredenum keyswitch_state { KEY_BOOT = 0, KEY_SECURE, KEY_NOT_SECURE }; 256108087Sru 25799775Salfred/* Redundant power states */ 25899775Salfredenum power_state { BOOT = 0, BELOW_MINIMUM, MINIMUM, REDUNDANT }; 259101577Sru 260101577Sru/* 26199775Salfred * minor device mask 26299775Salfred * B - bottom 4 bits (16 slots) are for the slot/receptacle id 26399775Salfred * I - next 4 bits are for the instance number 26499775Salfred * X - rest are not used 26574462Salfred * 26674462Salfred * Upper Lower 26774462Salfred * XXXXX...............IIIIBBBB 26874462Salfred * 26974462Salfred * Example: 27074462Salfred * device at instance 0 and slot 8, minor device number 0x8 = decimal 8 27174462Salfred * device at instance 1 and slot 10, minor device number 0x1A = decimal 26 27274462Salfred */ 27374462Salfred#define SYSC_SLOT_MASK 0x0F 27474462Salfred#define SYSC_INSTANCE_MASK 0xF0 27574462Salfred#define SYSC_INSTANCE_SHIFT 4 27674462Salfred 27774462Salfred/* Macro definitions */ 27874462Salfred#define HOTPLUG_DISABLED_PROPERTY "hotplug-disabled" 27974462Salfred#define GETSLOT(unit) (getminor(unit) & SYSC_SLOT_MASK) 28074462Salfred#define GETINSTANCE(unit) \ 28174462Salfred ((getminor(unit) & SYSC_INSTANCE_MASK) >> SYSC_INSTANCE_SHIFT) 28274462Salfred#define PUTINSTANCE(inst) \ 28374462Salfred (((inst) << SYSC_INSTANCE_SHIFT) & SYSC_INSTANCE_MASK) 28474462Salfred#define GETSOFTC(i) \ 28574462Salfred ((struct sysctrl_soft_state *)ddi_get_soft_state(sysctrlp, getminor(i))) 28674462Salfred 28774462Salfred/* 28874462Salfred * Definition of sysctrl ioctls. 28974462Salfred */ 29074462Salfred#define SYSC_IOC ('H'<<8) 29174462Salfred 29274462Salfred#define SYSC_CFGA_CMD_GETSTATUS (SYSC_IOC|68) 29374462Salfred#define SYSC_CFGA_CMD_EJECT (SYSC_IOC|69) 29474462Salfred#define SYSC_CFGA_CMD_INSERT (SYSC_IOC|70) 29574462Salfred#define SYSC_CFGA_CMD_CONNECT (SYSC_IOC|71) 296108087Sru#define SYSC_CFGA_CMD_DISCONNECT (SYSC_IOC|72) 29774462Salfred#define SYSC_CFGA_CMD_UNCONFIGURE (SYSC_IOC|73) 298108087Sru#define SYSC_CFGA_CMD_CONFIGURE (SYSC_IOC|74) 29974462Salfred#define SYSC_CFGA_CMD_TEST (SYSC_IOC|75) 30074462Salfred#define SYSC_CFGA_CMD_TEST_SET_COND (SYSC_IOC|76) 30174462Salfred#define SYSC_CFGA_CMD_QUIESCE_TEST (SYSC_IOC|77) 30274462Salfred 30374462Salfred#if defined(_KERNEL) 30474462Salfred 30574462Salfred#define SPUR_TIMEOUT_USEC (1 * MICROSEC) 30674462Salfred#define SPUR_LONG_TIMEOUT_USEC (5 * MICROSEC) 30774462Salfred#define AC_TIMEOUT_USEC (1 * MICROSEC) 30874462Salfred#define PS_FAIL_TIMEOUT_USEC (500 * (MICROSEC / MILLISEC)) 30974462Salfred#define PPS_FAN_TIMEOUT_USEC (1 * MICROSEC) 31074462Salfred 31174462Salfred#define BRD_INSERT_DELAY_USEC (500 * (MICROSEC / MILLISEC)) 31274462Salfred#define BRD_INSERT_RETRY_USEC (5 * MICROSEC) 313108087Sru#define BRD_REMOVE_TIMEOUT_USEC (2 * MICROSEC) 31474462Salfred#define BLINK_LED_TIMEOUT_USEC (300 * (MICROSEC / MILLISEC)) 31574462Salfred#define KEYSWITCH_TIMEOUT_USEC (1 * MICROSEC) 316108087Sru 317108087Sru#define PS_INSUFFICIENT_COUNTDOWN_SEC 30 31874462Salfred 31974462Salfred/* 32074462Salfred * how many ticks to wait to register the state change 32174462Salfred * NOTE: ticks are measured in PS_FAIL_TIMEOUT_USEC clicks 32274462Salfred */ 32374462Salfred#define PS_PRES_CHANGE_TICKS 1 32474462Salfred#define PS_FROM_BOOT_TICKS 1 32574462Salfred#define PS_FROM_UNKNOWN_TICKS 10 32674462Salfred#define PS_POWER_COUNTDOWN_TICKS 60 32774462Salfred 32874462Salfred/* Note: this timeout needs to be longer than FAN_OK_TIMEOUT_USEC */ 32974462Salfred#define PS_P_FAN_FROM_UNKNOWN_TICKS 15 33074462Salfred 33174462Salfred#define PS_FROM_OK_TICKS 1 33274462Salfred#define PS_PCH_FROM_OK_TICKS 3 33374462Salfred#define PS_FROM_FAIL_TICKS 4 33474462Salfred 33574462Salfred/* NOTE: these ticks are measured in PPS_FAN_TIMEOUT_USEC clicks */ 33674462Salfred#define PPS_FROM_FAIL_TICKS 7 33774462Salfred 33874462Salfred/* 33974462Salfred * how many spurious interrupts to take during a SPUR_LONG_TIMEOUT_USEC 34074462Salfred * before complaining 34174462Salfred */ 34274462Salfred#define MAX_SPUR_COUNT 2 34374462Salfred 34474462Salfred/* 34574462Salfred * Global driver structure which defines the presence and status of 34674462Salfred * all board power supplies. 34774462Salfred */ 34874462Salfredstruct ps_state { 34974462Salfred int pctr; /* tick counter for presense deglitch */ 35074462Salfred int dcctr; /* tick counter for dc ok deglitch */ 35174462Salfred enum e_pres_state pshadow; /* presense shadow state */ 35274462Salfred enum e_state dcshadow; /* dc ok shadow state */ 35374462Salfred}; 35474462Salfred 35574462Salfred/* 35674462Salfred * for sysctrl_thread_wakeup() 357108037Sru */ 35874462Salfred#define OVERTEMP_POLL 1 359108037Sru#define KEYSWITCH_POLL 2 36074462Salfred 36174462Salfred/* 36274462Salfred * Structures used in the driver to manage the hardware 36374462Salfred * XXX will need to add a nodeid 36474462Salfred */ 36574462Salfredstruct sysctrl_soft_state { 36674462Salfred dev_info_t *dip; /* dev info of myself */ 36774462Salfred dev_info_t *pdip; /* dev info of parent */ 36874462Salfred struct sysctrl_soft_state *next; 36974462Salfred int mondo; /* INO for this type of interrupt */ 37074462Salfred uchar_t nslots; /* slots in this system (0-16) */ 37174462Salfred 37274462Salfred pnode_t options_nodeid; /* for nvram powerfail-time */ 37374462Salfred 37474462Salfred ddi_iblock_cookie_t iblock; /* High level interrupt cookie */ 37574462Salfred ddi_idevice_cookie_t idevice; /* TODO - Do we need this? */ 37674462Salfred ddi_softintr_t spur_id; /* when we get a spurious int... */ 37774462Salfred ddi_iblock_cookie_t spur_int_c; /* spur int cookie */ 37874462Salfred ddi_softintr_t spur_high_id; /* when we reenable disabled ints */ 37974462Salfred ddi_softintr_t spur_long_to_id; /* long timeout softint */ 38074462Salfred ddi_softintr_t ac_fail_id; /* ac fail softintr id */ 38174462Salfred ddi_softintr_t ac_fail_high_id; /* ac fail re-enable softintr id */ 382108087Sru ddi_softintr_t ps_fail_int_id; /* ps fail from intr softintr id */ 38374462Salfred ddi_iblock_cookie_t ps_fail_c; /* ps fail softintr cookie */ 384108087Sru ddi_softintr_t ps_fail_poll_id; /* ps fail from polling softintr */ 38574462Salfred ddi_softintr_t pps_fan_id; /* pps fan fail softintr id */ 38674462Salfred ddi_softintr_t pps_fan_high_id; /* pps fan re-enable softintr id */ 38774462Salfred ddi_softintr_t sbrd_pres_id; /* sbrd softintr id */ 38874462Salfred ddi_softintr_t sbrd_gone_id; /* sbrd removed softintr id */ 38974462Salfred ddi_softintr_t blink_led_id; /* led blinker softint */ 39074462Salfred ddi_iblock_cookie_t sys_led_c; /* mutex cookie for sys LED lock */ 39174462Salfred 39274462Salfred volatile uchar_t *clk_freq1; /* Clock frequency reg. 1 */ 39374462Salfred volatile uchar_t *clk_freq2; /* Clock frequency reg. 2 */ 39474462Salfred volatile uchar_t *status1; /* System Status1 register */ 39574462Salfred volatile uchar_t *status2; /* System Status2 register */ 39674462Salfred volatile uchar_t *ps_stat; /* Power Supply Status register */ 39774462Salfred volatile uchar_t *ps_pres; /* Power Supply Presence register */ 39874462Salfred volatile uchar_t *pppsr; /* 2nd Power Supply Status register */ 39974462Salfred volatile uchar_t *temp_reg; /* VA of temperature register */ 40074462Salfred volatile uchar_t *rcons_ctl; /* VA of Remote console UART */ 40174462Salfred volatile uchar_t *clk_ver; /* clock version register */ 40274462Salfred 40374462Salfred /* This mutex protects the following data */ 404108087Sru /* NOTE: *csr should only be accessed from interrupt level */ 40574462Salfred kmutex_t csr_mutex; /* locking for csr enable bits */ 40674462Salfred volatile uchar_t *csr; /* System Control Register */ 407108087Sru uchar_t pps_fan_saved; /* cached pps fanfail state */ 408108087Sru uchar_t saved_en_state; /* spurious int cache */ 40974462Salfred int spur_count; /* count multiple spurious ints */ 41074462Salfred 41174462Salfred /* This mutex protects the following data */ 41274462Salfred kmutex_t spur_int_lock; /* lock spurious interrupt data */ 41374462Salfred timeout_id_t spur_timeout_id; /* quiet the int timeout id */ 41474462Salfred timeout_id_t spur_long_timeout_id; /* spurious long timeout interval */ 41574462Salfred 41674462Salfred /* This mutex protects the following data */ 41774462Salfred kmutex_t ps_fail_lock; /* low level lock */ 41874462Salfred struct ps_state ps_stats[SYS_PS_COUNT]; /* state struct for all ps */ 41974462Salfred enum power_state power_state; /* redundant power state */ 42074462Salfred int power_countdown; /* clicks until reboot */ 42174462Salfred 42274462Salfred /* This mutex protects the following data */ 42374462Salfred kmutex_t sys_led_lock; /* low level lock */ 42474462Salfred int sys_led; /* on (TRUE) or off (FALSE) */ 42574462Salfred int sys_fault; /* on (TRUE) or off (FALSE) */ 42674462Salfred 42774462Salfred /* various elements protected by their inherent access patterns */ 42874462Salfred int pps_fan_external_state; /* external state of the pps fans */ 42974462Salfred int pps_fan_state_count[SYS_PPS_FAN_COUNT]; /* fan state counter */ 43074462Salfred struct temp_stats tempstat; /* in memory storage of temperature */ 43174462Salfred enum keyswitch_state key_shadow; /* external state of the key switch */ 432108037Sru 43374462Salfred int enable_rcons_atboot; /* enable remote console at boot */ 434108037Sru}; 43574462Salfred 43674462Salfred/* 43774462Salfred * Kstat structures used to contain data which is requested by user 43874462Salfred * programs. 43974462Salfred */ 44074462Salfredstruct sysctrl_kstat { 44174462Salfred struct kstat_named csr; /* system control register */ 44274462Salfred struct kstat_named status1; /* system status 1 */ 44374462Salfred struct kstat_named status2; /* system status 2 */ 44474462Salfred struct kstat_named clk_freq2; /* Clock register 2 */ 44574462Salfred struct kstat_named fan_status; /* shadow status 2 for fans */ 44674462Salfred struct kstat_named key_status; /* shadow status for key */ 44774462Salfred struct kstat_named power_state; /* redundant power status */ 44874462Salfred struct kstat_named clk_ver; /* clock version register */ 44974462Salfred}; 45074462Salfred 45174462Salfred#define SYSC_ERR_SET(pkt, err) (pkt)->cmd_cfga.errtype = (err) 45274462Salfred 45374462Salfred/* 45499775Salfred * Function prototype 45599775Salfred */ 45699775Salfredint sysc_policy_disconnect(struct sysctrl_soft_state *, 45799775Salfred sysc_cfga_pkt_t *, sysc_cfga_stat_t *); 45899775Salfredint sysc_policy_connect(struct sysctrl_soft_state *, 459108087Sru sysc_cfga_pkt_t *, sysc_cfga_stat_t *); 46099775Salfredint sysc_policy_unconfigure(struct sysctrl_soft_state *, 46199775Salfred sysc_cfga_pkt_t *, sysc_cfga_stat_t *); 462120054Sruint sysc_policy_configure(struct sysctrl_soft_state *, 46399775Salfred sysc_cfga_pkt_t *, sysc_cfga_stat_t *); 46499775Salfred 46599775Salfredvoid sysc_policy_update(void *softsp, sysc_cfga_stat_t *sc, sysc_evt_t event); 46699775Salfred 46799775Salfredextern void sysctrl_suspend_prepare(void); 46874462Salfredextern int sysctrl_suspend(sysc_cfga_pkt_t *); 46974462Salfredextern void sysctrl_resume(sysc_cfga_pkt_t *); 47074462Salfred 47174462Salfred#endif /* _KERNEL */ 47274462Salfred#endif /* _ASM */ 47374462Salfred 47474462Salfred#ifdef __cplusplus 47574462Salfred} 47674462Salfred#endif 477108087Sru 47874462Salfred#endif /* _SYS_SYSCTRL_H */ 479108087Sru