px_msiq.h revision 10841:d3e4a10fc7d5
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#ifndef _SYS_PX_MSIQ_H 27#define _SYS_PX_MSIQ_H 28 29#ifdef __cplusplus 30extern "C" { 31#endif 32 33/* 34 * MSIQ data structure. 35 */ 36struct px_msiq { 37 msiqid_t msiq_id; /* MSIQ ID */ 38 ushort_t msiq_state; /* MSIQ alloc state */ 39 ushort_t msiq_refcnt; /* # of MSIQ users */ 40 msiqhead_t *msiq_base_p; /* MSIQ base pointer */ 41 42 /* Fields accessed under interrupt context */ 43 msiqhead_t msiq_curr_head_index; /* MSIQ Curr head index */ 44 msiqhead_t msiq_new_head_index; /* MSIQ new head index */ 45 ushort_t msiq_recs2process; /* # of MSIQ records to process */ 46}; 47 48#define MSIQ_STATE_FREE 0x1 49#define MSIQ_STATE_INUSE 0x2 50 51/* 52 * MSIQ soft state structure. 53 */ 54typedef struct px_msiq_state { 55 /* Available MSIQs */ 56 uint_t msiq_cnt; /* # of MSIQs */ 57 uint_t msiq_rec_cnt; /* # of records per MSIQ */ 58 msiqid_t msiq_1st_msiq_id; /* First MSIQ ID */ 59 devino_t msiq_1st_devino; /* First devino */ 60 boolean_t msiq_redist_flag; /* Flag to redist MSIQs */ 61 62 /* MSIQs specific reserved for MSI/Xs */ 63 uint_t msiq_msi_qcnt; /* # of MSIQs for MSI/Xs */ 64 msiqid_t msiq_1st_msi_qid; /* First MSIQ ID for MSI/Xs */ 65 66 /* MSIQs specific reserved for PCIe messages */ 67 uint_t msiq_msg_qcnt; /* # of MSIQs for PCIe msgs */ 68 msiqid_t msiq_1st_msg_qid; /* First MSIQ ID for PCIe msgs */ 69 70 px_msiq_t *msiq_p; /* Pointer to MSIQs array */ 71 void *msiq_buf_p; /* Pointer to MSIQs array */ 72 kmutex_t msiq_mutex; /* Mutex for MSIQ alloc/free */ 73} px_msiq_state_t; 74 75/* 76 * px_msi_eq_to_devino 77 */ 78typedef struct px_msi_eq_to_devino { 79 int msi_eq_no; 80 int no_msi_eqs; 81 int devino_no; 82} px_msi_eq_to_devino_t; 83 84/* 85 * Default MSIQ Configurations 86 */ 87#define PX_DEFAULT_MSIQ_CNT 36 88#define PX_DEFAULT_MSIQ_REC_CNT 128 89#define PX_DEFAULT_MSIQ_1ST_MSIQ_ID 0 90#define PX_DEFAULT_MSIQ_1ST_DEVINO 24 91 92extern int px_msiq_attach(px_t *px_p); 93extern void px_msiq_detach(px_t *px_p); 94extern void px_msiq_resume(px_t *px_p); 95 96extern int px_msiq_alloc(px_t *px_p, msiq_rec_type_t rec_type, 97 msgcode_t msg_code, msiqid_t *msiq_id_p); 98extern int px_msiq_alloc_based_on_cpuid(px_t *px_p, 99 msiq_rec_type_t rec_type, cpuid_t cpuid, 100 msiqid_t *msiq_id_p); 101extern int px_msiq_free(px_t *px_p, msiqid_t msiq_id); 102extern void px_msiq_redist(px_t *px_p); 103 104extern devino_t px_msiqid_to_devino(px_t *px_p, msiqid_t msiq_id); 105extern msiqid_t px_devino_to_msiqid(px_t *px_p, devino_t devino); 106 107#ifdef __cplusplus 108} 109#endif 110 111#endif /* _SYS_PX_MSIQ_H */ 112