pci_pci.c revision 9970:565d92d48652
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26/* 27 * PCI to PCI bus bridge nexus driver 28 */ 29 30#include <sys/conf.h> 31#include <sys/kmem.h> 32#include <sys/debug.h> 33#include <sys/modctl.h> 34#include <sys/autoconf.h> 35#include <sys/ddi_impldefs.h> 36#include <sys/pci.h> 37#include <sys/pcie_impl.h> 38#include <sys/ddi.h> 39#include <sys/sunddi.h> 40#include <sys/sunndi.h> 41#include <sys/ddifm.h> 42#include <sys/ndifm.h> 43#include <sys/fm/protocol.h> 44#include <sys/hotplug/pci/pcihp.h> 45#include <sys/pci_intr_lib.h> 46#include <sys/psm.h> 47#include <sys/pci_cap.h> 48 49/* 50 * The variable controls the default setting of the command register 51 * for pci devices. See ppb_initchild() for details. 52 */ 53static ushort_t ppb_command_default = PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO; 54 55 56static int ppb_bus_map(dev_info_t *, dev_info_t *, ddi_map_req_t *, 57 off_t, off_t, caddr_t *); 58static int ppb_ctlops(dev_info_t *, dev_info_t *, ddi_ctl_enum_t, 59 void *, void *); 60static int ppb_fm_init(dev_info_t *, dev_info_t *, int, 61 ddi_iblock_cookie_t *); 62static int ppb_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *); 63static int ppb_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t, 64 ddi_intr_handle_impl_t *, void *); 65 66/* 67 * ppb_support_msi: Flag that controls MSI support across P2P Bridges. 68 * By default, MSI is not supported except for special cases like HT 69 * bridges/tunnels that have HT MSI mapping enabled. 70 * 71 * However, MSI support behavior can be patched on a system by changing 72 * the value of this flag as shown below:- 73 * 0 = default value, MSI is allowed by this driver for special cases 74 * 1 = MSI supported without any checks for this driver 75 * -1 = MSI not supported at all 76 */ 77int ppb_support_msi = 0; 78 79/* 80 * Controls the usage of the Hypertransport MSI mapping capability 81 * 0 = default value, leave hardware function as it is 82 * 1 = always enable HT MSI mapping 83 * -1 = always disable HT MSI mapping 84 */ 85int ppb_support_ht_msimap = 0; 86 87struct bus_ops ppb_bus_ops = { 88 BUSO_REV, 89 ppb_bus_map, 90 0, 91 0, 92 0, 93 i_ddi_map_fault, 94 ddi_dma_map, 95 ddi_dma_allochdl, 96 ddi_dma_freehdl, 97 ddi_dma_bindhdl, 98 ddi_dma_unbindhdl, 99 ddi_dma_flush, 100 ddi_dma_win, 101 ddi_dma_mctl, 102 ppb_ctlops, 103 ddi_bus_prop_op, 104 0, /* (*bus_get_eventcookie)(); */ 105 0, /* (*bus_add_eventcall)(); */ 106 0, /* (*bus_remove_eventcall)(); */ 107 0, /* (*bus_post_event)(); */ 108 0, /* (*bus_intr_ctl)(); */ 109 0, /* (*bus_config)(); */ 110 0, /* (*bus_unconfig)(); */ 111 ppb_fm_init, /* (*bus_fm_init)(); */ 112 NULL, /* (*bus_fm_fini)(); */ 113 NULL, /* (*bus_fm_access_enter)(); */ 114 NULL, /* (*bus_fm_access_exit)(); */ 115 NULL, /* (*bus_power)(); */ 116 ppb_intr_ops /* (*bus_intr_op)(); */ 117}; 118 119/* 120 * The goal here is to leverage off of the pcihp.c source without making 121 * changes to it. Call into it's cb_ops directly if needed. 122 */ 123static int ppb_open(dev_t *, int, int, cred_t *); 124static int ppb_close(dev_t, int, int, cred_t *); 125static int ppb_ioctl(dev_t, int, intptr_t, int, cred_t *, int *); 126static int ppb_prop_op(dev_t, dev_info_t *, ddi_prop_op_t, int, char *, 127 caddr_t, int *); 128static int ppb_info(dev_info_t *, ddi_info_cmd_t, void *, void **); 129static void ppb_peekpoke_cb(dev_info_t *, ddi_fm_error_t *); 130 131struct cb_ops ppb_cb_ops = { 132 ppb_open, /* open */ 133 ppb_close, /* close */ 134 nodev, /* strategy */ 135 nodev, /* print */ 136 nodev, /* dump */ 137 nodev, /* read */ 138 nodev, /* write */ 139 ppb_ioctl, /* ioctl */ 140 nodev, /* devmap */ 141 nodev, /* mmap */ 142 nodev, /* segmap */ 143 nochpoll, /* poll */ 144 ppb_prop_op, /* cb_prop_op */ 145 NULL, /* streamtab */ 146 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 147 CB_REV, /* rev */ 148 nodev, /* int (*cb_aread)() */ 149 nodev /* int (*cb_awrite)() */ 150}; 151 152 153static int ppb_probe(dev_info_t *); 154static int ppb_attach(dev_info_t *devi, ddi_attach_cmd_t cmd); 155static int ppb_detach(dev_info_t *devi, ddi_detach_cmd_t cmd); 156 157struct dev_ops ppb_ops = { 158 DEVO_REV, /* devo_rev */ 159 0, /* refcnt */ 160 ppb_info, /* info */ 161 nulldev, /* identify */ 162 ppb_probe, /* probe */ 163 ppb_attach, /* attach */ 164 ppb_detach, /* detach */ 165 nulldev, /* reset */ 166 &ppb_cb_ops, /* driver operations */ 167 &ppb_bus_ops, /* bus operations */ 168 NULL, /* power */ 169 ddi_quiesce_not_needed, /* quiesce */ 170}; 171 172/* 173 * Module linkage information for the kernel. 174 */ 175 176static struct modldrv modldrv = { 177 &mod_driverops, /* Type of module */ 178 "PCI to PCI bridge nexus driver", 179 &ppb_ops, /* driver ops */ 180}; 181 182static struct modlinkage modlinkage = { 183 MODREV_1, 184 (void *)&modldrv, 185 NULL 186}; 187 188/* 189 * soft state pointer and structure template: 190 */ 191static void *ppb_state; 192 193typedef struct { 194 dev_info_t *dip; 195 int ppb_fmcap; 196 ddi_iblock_cookie_t ppb_fm_ibc; 197 kmutex_t ppb_peek_poke_mutex; 198 kmutex_t ppb_err_mutex; 199 200 /* 201 * cpr support: 202 */ 203 uint_t config_state_index; 204 struct { 205 dev_info_t *dip; 206 ushort_t command; 207 uchar_t cache_line_size; 208 uchar_t latency_timer; 209 uchar_t header_type; 210 uchar_t sec_latency_timer; 211 ushort_t bridge_control; 212 } config_state[PCI_MAX_CHILDREN]; 213 214 uint16_t parent_bus; 215} ppb_devstate_t; 216 217 218/* 219 * forward function declarations: 220 */ 221static void ppb_removechild(dev_info_t *); 222static int ppb_initchild(dev_info_t *child); 223static void ppb_save_config_regs(ppb_devstate_t *ppb_p); 224static void ppb_restore_config_regs(ppb_devstate_t *ppb_p); 225static boolean_t ppb_ht_msimap_check(ddi_acc_handle_t cfg_hdl); 226static int ppb_ht_msimap_set(ddi_acc_handle_t cfg_hdl, int cmd); 227 228/* 229 * for <cmd> in ppb_ht_msimap_set 230 */ 231#define HT_MSIMAP_ENABLE 1 232#define HT_MSIMAP_DISABLE 0 233 234 235int 236_init(void) 237{ 238 int e; 239 240 if ((e = ddi_soft_state_init(&ppb_state, sizeof (ppb_devstate_t), 241 1)) == 0 && (e = mod_install(&modlinkage)) != 0) 242 ddi_soft_state_fini(&ppb_state); 243 return (e); 244} 245 246int 247_fini(void) 248{ 249 int e; 250 251 if ((e = mod_remove(&modlinkage)) == 0) 252 ddi_soft_state_fini(&ppb_state); 253 return (e); 254} 255 256int 257_info(struct modinfo *modinfop) 258{ 259 return (mod_info(&modlinkage, modinfop)); 260} 261 262/*ARGSUSED*/ 263static int 264ppb_probe(dev_info_t *devi) 265{ 266 return (DDI_PROBE_SUCCESS); 267} 268 269/*ARGSUSED*/ 270static int 271ppb_attach(dev_info_t *devi, ddi_attach_cmd_t cmd) 272{ 273 dev_info_t *root = ddi_root_node(); 274 int instance; 275 ppb_devstate_t *ppb; 276 dev_info_t *pdip; 277 ddi_acc_handle_t config_handle; 278 char *bus; 279 280 switch (cmd) { 281 case DDI_ATTACH: 282 283 /* 284 * Make sure the "device_type" property exists. 285 */ 286 (void) ddi_prop_update_string(DDI_DEV_T_NONE, devi, 287 "device_type", "pci"); 288 289 /* 290 * Allocate and get soft state structure. 291 */ 292 instance = ddi_get_instance(devi); 293 if (ddi_soft_state_zalloc(ppb_state, instance) != DDI_SUCCESS) 294 return (DDI_FAILURE); 295 ppb = ddi_get_soft_state(ppb_state, instance); 296 ppb->dip = devi; 297 298 /* 299 * don't enable ereports if immediate child of npe 300 */ 301 if (strcmp(ddi_driver_name(ddi_get_parent(devi)), "npe") == 0) 302 ppb->ppb_fmcap = DDI_FM_ERRCB_CAPABLE | 303 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 304 else 305 ppb->ppb_fmcap = DDI_FM_EREPORT_CAPABLE | 306 DDI_FM_ERRCB_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 307 DDI_FM_DMACHK_CAPABLE; 308 309 ddi_fm_init(devi, &ppb->ppb_fmcap, &ppb->ppb_fm_ibc); 310 mutex_init(&ppb->ppb_err_mutex, NULL, MUTEX_DRIVER, 311 (void *)ppb->ppb_fm_ibc); 312 mutex_init(&ppb->ppb_peek_poke_mutex, NULL, MUTEX_DRIVER, 313 (void *)ppb->ppb_fm_ibc); 314 315 if (ppb->ppb_fmcap & (DDI_FM_ERRCB_CAPABLE | 316 DDI_FM_EREPORT_CAPABLE)) 317 pci_ereport_setup(devi); 318 if (ppb->ppb_fmcap & DDI_FM_ERRCB_CAPABLE) 319 ddi_fm_handler_register(devi, ppb_fm_callback, NULL); 320 321 if (pci_config_setup(devi, &config_handle) != DDI_SUCCESS) { 322 if (ppb->ppb_fmcap & DDI_FM_ERRCB_CAPABLE) 323 ddi_fm_handler_unregister(devi); 324 if (ppb->ppb_fmcap & (DDI_FM_ERRCB_CAPABLE | 325 DDI_FM_EREPORT_CAPABLE)) 326 pci_ereport_teardown(devi); 327 ddi_fm_fini(devi); 328 ddi_soft_state_free(ppb_state, instance); 329 return (DDI_FAILURE); 330 } 331 332 ppb->parent_bus = PCIE_PCIECAP_DEV_TYPE_PCI_PSEUDO; 333 for (pdip = ddi_get_parent(devi); pdip && (pdip != root) && 334 (ppb->parent_bus != PCIE_PCIECAP_DEV_TYPE_PCIE_DEV); 335 pdip = ddi_get_parent(pdip)) { 336 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, pdip, 337 DDI_PROP_DONTPASS, "device_type", &bus) != 338 DDI_PROP_SUCCESS) 339 break; 340 341 if (strcmp(bus, "pciex") == 0) 342 ppb->parent_bus = 343 PCIE_PCIECAP_DEV_TYPE_PCIE_DEV; 344 345 ddi_prop_free(bus); 346 } 347 348 if (ppb_support_ht_msimap == 1) 349 (void) ppb_ht_msimap_set(config_handle, 350 HT_MSIMAP_ENABLE); 351 else if (ppb_support_ht_msimap == -1) 352 (void) ppb_ht_msimap_set(config_handle, 353 HT_MSIMAP_DISABLE); 354 355 pci_config_teardown(&config_handle); 356 357 /* 358 * Initialize hotplug support on this bus. At minimum 359 * (for non hotplug bus) this would create ":devctl" minor 360 * node to support DEVCTL_DEVICE_* and DEVCTL_BUS_* ioctls 361 * to this bus. 362 */ 363 if (pcihp_init(devi) != DDI_SUCCESS) 364 cmn_err(CE_WARN, 365 "pci: Failed to setup hotplug framework"); 366 367 ddi_report_dev(devi); 368 return (DDI_SUCCESS); 369 370 case DDI_RESUME: 371 372 /* 373 * Get the soft state structure for the bridge. 374 */ 375 ppb = ddi_get_soft_state(ppb_state, ddi_get_instance(devi)); 376 ppb_restore_config_regs(ppb); 377 return (DDI_SUCCESS); 378 379 default: 380 break; 381 } 382 return (DDI_FAILURE); 383} 384 385/*ARGSUSED*/ 386static int 387ppb_detach(dev_info_t *devi, ddi_detach_cmd_t cmd) 388{ 389 ppb_devstate_t *ppb; 390 391 switch (cmd) { 392 case DDI_DETACH: 393 (void) ddi_prop_remove(DDI_DEV_T_NONE, devi, "device_type"); 394 395 ppb = ddi_get_soft_state(ppb_state, ddi_get_instance(devi)); 396 if (ppb->ppb_fmcap & DDI_FM_ERRCB_CAPABLE) 397 ddi_fm_handler_unregister(devi); 398 if (ppb->ppb_fmcap & (DDI_FM_ERRCB_CAPABLE | 399 DDI_FM_EREPORT_CAPABLE)) 400 pci_ereport_teardown(devi); 401 mutex_destroy(&ppb->ppb_peek_poke_mutex); 402 mutex_destroy(&ppb->ppb_err_mutex); 403 ddi_fm_fini(devi); 404 405 /* 406 * And finally free the per-pci soft state. 407 */ 408 ddi_soft_state_free(ppb_state, ddi_get_instance(devi)); 409 410 /* 411 * Uninitialize hotplug support on this bus. 412 */ 413 (void) pcihp_uninit(devi); 414 return (DDI_SUCCESS); 415 416 case DDI_SUSPEND: 417 ppb = ddi_get_soft_state(ppb_state, ddi_get_instance(devi)); 418 ppb_save_config_regs(ppb); 419 return (DDI_SUCCESS); 420 421 default: 422 break; 423 } 424 return (DDI_FAILURE); 425} 426 427/*ARGSUSED*/ 428static int 429ppb_bus_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 430 off_t offset, off_t len, caddr_t *vaddrp) 431{ 432 dev_info_t *pdip; 433 434 pdip = (dev_info_t *)DEVI(dip)->devi_parent; 435 return ((DEVI(pdip)->devi_ops->devo_bus_ops->bus_map)(pdip, 436 rdip, mp, offset, len, vaddrp)); 437} 438 439/*ARGSUSED*/ 440static int 441ppb_ctlops(dev_info_t *dip, dev_info_t *rdip, 442 ddi_ctl_enum_t ctlop, void *arg, void *result) 443{ 444 pci_regspec_t *drv_regp; 445 int reglen; 446 int rn; 447 int totreg; 448 ppb_devstate_t *ppb = ddi_get_soft_state(ppb_state, 449 ddi_get_instance(dip)); 450 struct detachspec *dsp; 451 struct attachspec *asp; 452 453 switch (ctlop) { 454 case DDI_CTLOPS_REPORTDEV: 455 if (rdip == (dev_info_t *)0) 456 return (DDI_FAILURE); 457 cmn_err(CE_CONT, "?PCI-device: %s@%s, %s%d\n", 458 ddi_node_name(rdip), ddi_get_name_addr(rdip), 459 ddi_driver_name(rdip), 460 ddi_get_instance(rdip)); 461 return (DDI_SUCCESS); 462 463 case DDI_CTLOPS_INITCHILD: 464 return (ppb_initchild((dev_info_t *)arg)); 465 466 case DDI_CTLOPS_UNINITCHILD: 467 ppb_removechild((dev_info_t *)arg); 468 return (DDI_SUCCESS); 469 470 case DDI_CTLOPS_SIDDEV: 471 return (DDI_SUCCESS); 472 473 case DDI_CTLOPS_REGSIZE: 474 case DDI_CTLOPS_NREGS: 475 if (rdip == (dev_info_t *)0) 476 return (DDI_FAILURE); 477 break; 478 479 /* X86 systems support PME wakeup from suspend */ 480 case DDI_CTLOPS_ATTACH: 481 if (!pcie_is_child(dip, rdip)) 482 return (DDI_SUCCESS); 483 484 asp = (struct attachspec *)arg; 485 if ((ppb->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV) && 486 (asp->when == DDI_POST) && (asp->result == DDI_SUCCESS)) 487 pf_init(rdip, (void *)ppb->ppb_fm_ibc, asp->cmd); 488 489 if (asp->cmd == DDI_RESUME && asp->when == DDI_PRE) 490 if (pci_pre_resume(rdip) != DDI_SUCCESS) 491 return (DDI_FAILURE); 492 493 return (DDI_SUCCESS); 494 495 case DDI_CTLOPS_DETACH: 496 if (!pcie_is_child(dip, rdip)) 497 return (DDI_SUCCESS); 498 499 dsp = (struct detachspec *)arg; 500 if ((ppb->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV) && 501 (dsp->when == DDI_PRE)) 502 pf_fini(rdip, dsp->cmd); 503 504 if (dsp->cmd == DDI_SUSPEND && dsp->when == DDI_POST) 505 if (pci_post_suspend(rdip) != DDI_SUCCESS) 506 return (DDI_FAILURE); 507 508 return (DDI_SUCCESS); 509 510 case DDI_CTLOPS_PEEK: 511 case DDI_CTLOPS_POKE: 512 if (strcmp(ddi_driver_name(ddi_get_parent(dip)), "npe") != 0) 513 return (ddi_ctlops(dip, rdip, ctlop, arg, result)); 514 return (pci_peekpoke_check(dip, rdip, ctlop, arg, result, 515 ddi_ctlops, &ppb->ppb_err_mutex, 516 &ppb->ppb_peek_poke_mutex, ppb_peekpoke_cb)); 517 518 default: 519 return (ddi_ctlops(dip, rdip, ctlop, arg, result)); 520 } 521 522 *(int *)result = 0; 523 if (ddi_getlongprop(DDI_DEV_T_ANY, rdip, 524 DDI_PROP_DONTPASS | DDI_PROP_CANSLEEP, "reg", 525 (caddr_t)&drv_regp, ®len) != DDI_SUCCESS) 526 return (DDI_FAILURE); 527 528 totreg = reglen / sizeof (pci_regspec_t); 529 if (ctlop == DDI_CTLOPS_NREGS) 530 *(int *)result = totreg; 531 else if (ctlop == DDI_CTLOPS_REGSIZE) { 532 rn = *(int *)arg; 533 if (rn >= totreg) { 534 kmem_free(drv_regp, reglen); 535 return (DDI_FAILURE); 536 } 537 *(off_t *)result = drv_regp[rn].pci_size_low; 538 } 539 540 kmem_free(drv_regp, reglen); 541 return (DDI_SUCCESS); 542} 543 544static int 545ppb_name_child(dev_info_t *child, char *name, int namelen) 546{ 547 pci_regspec_t *pci_rp; 548 uint_t slot, func; 549 char **unit_addr; 550 uint_t n; 551 552 /* 553 * For .conf nodes, use unit-address property as name 554 */ 555 if (ndi_dev_is_persistent_node(child) == 0) { 556 if (ddi_prop_lookup_string_array(DDI_DEV_T_ANY, child, 557 DDI_PROP_DONTPASS, "unit-address", &unit_addr, &n) != 558 DDI_PROP_SUCCESS) { 559 cmn_err(CE_WARN, 560 "cannot find unit-address in %s.conf", 561 ddi_driver_name(child)); 562 return (DDI_FAILURE); 563 } 564 if (n != 1 || *unit_addr == NULL || **unit_addr == 0) { 565 cmn_err(CE_WARN, "unit-address property in %s.conf" 566 " not well-formed", ddi_driver_name(child)); 567 ddi_prop_free(unit_addr); 568 return (DDI_SUCCESS); 569 } 570 (void) snprintf(name, namelen, "%s", *unit_addr); 571 ddi_prop_free(unit_addr); 572 return (DDI_SUCCESS); 573 } 574 575 /* get child "reg" property */ 576 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, child, 577 DDI_PROP_DONTPASS, "reg", (int **)&pci_rp, &n) != DDI_SUCCESS) { 578 return (DDI_FAILURE); 579 } 580 581 /* copy the device identifications */ 582 slot = PCI_REG_DEV_G(pci_rp->pci_phys_hi); 583 func = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); 584 585 if (func != 0) 586 (void) snprintf(name, namelen, "%x,%x", slot, func); 587 else 588 (void) snprintf(name, namelen, "%x", slot); 589 590 ddi_prop_free(pci_rp); 591 return (DDI_SUCCESS); 592} 593 594static int 595ppb_initchild(dev_info_t *child) 596{ 597 struct ddi_parent_private_data *pdptr; 598 ppb_devstate_t *ppb; 599 char name[MAXNAMELEN]; 600 ddi_acc_handle_t config_handle; 601 ushort_t command_preserve, command; 602 603 ppb = (ppb_devstate_t *)ddi_get_soft_state(ppb_state, 604 ddi_get_instance(ddi_get_parent(child))); 605 606 if (ppb_name_child(child, name, MAXNAMELEN) != DDI_SUCCESS) 607 return (DDI_FAILURE); 608 ddi_set_name_addr(child, name); 609 610 /* 611 * Pseudo nodes indicate a prototype node with per-instance 612 * properties to be merged into the real h/w device node. 613 * The interpretation of the unit-address is DD[,F] 614 * where DD is the device id and F is the function. 615 */ 616 if (ndi_dev_is_persistent_node(child) == 0) { 617 extern int pci_allow_pseudo_children; 618 619 ddi_set_parent_data(child, NULL); 620 621 /* 622 * Try to merge the properties from this prototype 623 * node into real h/w nodes. 624 */ 625 if (ndi_merge_node(child, ppb_name_child) == DDI_SUCCESS) { 626 /* 627 * Merged ok - return failure to remove the node. 628 */ 629 ddi_set_name_addr(child, NULL); 630 return (DDI_FAILURE); 631 } 632 633 /* workaround for ddivs to run under PCI */ 634 if (pci_allow_pseudo_children) 635 return (DDI_SUCCESS); 636 637 /* 638 * The child was not merged into a h/w node, 639 * but there's not much we can do with it other 640 * than return failure to cause the node to be removed. 641 */ 642 cmn_err(CE_WARN, "!%s@%s: %s.conf properties not merged", 643 ddi_driver_name(child), ddi_get_name_addr(child), 644 ddi_driver_name(child)); 645 ddi_set_name_addr(child, NULL); 646 return (DDI_NOT_WELL_FORMED); 647 } 648 649 ddi_set_parent_data(child, NULL); 650 651 /* 652 * PCIe FMA specific 653 * 654 * Note: parent_data for parent is created only if this is PCI-E 655 * platform, for which, SG take a different route to handle device 656 * errors. 657 */ 658 if (ppb->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV) { 659 if (pcie_init_bus(child) == NULL) 660 return (DDI_FAILURE); 661 } 662 663 /* transfer select properties from PROM to kernel */ 664 if (ddi_getprop(DDI_DEV_T_NONE, child, DDI_PROP_DONTPASS, 665 "interrupts", -1) != -1) { 666 pdptr = kmem_zalloc((sizeof (struct ddi_parent_private_data) + 667 sizeof (struct intrspec)), KM_SLEEP); 668 pdptr->par_intr = (struct intrspec *)(pdptr + 1); 669 pdptr->par_nintr = 1; 670 ddi_set_parent_data(child, pdptr); 671 } else 672 ddi_set_parent_data(child, NULL); 673 674 if (pci_config_setup(child, &config_handle) != DDI_SUCCESS) 675 return (DDI_FAILURE); 676 677 /* 678 * Support for the "command-preserve" property. 679 */ 680 command_preserve = ddi_prop_get_int(DDI_DEV_T_ANY, child, 681 DDI_PROP_DONTPASS, "command-preserve", 0); 682 command = pci_config_get16(config_handle, PCI_CONF_COMM); 683 command &= (command_preserve | PCI_COMM_BACK2BACK_ENAB); 684 command |= (ppb_command_default & ~command_preserve); 685 pci_config_put16(config_handle, PCI_CONF_COMM, command); 686 687 pci_config_teardown(&config_handle); 688 return (DDI_SUCCESS); 689} 690 691static void 692ppb_removechild(dev_info_t *dip) 693{ 694 struct ddi_parent_private_data *pdptr; 695 ppb_devstate_t *ppb; 696 697 ppb = (ppb_devstate_t *)ddi_get_soft_state(ppb_state, 698 ddi_get_instance(ddi_get_parent(dip))); 699 700 if (ppb->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV) 701 pcie_fini_bus(dip); 702 else if ((pdptr = ddi_get_parent_data(dip)) != NULL) { 703 kmem_free(pdptr, (sizeof (*pdptr) + sizeof (struct intrspec))); 704 ddi_set_parent_data(dip, NULL); 705 } 706 ddi_set_name_addr(dip, NULL); 707 708 /* 709 * Strip the node to properly convert it back to prototype form 710 */ 711 ddi_remove_minor_node(dip, NULL); 712 713 impl_rem_dev_props(dip); 714} 715 716/* 717 * ppb_save_config_regs 718 * 719 * This routine saves the state of the configuration registers of all 720 * the child nodes of each PBM. 721 * 722 * used by: ppb_detach() on suspends 723 * 724 * return value: none 725 */ 726static void 727ppb_save_config_regs(ppb_devstate_t *ppb_p) 728{ 729 int i; 730 dev_info_t *dip; 731 ddi_acc_handle_t config_handle; 732 733 for (i = 0, dip = ddi_get_child(ppb_p->dip); dip != NULL; 734 i++, dip = ddi_get_next_sibling(dip)) { 735 736 if (pci_config_setup(dip, &config_handle) != DDI_SUCCESS) { 737 cmn_err(CE_WARN, "%s%d: can't config space for %s%d\n", 738 ddi_driver_name(ppb_p->dip), 739 ddi_get_instance(ppb_p->dip), 740 ddi_driver_name(dip), 741 ddi_get_instance(dip)); 742 continue; 743 } 744 745 ppb_p->config_state[i].dip = dip; 746 ppb_p->config_state[i].command = 747 pci_config_get16(config_handle, PCI_CONF_COMM); 748 pci_config_teardown(&config_handle); 749 } 750 ppb_p->config_state_index = i; 751} 752 753 754/* 755 * ppb_restore_config_regs 756 * 757 * This routine restores the state of the configuration registers of all 758 * the child nodes of each PBM. 759 * 760 * used by: ppb_attach() on resume 761 * 762 * return value: none 763 */ 764static void 765ppb_restore_config_regs(ppb_devstate_t *ppb_p) 766{ 767 int i; 768 dev_info_t *dip; 769 ddi_acc_handle_t config_handle; 770 771 for (i = 0; i < ppb_p->config_state_index; i++) { 772 dip = ppb_p->config_state[i].dip; 773 if (pci_config_setup(dip, &config_handle) != DDI_SUCCESS) { 774 cmn_err(CE_WARN, "%s%d: can't config space for %s%d\n", 775 ddi_driver_name(ppb_p->dip), 776 ddi_get_instance(ppb_p->dip), 777 ddi_driver_name(dip), 778 ddi_get_instance(dip)); 779 continue; 780 } 781 pci_config_put16(config_handle, PCI_CONF_COMM, 782 ppb_p->config_state[i].command); 783 pci_config_teardown(&config_handle); 784 } 785} 786 787 788static boolean_t 789ppb_ht_msimap_check(ddi_acc_handle_t cfg_hdl) 790{ 791 uint16_t ptr; 792 793 if (pci_htcap_locate(cfg_hdl, 794 PCI_HTCAP_TYPE_MASK | PCI_HTCAP_MSIMAP_ENABLE_MASK, 795 PCI_HTCAP_MSIMAP_TYPE | PCI_HTCAP_MSIMAP_ENABLE, &ptr) != 796 DDI_SUCCESS) 797 return (B_FALSE); 798 799 return (B_TRUE); 800} 801 802 803static int 804ppb_ht_msimap_set(ddi_acc_handle_t cfg_hdl, int cmd) 805{ 806 uint16_t ptr; 807 uint16_t reg; 808 809 if (pci_htcap_locate(cfg_hdl, PCI_HTCAP_TYPE_MASK, 810 PCI_HTCAP_MSIMAP_TYPE, &ptr) != DDI_SUCCESS) 811 return (0); 812 813 reg = pci_config_get16(cfg_hdl, ptr + PCI_CAP_ID_REGS_OFF); 814 switch (cmd) { 815 case HT_MSIMAP_ENABLE: 816 reg |= PCI_HTCAP_MSIMAP_ENABLE; 817 break; 818 case HT_MSIMAP_DISABLE: 819 default: 820 reg &= ~(uint16_t)PCI_HTCAP_MSIMAP_ENABLE; 821 } 822 823 pci_config_put16(cfg_hdl, ptr + PCI_CAP_ID_REGS_OFF, reg); 824 return (1); 825} 826 827 828/* 829 * intercept certain interrupt services to handle special cases 830 */ 831static int 832ppb_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 833 ddi_intr_handle_impl_t *hdlp, void *result) 834{ 835 ddi_acc_handle_t cfg_hdl; 836 int rv = DDI_SUCCESS; 837 838 if (intr_op != DDI_INTROP_SUPPORTED_TYPES) 839 return (i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result)); 840 841 DDI_INTR_NEXDBG((CE_CONT, 842 "ppb_intr_ops: pdip 0x%p, rdip 0x%p, op %x handle 0x%p\n", 843 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 844 845 /* Fixed interrupt is supported by default */ 846 *(int *)result = DDI_INTR_TYPE_FIXED; 847 848 if (ppb_support_msi == -1) { 849 DDI_INTR_NEXDBG((CE_CONT, 850 "ppb_intr_ops: MSI is not allowed\n")); 851 goto OUT; 852 } 853 854 if (ppb_support_msi == 1) { 855 DDI_INTR_NEXDBG((CE_CONT, 856 "ppb_intr_ops: MSI is always allowed\n")); 857 rv = i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result); 858 goto OUT; 859 } 860 861 if (pci_config_setup(pdip, &cfg_hdl) != DDI_SUCCESS) { 862 DDI_INTR_NEXDBG((CE_CONT, 863 "ppb_intr_ops: pci_config_setup() failed\n")); 864 goto OUT; 865 } 866 867 /* 868 * check for hypertransport msi mapping capability 869 */ 870 if (ppb_ht_msimap_check(cfg_hdl)) { 871 DDI_INTR_NEXDBG((CE_CONT, 872 "ppb_intr_ops: HT MSI mapping enabled\n")); 873 rv = i_ddi_intr_ops(pdip, rdip, intr_op, hdlp, result); 874 } 875 876 /* 877 * if we add failure conditions after pci_config_setup, move this to 878 * OUT and use an extra flag to indicate the need to teardown cfg_hdl 879 */ 880 pci_config_teardown(&cfg_hdl); 881 882OUT: 883 DDI_INTR_NEXDBG((CE_CONT, 884 "ppb_intr_ops: rdip 0x%p, returns supported types: 0x%x\n", 885 (void *)rdip, *(int *)result)); 886 return (rv); 887} 888 889static int 890ppb_open(dev_t *devp, int flags, int otyp, cred_t *credp) 891{ 892 return ((pcihp_get_cb_ops())->cb_open(devp, flags, otyp, credp)); 893} 894 895static int 896ppb_close(dev_t dev, int flags, int otyp, cred_t *credp) 897{ 898 return ((pcihp_get_cb_ops())->cb_close(dev, flags, otyp, credp)); 899} 900 901static int 902ppb_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 903{ 904 return ((pcihp_get_cb_ops())->cb_ioctl(dev, cmd, arg, mode, credp, 905 rvalp)); 906} 907 908static int 909ppb_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 910 int flags, char *name, caddr_t valuep, int *lengthp) 911{ 912 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, prop_op, flags, 913 name, valuep, lengthp)); 914} 915 916static int 917ppb_info(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **result) 918{ 919 return (pcihp_info(dip, cmd, arg, result)); 920} 921 922void ppb_peekpoke_cb(dev_info_t *dip, ddi_fm_error_t *derr) { 923 (void) pci_ereport_post(dip, derr, NULL); 924} 925 926/*ARGSUSED*/ 927static int 928ppb_fm_init(dev_info_t *dip, dev_info_t *tdip, int cap, 929 ddi_iblock_cookie_t *ibc) 930{ 931 ppb_devstate_t *ppb = ddi_get_soft_state(ppb_state, 932 ddi_get_instance(dip)); 933 934 ASSERT(ibc != NULL); 935 *ibc = ppb->ppb_fm_ibc; 936 937 return (ppb->ppb_fmcap); 938} 939 940/*ARGSUSED*/ 941static int 942ppb_fm_callback(dev_info_t *dip, ddi_fm_error_t *derr, const void *no_used) 943{ 944 ppb_devstate_t *ppb = ddi_get_soft_state(ppb_state, 945 ddi_get_instance(dip)); 946 947 mutex_enter(&ppb->ppb_err_mutex); 948 pci_ereport_post(dip, derr, NULL); 949 mutex_exit(&ppb->ppb_err_mutex); 950 return (derr->fme_status); 951} 952