mpi2.h revision 9907:98086c85a8f7
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright (c) 2000 to 2009, LSI Corporation. 24 * All rights reserved. 25 * 26 * Redistribution and use in source and binary forms of all code within 27 * this file that is exclusively owned by LSI, with or without 28 * modification, is permitted provided that, in addition to the CDDL 1.0 29 * License requirements, the following conditions are met: 30 * 31 * Neither the name of the author nor the names of its contributors may be 32 * used to endorse or promote products derived from this software without 33 * specific prior written permission. 34 * 35 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 36 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 37 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 38 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 39 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 41 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 42 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 43 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 44 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 45 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 46 * DAMAGE. 47 */ 48 49/* 50 * Name: mpi2.h 51 * Title: MPI Message independent structures and definitions 52 * including System Interface Register Set and 53 * scatter/gather formats. 54 * Creation Date: June 21, 2006 55 * 56 * mpi2.h Version: 02.00.11 57 * 58 * Version History 59 * --------------- 60 * 61 * Date Version Description 62 * -------- -------- ------------------------------------------------------ 63 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 64 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. 65 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. 66 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. 67 * Moved ReplyPostHostIndex register to offset 0x6C of the 68 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for 69 * MPI2_REPLY_POST_HOST_INDEX_OFFSET. 70 * Added union of request descriptors. 71 * Added union of reply descriptors. 72 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. 73 * Added define for MPI2_VERSION_02_00. 74 * Fixed the size of the FunctionDependent5 field in the 75 * MPI2_DEFAULT_REPLY structure. 76 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. 77 * Removed the MPI-defined Fault Codes and extended the 78 * product specific codes up to 0xEFFF. 79 * Added a sixth key value for the WriteSequence register 80 * and changed the flush value to 0x0. 81 * Added message function codes for Diagnostic Buffer Post 82 * and Diagnsotic Release. 83 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED 84 * Moved MPI2_VERSION_UNION from mpi2_ioc.h. 85 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. 86 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. 87 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. 88 * Added #defines for marking a reply descriptor as unused. 89 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. 90 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. 91 * Moved LUN field defines from mpi2_init.h. 92 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. 93 * -------------------------------------------------------------------------- 94 */ 95 96#ifndef MPI2_H 97#define MPI2_H 98 99 100/***************************************************************************** 101* 102* MPI Version Definitions 103* 104*****************************************************************************/ 105 106#define MPI2_VERSION_MAJOR (0x02) 107#define MPI2_VERSION_MINOR (0x00) 108#define MPI2_VERSION_MAJOR_MASK (0xFF00) 109#define MPI2_VERSION_MAJOR_SHIFT (8) 110#define MPI2_VERSION_MINOR_MASK (0x00FF) 111#define MPI2_VERSION_MINOR_SHIFT (0) 112#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ 113 MPI2_VERSION_MINOR) 114 115#define MPI2_VERSION_02_00 (0x0200) 116 117/* versioning for this MPI header set */ 118#define MPI2_HEADER_VERSION_UNIT (0x0B) 119#define MPI2_HEADER_VERSION_DEV (0x00) 120#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) 121#define MPI2_HEADER_VERSION_UNIT_SHIFT (8) 122#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) 123#define MPI2_HEADER_VERSION_DEV_SHIFT (0) 124#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) 125 126 127/***************************************************************************** 128* 129* IOC State Definitions 130* 131*****************************************************************************/ 132 133#define MPI2_IOC_STATE_RESET (0x00000000) 134#define MPI2_IOC_STATE_READY (0x10000000) 135#define MPI2_IOC_STATE_OPERATIONAL (0x20000000) 136#define MPI2_IOC_STATE_FAULT (0x40000000) 137 138#define MPI2_IOC_STATE_MASK (0xF0000000) 139#define MPI2_IOC_STATE_SHIFT (28) 140 141/* Fault state range for prodcut specific codes */ 142#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000) 143#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF) 144 145 146/***************************************************************************** 147* 148* System Interface Register Definitions 149* 150*****************************************************************************/ 151 152typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS 153{ 154 U32 Doorbell; /* 0x00 */ 155 U32 WriteSequence; /* 0x04 */ 156 U32 HostDiagnostic; /* 0x08 */ 157 U32 Reserved1; /* 0x0C */ 158 U32 DiagRWData; /* 0x10 */ 159 U32 DiagRWAddressLow; /* 0x14 */ 160 U32 DiagRWAddressHigh; /* 0x18 */ 161 U32 Reserved2[5]; /* 0x1C */ 162 U32 HostInterruptStatus; /* 0x30 */ 163 U32 HostInterruptMask; /* 0x34 */ 164 U32 DCRData; /* 0x38 */ 165 U32 DCRAddress; /* 0x3C */ 166 U32 Reserved3[2]; /* 0x40 */ 167 U32 ReplyFreeHostIndex; /* 0x48 */ 168 U32 Reserved4[8]; /* 0x4C */ 169 U32 ReplyPostHostIndex; /* 0x6C */ 170 U32 Reserved5; /* 0x70 */ 171 U32 HCBSize; /* 0x74 */ 172 U32 HCBAddressLow; /* 0x78 */ 173 U32 HCBAddressHigh; /* 0x7C */ 174 U32 Reserved6[16]; /* 0x80 */ 175 U32 RequestDescriptorPostLow; /* 0xC0 */ 176 U32 RequestDescriptorPostHigh; /* 0xC4 */ 177 U32 Reserved7[14]; /* 0xC8 */ 178} MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, 179 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; 180 181/* 182 * Defines for working with the Doorbell register. 183 */ 184#define MPI2_DOORBELL_OFFSET (0x00000000) 185 186/* IOC --> System values */ 187#define MPI2_DOORBELL_USED (0x08000000) 188#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000) 189#define MPI2_DOORBELL_WHO_INIT_SHIFT (24) 190#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF) 191#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF) 192 193/* System --> IOC values */ 194#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000) 195#define MPI2_DOORBELL_FUNCTION_SHIFT (24) 196#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) 197#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16) 198 199 200/* 201 * Defines for the WriteSequence register 202 */ 203#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004) 204#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F) 205#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0) 206#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF) 207#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4) 208#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB) 209#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2) 210#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7) 211#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD) 212 213/* 214 * Defines for the HostDiagnostic register 215 */ 216#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008) 217 218#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800) 219#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000) 220#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800) 221 222#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) 223#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200) 224#define MPI2_DIAG_HCB_MODE (0x00000100) 225#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080) 226#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040) 227#define MPI2_DIAG_RESET_HISTORY (0x00000020) 228#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010) 229#define MPI2_DIAG_RESET_ADAPTER (0x00000004) 230#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002) 231 232/* 233 * Offsets for DiagRWData and address 234 */ 235#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010) 236#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014) 237#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018) 238 239/* 240 * Defines for the HostInterruptStatus register 241 */ 242#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) 243#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000) 244#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS 245#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000) 246#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008) 247#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001) 248#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS 249 250/* 251 * Defines for the HostInterruptMask register 252 */ 253#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034) 254#define MPI2_HIM_RESET_IRQ_MASK (0x40000000) 255#define MPI2_HIM_REPLY_INT_MASK (0x00000008) 256#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK 257#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001) 258#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK 259 260/* 261 * Offsets for DCRData and address 262 */ 263#define MPI2_DCR_DATA_OFFSET (0x00000038) 264#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C) 265 266/* 267 * Offset for the Reply Free Queue 268 */ 269#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) 270 271/* 272 * Offset for the Reply Descriptor Post Queue 273 */ 274#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) 275 276/* 277 * Defines for the HCBSize and address 278 */ 279#define MPI2_HCB_SIZE_OFFSET (0x00000074) 280#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000) 281#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001) 282 283#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078) 284#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C) 285 286/* 287 * Offsets for the Request Queue 288 */ 289#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) 290#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) 291 292 293/***************************************************************************** 294* 295* Message Descriptors 296* 297*****************************************************************************/ 298 299/* Request Descriptors */ 300 301/* Default Request Descriptor */ 302typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR 303{ 304 U8 RequestFlags; /* 0x00 */ 305 U8 VF_ID; /* 0x01 */ 306 U16 SMID; /* 0x02 */ 307 U16 LMID; /* 0x04 */ 308 U16 DescriptorTypeDependent; /* 0x06 */ 309} MPI2_DEFAULT_REQUEST_DESCRIPTOR, 310 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, 311 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; 312 313/* defines for the RequestFlags field */ 314#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E) 315#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) 316#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) 317#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) 318#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) 319 320#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) 321 322 323/* High Priority Request Descriptor */ 324typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR 325{ 326 U8 RequestFlags; /* 0x00 */ 327 U8 VF_ID; /* 0x01 */ 328 U16 SMID; /* 0x02 */ 329 U16 LMID; /* 0x04 */ 330 U16 Reserved1; /* 0x06 */ 331} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 332 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 333 Mpi2HighPriorityRequestDescriptor_t, 334 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; 335 336 337/* SCSI IO Request Descriptor */ 338typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR 339{ 340 U8 RequestFlags; /* 0x00 */ 341 U8 VF_ID; /* 0x01 */ 342 U16 SMID; /* 0x02 */ 343 U16 LMID; /* 0x04 */ 344 U16 DevHandle; /* 0x06 */ 345} MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 346 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 347 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; 348 349 350/* SCSI Target Request Descriptor */ 351typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR 352{ 353 U8 RequestFlags; /* 0x00 */ 354 U8 VF_ID; /* 0x01 */ 355 U16 SMID; /* 0x02 */ 356 U16 LMID; /* 0x04 */ 357 U16 IoIndex; /* 0x06 */ 358} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 359 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 360 Mpi2SCSITargetRequestDescriptor_t, 361 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; 362 363/* union of Request Descriptors */ 364typedef union _MPI2_REQUEST_DESCRIPTOR_UNION 365{ 366 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; 367 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; 368 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; 369 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; 370 U64 Words; 371} MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, 372 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; 373 374 375/* Reply Descriptors */ 376 377/* Default Reply Descriptor */ 378typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR 379{ 380 U8 ReplyFlags; /* 0x00 */ 381 U8 VF_ID; /* 0x01 */ 382 U16 DescriptorTypeDependent1; /* 0x02 */ 383 U32 DescriptorTypeDependent2; /* 0x04 */ 384} MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, 385 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; 386 387/* defines for the ReplyFlags field */ 388#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F) 389#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) 390#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) 391#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) 392#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) 393#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) 394 395/* values for marking a reply descriptor as unused */ 396#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) 397#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF) 398 399/* Address Reply Descriptor */ 400typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR 401{ 402 U8 ReplyFlags; /* 0x00 */ 403 U8 VF_ID; /* 0x01 */ 404 U16 SMID; /* 0x02 */ 405 U32 ReplyFrameAddress; /* 0x04 */ 406} MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, 407 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; 408 409#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00) 410 411 412/* SCSI IO Success Reply Descriptor */ 413typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR 414{ 415 U8 ReplyFlags; /* 0x00 */ 416 U8 VF_ID; /* 0x01 */ 417 U16 SMID; /* 0x02 */ 418 U16 TaskTag; /* 0x04 */ 419 U16 DevHandle; /* 0x06 */ 420} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 421 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 422 Mpi2SCSIIOSuccessReplyDescriptor_t, 423 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; 424 425 426/* TargetAssist Success Reply Descriptor */ 427typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR 428{ 429 U8 ReplyFlags; /* 0x00 */ 430 U8 VF_ID; /* 0x01 */ 431 U16 SMID; /* 0x02 */ 432 U8 SequenceNumber; /* 0x04 */ 433 U8 Reserved1; /* 0x05 */ 434 U16 IoIndex; /* 0x06 */ 435} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 436 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 437 Mpi2TargetAssistSuccessReplyDescriptor_t, 438 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; 439 440 441/* Target Command Buffer Reply Descriptor */ 442typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR 443{ 444 U8 ReplyFlags; /* 0x00 */ 445 U8 VF_ID; /* 0x01 */ 446 U8 VP_ID; /* 0x02 */ 447 U8 Flags; /* 0x03 */ 448 U16 InitiatorDevHandle; /* 0x04 */ 449 U16 IoIndex; /* 0x06 */ 450} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 451 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 452 Mpi2TargetCommandBufferReplyDescriptor_t, 453 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; 454 455/* defines for Flags field */ 456#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F) 457 458 459/* union of Reply Descriptors */ 460typedef union _MPI2_REPLY_DESCRIPTORS_UNION 461{ 462 MPI2_DEFAULT_REPLY_DESCRIPTOR Default; 463 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; 464 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; 465 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; 466 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; 467 U64 Words; 468} MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, 469 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; 470 471 472 473/***************************************************************************** 474* 475* Message Functions 476* 0x80 -> 0x8F reserved for private message use per product 477* 478* 479*****************************************************************************/ 480 481#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */ 482#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */ 483#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */ 484#define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */ 485#define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */ 486#define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */ 487#define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */ 488#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */ 489#define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */ 490#define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */ 491#define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */ 492#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */ 493#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */ 494#define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */ 495#define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */ 496#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */ 497#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */ 498#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */ 499#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */ 500#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ 501#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */ 502#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ 503#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ 504#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ 505#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ 506 507 508 509/* Doorbell functions */ 510#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) 511/* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */ 512#define MPI2_FUNCTION_HANDSHAKE (0x42) 513 514 515/***************************************************************************** 516* 517* IOC Status Values 518* 519*****************************************************************************/ 520 521/* mask for IOCStatus status value */ 522#define MPI2_IOCSTATUS_MASK (0x7FFF) 523 524/**************************************************************************** 525* Common IOCStatus values for all replies 526****************************************************************************/ 527 528#define MPI2_IOCSTATUS_SUCCESS (0x0000) 529#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001) 530#define MPI2_IOCSTATUS_BUSY (0x0002) 531#define MPI2_IOCSTATUS_INVALID_SGL (0x0003) 532#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004) 533#define MPI2_IOCSTATUS_INVALID_VPID (0x0005) 534#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) 535#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007) 536#define MPI2_IOCSTATUS_INVALID_STATE (0x0008) 537#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009) 538 539/**************************************************************************** 540* Config IOCStatus values 541****************************************************************************/ 542 543#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) 544#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) 545#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) 546#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) 547#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) 548#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) 549 550/**************************************************************************** 551* SCSI IO Reply 552****************************************************************************/ 553 554#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) 555#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042) 556#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) 557#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) 558#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) 559#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) 560#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) 561#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) 562#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) 563#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) 564#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) 565#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) 566 567/**************************************************************************** 568* For use by SCSI Initiator and SCSI Target end-to-end data protection 569****************************************************************************/ 570 571#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D) 572#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E) 573#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F) 574 575/**************************************************************************** 576* SCSI Target values 577****************************************************************************/ 578 579#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062) 580#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063) 581#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) 582#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) 583#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) 584#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D) 585#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E) 586#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F) 587#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070) 588#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071) 589 590/**************************************************************************** 591* Serial Attached SCSI values 592****************************************************************************/ 593 594#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090) 595#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091) 596 597/**************************************************************************** 598* Diagnostic Buffer Post / Diagnostic Release values 599****************************************************************************/ 600 601#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0) 602 603 604/**************************************************************************** 605* IOCStatus flag to indicate that log info is available 606****************************************************************************/ 607 608#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) 609 610/**************************************************************************** 611* IOCLogInfo Types 612****************************************************************************/ 613 614#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000) 615#define MPI2_IOCLOGINFO_TYPE_SHIFT (28) 616#define MPI2_IOCLOGINFO_TYPE_NONE (0x0) 617#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1) 618#define MPI2_IOCLOGINFO_TYPE_FC (0x2) 619#define MPI2_IOCLOGINFO_TYPE_SAS (0x3) 620#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4) 621#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) 622 623 624/***************************************************************************** 625* 626* Standard Message Structures 627* 628*****************************************************************************/ 629 630/**************************************************************************** 631* Request Message Header for all request messages 632****************************************************************************/ 633 634typedef struct _MPI2_REQUEST_HEADER 635{ 636 U16 FunctionDependent1; /* 0x00 */ 637 U8 ChainOffset; /* 0x02 */ 638 U8 Function; /* 0x03 */ 639 U16 FunctionDependent2; /* 0x04 */ 640 U8 FunctionDependent3; /* 0x06 */ 641 U8 MsgFlags; /* 0x07 */ 642 U8 VP_ID; /* 0x08 */ 643 U8 VF_ID; /* 0x09 */ 644 U16 Reserved1; /* 0x0A */ 645} MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, 646 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; 647 648 649/**************************************************************************** 650* Default Reply 651****************************************************************************/ 652 653typedef struct _MPI2_DEFAULT_REPLY 654{ 655 U16 FunctionDependent1; /* 0x00 */ 656 U8 MsgLength; /* 0x02 */ 657 U8 Function; /* 0x03 */ 658 U16 FunctionDependent2; /* 0x04 */ 659 U8 FunctionDependent3; /* 0x06 */ 660 U8 MsgFlags; /* 0x07 */ 661 U8 VP_ID; /* 0x08 */ 662 U8 VF_ID; /* 0x09 */ 663 U16 Reserved1; /* 0x0A */ 664 U16 FunctionDependent5; /* 0x0C */ 665 U16 IOCStatus; /* 0x0E */ 666 U32 IOCLogInfo; /* 0x10 */ 667} MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, 668 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; 669 670 671/* common version structure/union used in messages and configuration pages */ 672 673typedef struct _MPI2_VERSION_STRUCT 674{ 675 U8 Dev; /* 0x00 */ 676 U8 Unit; /* 0x01 */ 677 U8 Minor; /* 0x02 */ 678 U8 Major; /* 0x03 */ 679} MPI2_VERSION_STRUCT; 680 681typedef union _MPI2_VERSION_UNION 682{ 683 MPI2_VERSION_STRUCT Struct; 684 U32 Word; 685} MPI2_VERSION_UNION; 686 687 688/* LUN field defines, common to many structures */ 689#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 690#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 691#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 692#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 693#define MPI2_LUN_LEVEL_1_WORD (0xFF00) 694#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00) 695 696 697/***************************************************************************** 698* 699* Fusion-MPT MPI Scatter Gather Elements 700* 701*****************************************************************************/ 702 703/**************************************************************************** 704* MPI Simple Element structures 705****************************************************************************/ 706 707typedef struct _MPI2_SGE_SIMPLE32 708{ 709 U32 FlagsLength; 710 U32 Address; 711} MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, 712 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; 713 714typedef struct _MPI2_SGE_SIMPLE64 715{ 716 U32 FlagsLength; 717 U64 Address; 718} MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, 719 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; 720 721typedef struct _MPI2_SGE_SIMPLE_UNION 722{ 723 U32 FlagsLength; 724 union 725 { 726 U32 Address32; 727 U64 Address64; 728 } u; 729} MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, 730 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; 731 732 733/**************************************************************************** 734* MPI Chain Element structures 735****************************************************************************/ 736 737typedef struct _MPI2_SGE_CHAIN32 738{ 739 U16 Length; 740 U8 NextChainOffset; 741 U8 Flags; 742 U32 Address; 743} MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, 744 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; 745 746typedef struct _MPI2_SGE_CHAIN64 747{ 748 U16 Length; 749 U8 NextChainOffset; 750 U8 Flags; 751 U64 Address; 752} MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, 753 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; 754 755typedef struct _MPI2_SGE_CHAIN_UNION 756{ 757 U16 Length; 758 U8 NextChainOffset; 759 U8 Flags; 760 union 761 { 762 U32 Address32; 763 U64 Address64; 764 } u; 765} MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, 766 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; 767 768 769/**************************************************************************** 770* MPI Transaction Context Element structures 771****************************************************************************/ 772 773typedef struct _MPI2_SGE_TRANSACTION32 774{ 775 U8 Reserved; 776 U8 ContextSize; 777 U8 DetailsLength; 778 U8 Flags; 779 U32 TransactionContext[1]; 780 U32 TransactionDetails[1]; 781} MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, 782 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; 783 784typedef struct _MPI2_SGE_TRANSACTION64 785{ 786 U8 Reserved; 787 U8 ContextSize; 788 U8 DetailsLength; 789 U8 Flags; 790 U32 TransactionContext[2]; 791 U32 TransactionDetails[1]; 792} MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, 793 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; 794 795typedef struct _MPI2_SGE_TRANSACTION96 796{ 797 U8 Reserved; 798 U8 ContextSize; 799 U8 DetailsLength; 800 U8 Flags; 801 U32 TransactionContext[3]; 802 U32 TransactionDetails[1]; 803} MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, 804 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; 805 806typedef struct _MPI2_SGE_TRANSACTION128 807{ 808 U8 Reserved; 809 U8 ContextSize; 810 U8 DetailsLength; 811 U8 Flags; 812 U32 TransactionContext[4]; 813 U32 TransactionDetails[1]; 814} MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, 815 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; 816 817typedef struct _MPI2_SGE_TRANSACTION_UNION 818{ 819 U8 Reserved; 820 U8 ContextSize; 821 U8 DetailsLength; 822 U8 Flags; 823 union 824 { 825 U32 TransactionContext32[1]; 826 U32 TransactionContext64[2]; 827 U32 TransactionContext96[3]; 828 U32 TransactionContext128[4]; 829 } u; 830 U32 TransactionDetails[1]; 831} MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, 832 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; 833 834 835/**************************************************************************** 836* MPI SGE union for IO SGL's 837****************************************************************************/ 838 839typedef struct _MPI2_MPI_SGE_IO_UNION 840{ 841 union 842 { 843 MPI2_SGE_SIMPLE_UNION Simple; 844 MPI2_SGE_CHAIN_UNION Chain; 845 } u; 846} MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, 847 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; 848 849 850/**************************************************************************** 851* MPI SGE union for SGL's with Simple and Transaction elements 852****************************************************************************/ 853 854typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION 855{ 856 union 857 { 858 MPI2_SGE_SIMPLE_UNION Simple; 859 MPI2_SGE_TRANSACTION_UNION Transaction; 860 } u; 861} MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, 862 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; 863 864 865/**************************************************************************** 866* All MPI SGE types union 867****************************************************************************/ 868 869typedef struct _MPI2_MPI_SGE_UNION 870{ 871 union 872 { 873 MPI2_SGE_SIMPLE_UNION Simple; 874 MPI2_SGE_CHAIN_UNION Chain; 875 MPI2_SGE_TRANSACTION_UNION Transaction; 876 } u; 877} MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, 878 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; 879 880 881/**************************************************************************** 882* MPI SGE field definition and masks 883****************************************************************************/ 884 885/* Flags field bit definitions */ 886 887#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80) 888#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40) 889#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) 890#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08) 891#define MPI2_SGE_FLAGS_DIRECTION (0x04) 892#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02) 893#define MPI2_SGE_FLAGS_END_OF_LIST (0x01) 894 895#define MPI2_SGE_FLAGS_SHIFT (24) 896 897#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) 898#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) 899 900/* Element Type */ 901 902#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) 903#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) 904#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) 905#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) 906 907/* Address location */ 908 909#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) 910 911/* Direction */ 912 913#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) 914#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) 915 916/* Address Size */ 917 918#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) 919#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02) 920 921/* Context Size */ 922 923#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00) 924#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02) 925#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04) 926#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06) 927 928#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000) 929#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16) 930 931/**************************************************************************** 932* MPI SGE operation Macros 933****************************************************************************/ 934 935/* SIMPLE FlagsLength manipulations... */ 936#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) 937#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) 938#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK) 939#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) 940 941#define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) 942 943#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength) 944#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength) 945#define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) 946 947/* CAUTION - The following are READ-MODIFY-WRITE! */ 948#define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) 949#define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) 950 951#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) 952 953 954/***************************************************************************** 955* 956* Fusion-MPT IEEE Scatter Gather Elements 957* 958*****************************************************************************/ 959 960/**************************************************************************** 961* IEEE Simple Element structures 962****************************************************************************/ 963 964typedef struct _MPI2_IEEE_SGE_SIMPLE32 965{ 966 U32 Address; 967 U32 FlagsLength; 968} MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, 969 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; 970 971typedef struct _MPI2_IEEE_SGE_SIMPLE64 972{ 973 U64 Address; 974 U32 Length; 975 U16 Reserved1; 976 U8 Reserved2; 977 U8 Flags; 978} MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, 979 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; 980 981typedef union _MPI2_IEEE_SGE_SIMPLE_UNION 982{ 983 MPI2_IEEE_SGE_SIMPLE32 Simple32; 984 MPI2_IEEE_SGE_SIMPLE64 Simple64; 985} MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, 986 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; 987 988 989/**************************************************************************** 990* IEEE Chain Element structures 991****************************************************************************/ 992 993typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; 994 995typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; 996 997typedef union _MPI2_IEEE_SGE_CHAIN_UNION 998{ 999 MPI2_IEEE_SGE_CHAIN32 Chain32; 1000 MPI2_IEEE_SGE_CHAIN64 Chain64; 1001} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, 1002 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; 1003 1004 1005/**************************************************************************** 1006* All IEEE SGE types union 1007****************************************************************************/ 1008 1009typedef struct _MPI2_IEEE_SGE_UNION 1010{ 1011 union 1012 { 1013 MPI2_IEEE_SGE_SIMPLE_UNION Simple; 1014 MPI2_IEEE_SGE_CHAIN_UNION Chain; 1015 } u; 1016} MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, 1017 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; 1018 1019 1020/**************************************************************************** 1021* IEEE SGE field definitions and masks 1022****************************************************************************/ 1023 1024/* Flags field bit definitions */ 1025 1026#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) 1027 1028#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) 1029 1030#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF) 1031 1032/* Element Type */ 1033 1034#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00) 1035#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) 1036 1037/* Data Location Address Space */ 1038 1039#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) 1040#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) 1041#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) 1042#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) 1043#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) 1044 1045 1046/**************************************************************************** 1047* IEEE SGE operation Macros 1048****************************************************************************/ 1049 1050/* SIMPLE FlagsLength manipulations... */ 1051#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) 1052#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) 1053#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) 1054 1055#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) 1056 1057#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) 1058#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) 1059#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) 1060 1061/* CAUTION - The following are READ-MODIFY-WRITE! */ 1062#define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) 1063#define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) 1064 1065 1066 1067 1068/***************************************************************************** 1069* 1070* Fusion-MPT MPI/IEEE Scatter Gather Unions 1071* 1072*****************************************************************************/ 1073 1074typedef union _MPI2_SIMPLE_SGE_UNION 1075{ 1076 MPI2_SGE_SIMPLE_UNION MpiSimple; 1077 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1078} MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, 1079 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; 1080 1081 1082typedef union _MPI2_SGE_IO_UNION 1083{ 1084 MPI2_SGE_SIMPLE_UNION MpiSimple; 1085 MPI2_SGE_CHAIN_UNION MpiChain; 1086 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1087 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; 1088} MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, 1089 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; 1090 1091 1092/**************************************************************************** 1093* 1094* Values for SGLFlags field, used in many request messages with an SGL 1095* 1096****************************************************************************/ 1097 1098/* values for MPI SGL Data Location Address Space subfield */ 1099#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C) 1100#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00) 1101#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04) 1102#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) 1103#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) 1104/* values for SGL Type subfield */ 1105#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03) 1106#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00) 1107#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) 1108#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02) 1109 1110 1111#endif 1112 1113