sata_defs.h revision 4876:ecd69ba0713a
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#ifndef _SATA_DEFS_H 28#define _SATA_DEFS_H 29 30#pragma ident "%Z%%M% %I% %E% SMI" 31 32#ifdef __cplusplus 33extern "C" { 34#endif 35 36#include <sys/scsi/generic/mode.h> 37 38/* 39 * Common ATA commands (subset) 40 */ 41#define SATAC_DIAG 0x90 /* diagnose command */ 42#define SATAC_RECAL 0x10 /* restore cmd, 4 bits step rate */ 43#define SATAC_FORMAT 0x50 /* format track command */ 44#define SATAC_SET_FEATURES 0xef /* set features */ 45#define SATAC_IDLE_IM 0xe1 /* idle immediate */ 46#define SATAC_STANDBY_IM 0xe0 /* standby immediate */ 47#define SATAC_DOOR_LOCK 0xde /* door lock */ 48#define SATAC_DOOR_UNLOCK 0xdf /* door unlock */ 49#define SATAC_IDLE 0xe3 /* idle */ 50 51/* 52 * ATA/ATAPI disk commands (subset) 53 */ 54#define SATAC_DEVICE_RESET 0x08 /* ATAPI device reset */ 55#define SATAC_DOWNLOAD_MICROCODE 0x92 /* Download microcode */ 56#define SATAC_EJECT 0xed /* media eject */ 57#define SATAC_FLUSH_CACHE 0xe7 /* flush write-cache */ 58#define SATAC_ID_DEVICE 0xec /* IDENTIFY DEVICE */ 59#define SATAC_ID_PACKET_DEVICE 0xa1 /* ATAPI identify packet device */ 60#define SATAC_INIT_DEVPARMS 0x91 /* initialize device parameters */ 61#define SATAC_PACKET 0xa0 /* ATAPI packet */ 62#define SATAC_RDMULT 0xc4 /* read multiple w/DMA */ 63#define SATAC_RDSEC 0x20 /* read sector */ 64#define SATAC_RDVER 0x40 /* read verify */ 65#define SATAC_READ_DMA 0xc8 /* read DMA */ 66#define SATAC_SEEK 0x70 /* seek */ 67#define SATAC_SERVICE 0xa2 /* queued/overlap service */ 68#define SATAC_SETMULT 0xc6 /* set multiple mode */ 69#define SATAC_WRITE_DMA 0xca /* write (multiple) w/DMA */ 70#define SATAC_WRMULT 0xc5 /* write multiple */ 71#define SATAC_WRSEC 0x30 /* write sector */ 72#define SATAC_RDSEC_EXT 0x24 /* read sector extended (LBA48) */ 73#define SATAC_READ_DMA_EXT 0x25 /* read DMA extended (LBA48) */ 74#define SATAC_RDMULT_EXT 0x29 /* read multiple extended (LBA48) */ 75#define SATAC_WRSEC_EXT 0x34 /* read sector extended (LBA48) */ 76#define SATAC_WRITE_DMA_EXT 0x35 /* read DMA extended (LBA48) */ 77#define SATAC_WRMULT_EXT 0x39 /* read multiple extended (LBA48) */ 78 79#define SATAC_READ_DMA_QUEUED 0xc7 /* read DMA / may be queued */ 80#define SATAC_READ_DMA_QUEUED_EXT 0x26 /* read DMA ext / may be queued */ 81#define SATAC_WRITE_DMA_QUEUED 0xcc /* read DMA / may be queued */ 82#define SATAC_WRITE_DMA_QUEUED_EXT 0x36 /* read DMA ext / may be queued */ 83#define SATAC_READ_PM_REG 0xe4 /* read port mult reg */ 84#define SATAC_WRITE_PM_REG 0xe8 /* write port mult reg */ 85 86#define SATAC_READ_FPDMA_QUEUED 0x60 /* First-Party-DMA read queued */ 87#define SATAC_WRITE_FPDMA_QUEUED 0x61 /* First-Party-DMA write queued */ 88 89#define SATAC_READ_LOG_EXT 0x2f /* read log */ 90 91#define SATAC_SMART 0xb0 /* SMART */ 92 93#define SATA_LOG_PAGE_10 0x10 /* log page 0x10 - SATA error */ 94/* 95 * Power Managment Commands (subset) 96 */ 97#define SATAC_CHECK_POWER_MODE 0xe5 /* check power mode */ 98 99#define SATA_PWRMODE_STANDBY 0 /* standby mode */ 100#define SATA_PWRMODE_IDLE 0x80 /* idle mode */ 101#define SATA_PWRMODE_ACTIVE 0xFF /* active or idle mode, rev7 spec */ 102 103 104/* 105 * SMART FEATURES Subcommands 106 */ 107#define SATA_SMART_READ_DATA 0xd0 108#define SATA_SMART_ATTR_AUTOSAVE 0xd2 109#define SATA_SMART_EXECUTE_OFFLINE_IMM 0xd4 110#define SATA_SMART_READ_LOG 0xd5 111#define SATA_SMART_WRITE_LOG 0xd6 112#define SATA_SMART_ENABLE_OPS 0xd8 113#define SATA_SMART_DISABLE_OPS 0xd9 114#define SATA_SMART_RETURN_STATUS 0xda 115 116/* 117 * SET FEATURES Subcommands 118 */ 119#define SATAC_SF_ENABLE_WRITE_CACHE 0x02 120#define SATAC_SF_TRANSFER_MODE 0x03 121#define SATAC_SF_DISABLE_RMSN 0x31 122#define SATAC_SF_ENABLE_ACOUSTIC 0x42 123#define SATAC_SF_DISABLE_READ_AHEAD 0x55 124#define SATAC_SF_DISABLE_WRITE_CACHE 0x82 125#define SATAC_SF_ENABLE_READ_AHEAD 0xaa 126#define SATAC_SF_DISABLE_ACOUSTIC 0xc2 127#define SATAC_SF_ENABLE_RMSN 0x95 128 129/* 130 * SET FEATURES transfer mode values 131 */ 132#define SATAC_TRANSFER_MODE_PIO_DEFAULT 0x00 133#define SATAC_TRANSFER_MODE_PIO_DISABLE_IODRY 0x01 134#define SATAC_TRANSFER_MODE_PIO_FLOW_CONTROL 0x08 135#define SATAC_TRANSFER_MODE_MULTI_WORD_DMA 0x20 136#define SATAC_TRANSFER_MODE_ULTRA_DMA 0x40 137 138/* 139 * Download microcode subcommands 140 */ 141#define SATA_DOWNLOAD_MCODE_TEMP 1 /* Revert on/ reset/pwr cycle */ 142#define SATA_DOWNLOAD_MCODE_SAVE 7 /* No offset, keep mcode */ 143 144 145/* Generic ATA definitions */ 146 147#define SATA_TAG_QUEUING_SHIFT 3 148#define SATA_TAG_QUEUING_MASK 0x1f 149/* 150 * Identify Device data 151 * Although both ATA and ATAPI devices' Identify Data have the same length, 152 * some words have different meaning/content and/or are irrelevant for 153 * other type of device. 154 * Following is the ATA Device Identify data layout 155 */ 156typedef struct sata_id { 157/* WORD */ 158/* OFFSET COMMENT */ 159 ushort_t ai_config; /* 0 general configuration bits */ 160 ushort_t ai_fixcyls; /* 1 # of cylinders (obsolete) */ 161 ushort_t ai_resv0; /* 2 # reserved */ 162 ushort_t ai_heads; /* 3 # of heads (obsolete) */ 163 ushort_t ai_trksiz; /* 4 # of bytes/track (retired) */ 164 ushort_t ai_secsiz; /* 5 # of bytes/sector (retired) */ 165 ushort_t ai_sectors; /* 6 # of sectors/track (obsolete) */ 166 ushort_t ai_resv1[3]; /* 7 "Vendor Unique" */ 167 char ai_drvser[20]; /* 10 Serial number */ 168 ushort_t ai_buftype; /* 20 Buffer type */ 169 ushort_t ai_bufsz; /* 21 Buffer size in 512 byte incr */ 170 ushort_t ai_ecc; /* 22 # of ecc bytes avail on rd/wr */ 171 char ai_fw[8]; /* 23 Firmware revision */ 172 char ai_model[40]; /* 27 Model # */ 173 ushort_t ai_mult1; /* 47 Multiple command flags */ 174 ushort_t ai_dwcap; /* 48 Doubleword capabilities */ 175 ushort_t ai_cap; /* 49 Capabilities */ 176 ushort_t ai_resv2; /* 50 Reserved */ 177 ushort_t ai_piomode; /* 51 PIO timing mode */ 178 ushort_t ai_dmamode; /* 52 DMA timing mode */ 179 ushort_t ai_validinfo; /* 53 bit0: wds 54-58, bit1: 64-70 */ 180 ushort_t ai_curcyls; /* 54 # of current cylinders */ 181 ushort_t ai_curheads; /* 55 # of current heads */ 182 ushort_t ai_cursectrk; /* 56 # of current sectors/track */ 183 ushort_t ai_cursccp[2]; /* 57 current sectors capacity */ 184 ushort_t ai_mult2; /* 59 multiple sectors info */ 185 ushort_t ai_addrsec[2]; /* 60 LBA only: no of addr secs */ 186 ushort_t ai_dirdma; /* 62 valid in ATA/ATAPI7, DMADIR */ 187 ushort_t ai_dworddma; /* 63 multi word dma modes */ 188 ushort_t ai_advpiomode; /* 64 advanced PIO modes supported */ 189 ushort_t ai_minmwdma; /* 65 min multi-word dma cycle info */ 190 ushort_t ai_recmwdma; /* 66 rec multi-word dma cycle info */ 191 ushort_t ai_minpio; /* 67 min PIO cycle info */ 192 ushort_t ai_minpioflow; /* 68 min PIO cycle info w/flow ctl */ 193 ushort_t ai_resv3[2]; /* 69,70 reserved */ 194 ushort_t ai_typtime[2]; /* 71-72 timing */ 195 ushort_t ai_resv4[2]; /* 73-74 reserved */ 196 ushort_t ai_qdepth; /* 75 queue depth */ 197 ushort_t ai_satacap; /* 76 SATA capabilities */ 198 ushort_t ai_resv5; /* 77 reserved */ 199 ushort_t ai_satafsup; /* 78 SATA features supported */ 200 ushort_t ai_satafenbl; /* 79 SATA features enabled */ 201 ushort_t ai_majorversion; /* 80 major versions supported */ 202 ushort_t ai_minorversion; /* 81 minor version number supported */ 203 ushort_t ai_cmdset82; /* 82 command set supported */ 204 ushort_t ai_cmdset83; /* 83 more command sets supported */ 205 ushort_t ai_cmdset84; /* 84 more command sets supported */ 206 ushort_t ai_features85; /* 85 enabled features */ 207 ushort_t ai_features86; /* 86 enabled features */ 208 ushort_t ai_features87; /* 87 enabled features */ 209 ushort_t ai_ultradma; /* 88 Ultra DMA mode */ 210 ushort_t ai_erasetime; /* 89 security erase time */ 211 ushort_t ai_erasetimex; /* 90 enhanced security erase time */ 212 ushort_t ai_adv_pwr_mgmt; /* 91 advanced power management time */ 213 ushort_t ai_master_pwd; /* 92 master password revision code */ 214 ushort_t ai_hrdwre_reset; /* 93 hardware reset result */ 215 ushort_t ai_acoustic; /* 94 accoustic management values */ 216 ushort_t ai_stream_min_sz; /* 95 stream minimum request size */ 217 ushort_t ai_stream_xfer_d; /* 96 streaming transfer time (DMA) */ 218 ushort_t ai_stream_lat; /* 97 streaming access latency */ 219 ushort_t ai_streamperf[2]; /* 98-99 streaming performance gran. */ 220 ushort_t ai_addrsecxt[4]; /* 100 extended max LBA sector */ 221 ushort_t ai_stream_xfer_p; /* 104 streaming transfer time (PIO) */ 222 ushort_t ai_padding1; /* 105 pad */ 223 ushort_t ai_phys_sect_sz; /* 106 physical sector size */ 224 ushort_t ai_seek_delay; /* 107 inter-seek delay time (usecs) */ 225 ushort_t ai_naa_ieee_oui; /* 108 NAA/IEEE OUI */ 226 ushort_t ai_ieee_oui_uid; /* 109 IEEE OUT/unique id */ 227 ushort_t ai_uid_mid; /* 110 unique id (mid) */ 228 ushort_t ai_uid_low; /* 111 unique id (low) */ 229 ushort_t ai_resv_wwn[4]; /* 112-115 reserved for WWN ext. */ 230 ushort_t ai_incits; /* 116 reserved for INCITS TR-37-2004 */ 231 ushort_t ai_words_lsec[2]; /* 117-118 words per logical sector */ 232 ushort_t ai_cmdset119; /* 119 more command sets supported */ 233 ushort_t ai_features120; /* 120 enabled features */ 234 ushort_t ai_padding2[6]; /* pad to 126 */ 235 ushort_t ai_rmsn; /* 127 removable media notification */ 236 ushort_t ai_securestatus; /* 128 security status */ 237 ushort_t ai_vendor[31]; /* 129-159 vendor specific */ 238 ushort_t ai_padding3[16]; /* 160 pad to 176 */ 239 ushort_t ai_curmedser[30]; /* 176-205 current media serial # */ 240 ushort_t ai_sctsupport; /* 206 SCT command transport */ 241 ushort_t ai_padding4[48]; /* 207 pad to 255 */ 242 ushort_t ai_integrity; /* 255 integrity word */ 243} sata_id_t; 244 245 246/* Identify Device: general config bits - word 0 */ 247 248#define SATA_ATA_TYPE_MASK 0x8001 /* ATA Device type mask */ 249#define SATA_ATA_TYPE 0x0000 /* ATA device */ 250#define SATA_REM_MEDIA 0x0080 /* Removable media */ 251#define SATA_INCOMPLETE_DATA 0x0004 /* Incomplete Identify Device data */ 252 253#define SATA_ID_SERIAL_OFFSET 10 254#define SATA_ID_SERIAL_LEN 20 255#define SATA_ID_MODEL_OFFSET 27 256#define SATA_ID_MODEL_LEN 40 257#define SATA_ID_FW_LEN 8 258 259/* Identify Device: common capability bits - word 49 */ 260 261#define SATA_DMA_SUPPORT 0x0100 262#define SATA_LBA_SUPPORT 0x0200 263#define SATA_IORDY_DISABLE 0x0400 264#define SATA_IORDY_SUPPORT 0x0800 265#define SATA_STANDBYTIMER 0x2000 266 267/* Identify Device: ai_validinfo (word 53) */ 268 269#define SATA_VALIDINFO_88 0x0004 /* word 88 supported fields valid */ 270#define SATA_VALIDINFO_70_64 0x0004 /* words 70-64 fields valid */ 271 272/* Identify Device: ai_majorversion (word 80) */ 273 274#define SATA_MAJVER_7 0x0080 /* ATA/ATAPI-7 version supported */ 275#define SATA_MAJVER_654 0x0070 /* ATA/ATAPI-6,5 or 4 ver supported */ 276#define SATA_MAJVER_6 0x0040 /* ATA/ATAPI-6 version supported */ 277#define SATA_MAJVER_5 0x0020 /* ATA/ATAPI-7 version supported */ 278#define SATA_MAJVER_4 0x0010 /* ATA/ATAPI-4 version supported */ 279 280/* Identify Device: command set supported/enabled bits - words 83 and 86 */ 281 282#define SATA_EXT48 0x0400 /* 48 bit address feature */ 283#define SATA_PWRUP_IN_STANDBY 0x0020 /* Power-up in standby mode supp/en */ 284#define SATA_RM_STATUS_NOTIFIC 0x0010 /* Removable Media Stat Notification */ 285#define SATA_RW_DMA_QUEUED_CMD 0x0002 /* R/W DMA Queued supported */ 286#define SATA_DWNLOAD_MCODE_CMD 0x0001 /* Download Microcode CMD supp/enbld */ 287#define SATA_ACOUSTIC_MGMT 0x0200 /* Acoustic Management features */ 288 289/* Identify Device: command set supported/enabled bits - words 82 and 85 */ 290 291#define SATA_SMART_SUPPORTED 0x0001 /* SMART feature set is supported */ 292#define SATA_WRITE_CACHE 0x0020 /* Write Cache supported/enabled */ 293#define SATA_LOOK_AHEAD 0x0040 /* Look Ahead supported/enabled */ 294#define SATA_DEVICE_RESET_CMD 0x0200 /* Device Reset CMD supported/enbld */ 295#define SATA_READ_BUFFER_CMD 0x2000 /* Read Buffer CMD supported/enbld */ 296#define SATA_WRITE_BUFFER_CMD 0x1000 /* Write Buffer CMD supported/enbld */ 297#define SATA_SMART_ENABLED 0x0001 /* SMART feature set is enabled */ 298 299/* Identify Device: command set supported/enabled bits - words 84 & 87 */ 300#define SATA_SMART_SELF_TEST_SUPPORTED 0x0002 /* SMART self-test supported */ 301 302/* Identify (Packet) Device word 63, ATA/ATAPI-6 & 7 */ 303#define SATA_MDMA_SEL_MASK 0x0700 /* Multiword DMA selected */ 304#define SATA_MDMA_2_SEL 0x0400 /* Multiword DMA mode 2 selected */ 305#define SATA_MDMA_1_SEL 0x0200 /* Multiword DMA mode 1 selected */ 306#define SATA_MDMA_0_SEL 0x0100 /* Multiword DMA mode 0 selected */ 307#define SATA_MDMA_2_SUP 0x0004 /* Multiword DMA mode 2 supported */ 308#define SATA_MDMA_1_SUP 0x0002 /* Multiword DMA mode 1 supported */ 309#define SATA_MDMA_0_SUP 0x0001 /* Multiword DMA mode 0 supported */ 310#define SATA_MDMA_SUP_MASK 0x0007 /* Multiword DMA supported */ 311 312/* Identify (Packet) Device Word 88 */ 313#define SATA_UDMA_SUP_MASK 0x007f /* UDMA modes supported */ 314#define SATA_UDMA_SEL_MASK 0x7f00 /* UDMA modes selected */ 315 316/* Identify Device: command set supported/enabled bits - word 206 */ 317 318/* All are SCT Command Transport support */ 319#define SATA_SCT_CMD_TRANS_SUP 0x0001 /* anything */ 320#define SATA_SCT_CMD_TRANS_LNG_SECT_SUP 0x0002 /* Long Sector Access */ 321#define SATA_SCT_CMD_TRANS_WR_SAME_SUP 0x0004 /* Write Same */ 322#define SATA_SCT_CMD_TRANS_ERR_RCOV_SUP 0x0008 /* Error Recovery Control */ 323#define SATA_SCT_CMD_TRANS_FEAT_CTL_SUP 0x0010 /* Features Control */ 324#define SATA_SCT_CMD_TRANS_DATA_TBL_SUP 0x0020 /* Data Tables supported */ 325 326#define SATA_DISK_SECTOR_SIZE 512 /* HD physical sector size */ 327 328/* Identify Packet Device data definitions (ATAPI devices) */ 329 330/* Identify Packet Device: general config bits - word 0 */ 331 332#define SATA_ATAPI_TYPE_MASK 0xc000 333#define SATA_ATAPI_TYPE 0x8000 /* ATAPI device */ 334#define SATA_ATAPI_ID_PKT_SZ 0x0003 /* Packet size mask */ 335#define SATA_ATAPI_ID_PKT_12B 0x0000 /* Packet size 12 bytes */ 336#define SATA_ATAPI_ID_PKT_16B 0x0001 /* Packet size 16 bytes */ 337#define SATA_ATAPI_ID_DRQ_TYPE 0x0060 /* DRQ asserted in 3ms after pkt */ 338#define SATA_ATAPI_ID_DRQ_INTR 0x0020 /* Obsolete in ATA/ATAPI 7 */ 339 340#define SATA_ATAPI_ID_DEV_TYPE 0x0f00 /* device type/command set mask */ 341#define SATA_ATAPI_ID_DEV_SHFT 8 342#define SATA_ATAPI_DIRACC_DEV 0x0000 /* Direct Access device */ 343#define SATA_ATAPI_SQACC_DEV 0x0100 /* Sequential access dev (tape ?) */ 344#define SATA_ATAPI_CDROM_DEV 0x0500 /* CD_ROM device */ 345 346/* 347 * Status bits from ATAPI Interrupt reason register (AT_COUNT) register 348 */ 349#define SATA_ATAPI_I_COD 0x01 /* Command or Data */ 350#define SATA_ATAPI_I_IO 0x02 /* IO direction */ 351#define SATA_ATAPI_I_RELEASE 0x04 /* Release for ATAPI overlap */ 352 353/* ATAPI feature reg definitions */ 354 355#define SATA_ATAPI_F_DATA_DIR_READ 0x04 /* DMA transfer to the host */ 356#define SATA_ATAPI_F_OVERLAP 0x02 /* Not used by Sun drivers */ 357#define SATA_ATAPI_F_DMA 0x01 /* Packet DMA command */ 358 359 360/* ATAPI IDENTIFY_DRIVE capabilities word (49) */ 361 362#define SATA_ATAPI_ID_CAP_DMA 0x0100 /* if zero, check word 62 */ 363#define SATA_ATAPI_ID_CAP_OVERLAP 0x2000 364 365/* 366 * ATAPI Identify Packet Device word 62 367 * Word 62 is not valid for ATA/ATAPI-6 368 * Defs below are for ATA/ATAPI-7 369 */ 370#define SATA_ATAPI_ID_DMADIR_REQ 0x8000 /* DMA direction required */ 371#define SATA_ATAPI_ID_DMA_SUP 0x0400 /* DMA is supported */ 372 373/* 374 * ATAPI signature bits 375 */ 376#define SATA_ATAPI_SIG_HI 0xeb /* in high cylinder register */ 377#define SATA_ATAPI_SIG_LO 0x14 /* in low cylinder register */ 378 379/* These values are pre-set for CD_ROM/DVD ? */ 380 381#define SATA_ATAPI_SECTOR_SIZE 2048 382#define SATA_ATAPI_MAX_BYTES_PER_DRQ 0xf800 /* 16 bits - 2KB ie 62KB */ 383#define SATA_ATAPI_HEADS 64 384#define SATA_ATAPI_SECTORS_PER_TRK 32 385 386/* SATA Capabilites bits (word 76) */ 387 388#define SATA_NCQ 0x100 389#define SATA_2_SPEED 0x004 390#define SATA_1_SPEED 0x002 391 392/* SATA Features Supported (word 78) - not used */ 393 394/* SATA Features Enabled (word 79) - not used */ 395 396/* 397 * Generic NCQ related defines 398 */ 399 400#define NQ 0x80 /* Not a queued cmd - tag not valid */ 401#define NCQ_TAG_MASK 0x1f /* NCQ command tag mask */ 402#define FIS_TYPE_REG_H2D 0x27 /* Reg FIS - Host to Device */ 403#define FIS_CMD_UPDATE 0x80 404/* 405 * Status bits from AT_STATUS register 406 */ 407#define SATA_STATUS_BSY 0x80 /* controller busy */ 408#define SATA_STATUS_DRDY 0x40 /* drive ready */ 409#define SATA_STATUS_DF 0x20 /* device fault */ 410#define SATA_STATUS_DSC 0x10 /* seek operation complete */ 411#define SATA_STATUS_DRQ 0x08 /* data request */ 412#define SATA_STATUS_CORR 0x04 /* obsolete */ 413#define SATA_STATUS_IDX 0x02 /* obsolete */ 414#define SATA_STATUS_ERR 0x01 /* error flag */ 415 416/* 417 * Status bits from AT_ERROR register 418 */ 419#define SATA_ERROR_ICRC 0x80 /* CRC data transfer error detected */ 420#define SATA_ERROR_UNC 0x40 /* uncorrectable data error */ 421#define SATA_ERROR_MC 0x20 /* Media change */ 422#define SATA_ERROR_IDNF 0x10 /* ID/Address not found */ 423#define SATA_ERROR_MCR 0x08 /* media change request */ 424#define SATA_ERROR_ABORT 0x04 /* aborted command */ 425#define SATA_ERROR_NM 0x02 /* no media */ 426#define SATA_ERROR_EOM 0x02 /* end of media (Packet cmds) */ 427#define SATA_ERROR_ILI 0x01 /* cmd sepcific */ 428 429 430/* 431 * Bits from the device control register 432 */ 433#define SATA_DEVCTL_NIEN 0x02 /* not interrupt enabled */ 434#define SATA_DEVCTL_SRST 0x04 /* software reset */ 435#define SATA_DEVCTL_HOB 0x80 /* high order bit */ 436 437/* device_reg */ 438#define SATA_ADH_LBA 0x40 /* addressing in LBA mode not chs */ 439 440/* ATAPI transport version-in Inquiry data */ 441#define SATA_ATAPI_TRANS_VERSION(inq) \ 442 (*((uint8_t *)(inq) + 3) >> 4) 443 444#define SCSI_LOG_PAGE_HDR_LEN 4 /* # bytes of a SCSI log page header */ 445#define SCSI_LOG_PARAM_HDR_LEN 4 /* # byttes of a SCSI log param hdr */ 446 447/* Number of log entries per extended selftest log block */ 448#define ENTRIES_PER_EXT_SELFTEST_LOG_BLK 19 449 450/* Number of entries per SCSI LOG SENSE SELFTEST RESULTS page */ 451#define SCSI_ENTRIES_IN_LOG_SENSE_SELFTEST_RESULTS 20 452 453/* Length of a SCSI LOG SENSE SELFTEST RESULTS parameter */ 454#define SCSI_LOG_SENSE_SELFTEST_PARAM_LEN 0x10 455 456#define DIAGNOSTIC_FAILURE_ON_COMPONENT 0x40 457 458#define SCSI_COMPONENT_81 0x81 459#define SCSI_COMPONENT_82 0x82 460#define SCSI_COMPONENT_83 0x83 461#define SCSI_COMPONENT_84 0x84 462#define SCSI_COMPONENT_85 0x85 463#define SCSI_COMPONENT_86 0x86 464#define SCSI_COMPONENT_87 0x87 465#define SCSI_COMPONENT_88 0x88 466 467#define SCSI_ASC_ATA_DEV_FEAT_NOT_ENABLED 0x67 468#define SCSI_ASCQ_ATA_DEV_FEAT_NOT_ENABLED 0x0b 469 470#define SCSI_PREDICTED_FAILURE 0x5d 471#define SCSI_GENERAL_HD_FAILURE 0x10 472 473#define SCSI_INFO_EXCEPTIONS_PARAM_LEN 4 474 475#define READ_LOG_EXT_LOG_DIRECTORY 0 476#define READ_LOG_EXT_NCQ_ERROR_RECOVERY 0x10 477#define SMART_SELFTEST_LOG_PAGE 6 478#define EXT_SMART_SELFTEST_LOG_PAGE 7 479 480/* 481 * SATA NCQ error recovery page (0x10) 482 */ 483struct sata_ncq_error_recovery_page { 484 uint8_t ncq_tag; 485 uint8_t reserved1; 486 uint8_t ncq_status; 487 uint8_t ncq_error; 488 uint8_t ncq_sector_number; 489 uint8_t ncq_cyl_low; 490 uint8_t ncq_cyl_high; 491 uint8_t ncq_dev_head; 492 uint8_t ncq_sector_number_ext; 493 uint8_t ncq_cyl_low_ext; 494 uint8_t ncq_cyl_high_ext; 495 uint8_t reserved2; 496 uint8_t ncq_sector_count; 497 uint8_t ncq_sector_count_ext; 498 uint8_t reserved3[242]; 499 uint8_t ncq_vendor_unique[255]; 500 uint8_t ncq_checksum; 501}; 502 503/* 504 * SMART data structures 505 */ 506struct smart_data { 507 uint8_t smart_vendor_specific[362]; 508 uint8_t smart_offline_data_collection_status; 509 uint8_t smart_selftest_exec_status; 510 uint8_t smart_secs_to_complete_offline_data[2]; 511 uint8_t smart_vendor_specific2; 512 uint8_t smart_offline_data_collection_capability; 513 uint8_t smart_capability[2]; 514 uint8_t smart_error_logging_capability; 515 uint8_t smart_vendor_specific3; 516 uint8_t smart_short_selftest_polling_time; 517 uint8_t smart_extended_selftest_polling_time; 518 uint8_t smart_conveyance_selftest_polling_time; 519 uint8_t smart_reserved[11]; 520 uint8_t smart_vendor_specific4[125]; 521 uint8_t smart_checksum; 522}; 523 524struct smart_selftest_log_entry { 525 uint8_t smart_selftest_log_lba_low; 526 uint8_t smart_selftest_log_status; 527 uint8_t smart_selftest_log_timestamp[2]; 528 uint8_t smart_selftest_log_checkpoint; 529 uint8_t smart_selftest_log_failing_lba[4]; /* from LSB to MSB */ 530 uint8_t smart_selftest_log_vendor_specific[15]; 531}; 532 533#define NUM_SMART_SELFTEST_LOG_ENTRIES 21 534struct smart_selftest_log { 535 uint8_t smart_selftest_log_revision[2]; 536 struct smart_selftest_log_entry 537 smart_selftest_log_entries[NUM_SMART_SELFTEST_LOG_ENTRIES]; 538 uint8_t smart_selftest_log_vendor_specific[2]; 539 uint8_t smart_selftest_log_index; 540 uint8_t smart_selftest_log_reserved[2]; 541 uint8_t smart_selftest_log_checksum; 542}; 543 544struct smart_ext_selftest_log_entry { 545 uint8_t smart_ext_selftest_log_lba_low; 546 uint8_t smart_ext_selftest_log_status; 547 uint8_t smart_ext_selftest_log_timestamp[2]; 548 uint8_t smart_ext_selftest_log_checkpoint; 549 uint8_t smart_ext_selftest_log_failing_lba[6]; 550 uint8_t smart_ext_selftest_log_vendor_specific[15]; 551}; 552 553struct smart_ext_selftest_log { 554 uint8_t smart_ext_selftest_log_rev; 555 uint8_t smart_ext_selftest_log_reserved; 556 uint8_t smart_ext_selftest_log_index[2]; 557 struct smart_ext_selftest_log_entry smart_ext_selftest_log_entries[19]; 558 uint8_t smart_ext_selftest_log_vendor_specific[2]; 559 uint8_t smart_ext_selftest_log_reserved2[11]; 560 uint8_t smart_ext_selftest_log_checksum; 561}; 562 563struct read_log_ext_directory { 564 uint8_t read_log_ext_vers[2]; /* general purpose log version */ 565 uint8_t read_log_ext_nblks[255][2]; /* # of blks @ log addr index+1 */ 566}; 567 568/* 569 * SMART specific data 570 * These eventually need to go to a generic scsi hearder file 571 * for now they will reside here 572 */ 573#define PC_CUMULATIVE_VALUES 0x01 574#define PAGE_CODE_GET_SUPPORTED_LOG_PAGES 0x00 575#define PAGE_CODE_SELF_TEST_RESULTS 0x10 576#define PAGE_CODE_INFORMATION_EXCEPTIONS 0x2f 577#define PAGE_CODE_SMART_READ_DATA 0x30 578 579 580struct log_parameter { 581 uint8_t param_code[2]; /* parameter dependant */ 582 uint8_t param_ctrl_flags; /* see defines below */ 583 uint8_t param_len; /* # of bytes following */ 584 uint8_t param_values[1]; /* # of bytes defined by param_len */ 585}; 586 587/* param_ctrl_flag fields */ 588#define LOG_CTRL_LP 0x01 /* list parameter */ 589#define LOG_CTRL_LBIN 0x02 /* list is binary */ 590#define LOG_CTRL_TMC 0x0c /* threshold met criteria */ 591#define LOG_CTRL_ETC 0x10 /* enable threshold comparison */ 592#define LOG_CTRL_TSD 0x20 /* target save disable */ 593#define LOG_CTRL_DS 0x40 /* disable save */ 594#define LOG_CTRL_DU 0x80 /* disable update */ 595 596#define SMART_MAGIC_VAL_1 0x4f 597#define SMART_MAGIC_VAL_2 0xc2 598#define SMART_MAGIC_VAL_3 0xf4 599#define SMART_MAGIC_VAL_4 0x2c 600 601#define SCT_STATUS_LOG_PAGE 0xe0 602 603/* 604 * Acoustic management 605 */ 606 607struct mode_acoustic_management { 608 struct mode_page mode_page; /* common mode page header */ 609 uchar_t acoustic_manag_enable; /* Set to 1 enable, Set 0 disable */ 610 uchar_t acoustic_manag_level; /* Acoustic management level */ 611 uchar_t vendor_recommended_value; /* Vendor recommended value */ 612}; 613 614#define PAGELENGTH_DAD_MODE_ACOUSTIC_MANAGEMENT 3 /* Acoustic manag pg len */ 615#define P_CNTRL_CURRENT 0 616#define P_CNTRL_CHANGEABLE 1 617#define P_CNTRL_DEFAULT 2 618#define P_CNTRL_SAVED 3 619 620#define ACOUSTIC_DISABLED 0 621#define ACOUSTIC_ENABLED 1 622 623#define MODEPAGE_ACOUSTIC_MANAG 0x30 624 625/* 626 * sstatus field definitions 627 */ 628#define SSTATUS_DET_SHIFT 0 629#define SSTATUS_SPD_SHIFT 4 630#define SSTATUS_IPM_SHIFT 8 631 632#define SSTATUS_DET (0xf << SSTATUS_DET_SHIFT) 633#define SSTATUS_SPD (0xf << SSTATUS_SPD_SHIFT) 634#define SSTATUS_IPM (0xf << SSTATUS_IPM_SHIFT) 635 636/* 637 * sstatus DET values 638 */ 639#define SSTATUS_DET_NODEV 0 /* No dev detected */ 640#define SSTATUS_DET_DEVPRE_NOPHYCOM 1 /* dev detected */ 641#define SSTATUS_DET_DEVPRE_PHYCOM 3 /* dev detected */ 642#define SSTATUS_DET_PHYOFFLINE 4 /* PHY is in offline */ 643 644#define SSTATUS_GET_DET(x) \ 645 (x & SSTATUS_DET) 646 647#define SSTATUS_SET_DET(x, new_val) \ 648 (x = (x & ~SSTATUS_DET) | (new_val & SSTATUS_DET)) 649 650#define SSTATUS_SPD_NOLIMIT 0 /* No speed limit */ 651#define SSTATUS_SPD_GEN1 1 /* Limit Gen 1 rate */ 652#define SSTATUS_SPD_GEN2 2 /* Limit Gen 2 rate */ 653 654/* 655 * sstatus IPM values 656 */ 657#define SSTATUS_IPM_NODEV_NOPHYCOM 0x0 /* No dev, no PHY */ 658#define SSTATUS_IPM_ACTIVE 0x1 /* Interface active */ 659#define SSTATUS_IPM_POWERPARTIAL 0x2 /* partial power mgmnt */ 660#define SSTATUS_IPM_POWERSLUMBER 0x6 /* slumber power mgmt */ 661 662#define SSTATUS_GET_IPM(x) \ 663 ((x & SSTATUS_IPM) >> SSTATUS_IPM_SHIFT) 664 665#define SSTATUS_SET_IPM(x, new_val) \ 666 (x = (x & ~SSTATUS_IPM) | \ 667 ((new_val << SSTATUS_IPM_SHIFT) & SSTATUS_IPM)) 668 669 670/* 671 * serror register fields 672 */ 673#define SERROR_DATA_ERR_FIXED (1 << 0) /* D integrity err */ 674#define SERROR_COMM_ERR_FIXED (1 << 1) /* comm err recov */ 675#define SERROR_DATA_ERR (1 << 8) /* D integrity err */ 676#define SERROR_PERSISTENT_ERR (1 << 9) /* norecov com err */ 677#define SERROR_PROTOCOL_ERR (1 << 10) /* protocol err */ 678#define SERROR_INT_ERR (1 << 11) /* internal err */ 679#define SERROR_PHY_RDY_CHG (1 << 16) /* PHY state change */ 680#define SERROR_PHY_INT_ERR (1 << 17) /* PHY internal err */ 681#define SERROR_COMM_WAKE (1 << 18) /* COM wake */ 682#define SERROR_10B_TO_8B_ERR (1 << 19) /* 10B-to-8B decode */ 683#define SERROR_DISPARITY_ERR (1 << 20) /* disparity err */ 684#define SERROR_CRC_ERR (1 << 21) /* CRC err */ 685#define SERROR_HANDSHAKE_ERR (1 << 22) /* Handshake err */ 686#define SERROR_LINK_SEQ_ERR (1 << 23) /* Link seq err */ 687#define SERROR_TRANS_ERR (1 << 24) /* Tran state err */ 688#define SERROR_FIS_TYPE (1 << 25) /* FIS type err */ 689#define SERROR_EXCHANGED_ERR (1 << 26) /* Device exchanged */ 690 691/* 692 * S-Control Bridge port x register fields 693 */ 694#define SCONTROL_DET_SHIFT 0 695#define SCONTROL_SPD_SHIFT 4 696#define SCONTROL_IPM_SHIFT 8 697#define SCONTROL_SPM_SHIFT 12 698 699#define SCONTROL_DET (0xf << SSTATUS_DET_SHIFT) 700#define SCONTROL_SPD (0xf << SSTATUS_SPD_SHIFT) 701#define SCONTROL_IPM (0xf << SSTATUS_IPM_SHIFT) 702#define SCONTROL_SPM (0xf << SSTATUS_SPM_SHIFT) 703 704#define SCONTROL_GET_DET(x) \ 705 (x & SCONTROL_DET) 706 707#define SCONTROL_SET_DET(x, new_val) \ 708 (x = (x & ~SCONTROL_DET) | (new_val & SCONTROL_DET)) 709 710#define SCONTROL_DET_NOACTION 0 /* Do nothing to port */ 711#define SCONTROL_DET_COMRESET 1 /* Re-initialize port */ 712#define SCONTROL_DET_DISABLE 4 /* Disable port */ 713 714#define SCONTROL_SPD_NOLIMIT 0 /* No speed limit */ 715#define SCONTROL_SPD_GEN1 1 /* Limit Gen 1 rate */ 716#define SCONTROL_SPD_GEN2 2 /* Limit Gen 2 rate */ 717 718#define SCONTROL_IPM_NORESTRICT 0 /* No PM limit */ 719#define SCONTROL_IPM_DISABLE_PARTIAL 1 /* Disable partial */ 720#define SCONTROL_IPM_DISABLE_SLUMBER 2 /* Disable slumber */ 721#define SCONTROL_IPM_DISABLE_BOTH 3 /* Disable both */ 722 723#define SCONTROL_SPM_NORESTRICT 0 /* No PM limits */ 724#define SCONTROL_SPM_DO_PARTIAL 1 /* Go to partial */ 725#define SCONTROL_SPM_DO_SLUMBER 2 /* Go to slumber */ 726#define SCONTROL_SPM_DO_ACTIVE 4 /* Go to active */ 727 728#ifdef __cplusplus 729} 730#endif 731 732#endif /* _SATA_DEFS_H */ 733