tavor_srq.h revision 9517:b4839b0aa7a4 
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef	_SYS_IB_ADAPTERS_TAVOR_SRQ_H
28#define	_SYS_IB_ADAPTERS_TAVOR_SRQ_H
29
30/*
31 * tavor_srq.h
32 *    Contains all of the prototypes, #defines, and structures necessary
33 *    for the Shared Receive Queue Processing routines.
34 *
35 *    (including those routines directly exposed through the IBTF CI
36 *    interface).
37 */
38
39#include <sys/types.h>
40#include <sys/conf.h>
41#include <sys/ddi.h>
42#include <sys/sunddi.h>
43
44#ifdef __cplusplus
45extern "C" {
46#endif
47
48/*
49 * The following defines specify the default number of Shared Receive Queues
50 * (SRQ) and their maximum size.  Settings exist for the supported DDR DIMM
51 * sizes of 128MB and 256MB.  If a DIMM greater than 256 is found, then the
52 * 256MB profile is used.  See tavor_cfg.c for more discussion on config
53 * profiles.
54 *
55 * For manual configuration (not using config profiles), these values are
56 * controllable through the "tavor_log_max_srq_sz" and "tavor_log_num_srq"
57 * configuration variables, respectively. To override config profile settings
58 * the 'tavor_alt_config_enable' configuration variable must first be set.
59 *
60 * Note: We also have a define for the minimum size of a SRQ.  SRQs allocated
61 * with size 0, 1, 2, or 3 will always get back a SRQ of size 4.  This is the
62 * smallest size that Tavor hardware and software can correctly handle.
63 */
64#define	TAVOR_NUM_SRQ_SHIFT_128		0x0A
65#define	TAVOR_NUM_SRQ_SHIFT_256		0x0A
66#define	TAVOR_SRQ_SZ_SHIFT		0x10
67#define	TAVOR_SRQ_SZ			(1 << TAVOR_SRQ_SZ_SHIFT)
68#define	TAVOR_SRQ_MIN_SIZE		0x4
69
70/*
71 * Minimal configuration values.
72 */
73#define	TAVOR_NUM_SRQ_SHIFT_MIN		0x8
74#define	TAVOR_SRQ_SZ_SHIFT_MIN		0x9
75
76/*
77 * XXX The tavor firmware currently has difficulty with an SRQ using more than
78 * 15 SGL per WQE (ie: WQE size is 512 or greater).  With a WQE size of 256
79 * (SGL 15 or less) no problems are seen.  We set SRQ_MAX_SGL size here, for
80 * use in the config profile to be 0xF.  This can still be overridden with the
81 * patchable variable in the config profile.
82 */
83#define	TAVOR_SRQ_MAX_SGL		0xF
84
85/*
86 * The following macro determines whether the contents of SRQ memory (WQEs)
87 * need to be sync'd (with ddi_dma_sync()).  This decision is based on whether
88 * the SRQ memory is in DDR memory (no sync) or system memory (sync required).
89 * And it also supports the possibility that if a SRQ in system memory is
90 * mapped DDI_DMA_CONSISTENT, it can be configured to not be sync'd because
91 * of the "sync override" parameter in the config profile.
92 */
93#define	TAVOR_SRQ_IS_SYNC_REQ(state, wqinfo)				\
94	((((((state)->ts_cfg_profile->cp_streaming_consistent) &&	\
95	((state)->ts_cfg_profile->cp_consistent_syncoverride))) ||	\
96	((wqinfo).qa_location == TAVOR_QUEUE_LOCATION_INDDR))		\
97	? 0 : 1)
98
99/*
100 * The following defines specify the size of the individual Shared Receive Queue
101 * Context (SRQC) entries
102 */
103#define	TAVOR_SRQC_SIZE_SHIFT		0x5
104#define	TAVOR_SRQC_SIZE			(1 << TAVOR_SRQC_SIZE_SHIFT)
105
106/*
107 * SRQ States as defined by Tavor.
108 */
109#define	TAVOR_SRQ_STATE_SW_OWNER	0xF
110#define	TAVOR_SRQ_STATE_HW_OWNER	0x0
111#define	TAVOR_SRQ_STATE_ERROR		0x1
112
113/*
114 * The tavor_sw_srq_s structure is also referred to using the "tavor_srqhdl_t"
115 * typedef (see tavor_typedef.h).  It encodes all the information necessary
116 * to track the various resources needed to allocate, initialize, query, modify,
117 * post, and (later) free a shared receive queue (SRQ).
118 */
119struct tavor_sw_srq_s {
120	kmutex_t		srq_lock;
121	tavor_pdhdl_t		srq_pdhdl;
122	tavor_mrhdl_t		srq_mrhdl;
123	uint_t			srq_srqnum;
124	uint_t			srq_wr_limit;
125	uint_t			srq_sync;
126	uint_t			srq_refcnt;
127	uint_t			srq_state;
128	uint32_t		srq_uarpg;
129	devmap_cookie_t		srq_umap_dhp;
130	ibt_srq_sizes_t		srq_real_sizes;
131	tavor_rsrc_t		*srq_srqcrsrcp;
132	tavor_rsrc_t		*srq_rsrcp;
133	uint_t			srq_is_umap;
134	void			*srq_hdlrarg;
135
136	/* Work Queue */
137	int			srq_wq_lastwqeindx;
138	tavor_workq_hdr_t	*srq_wq_wqhdr;
139	uint32_t		*srq_wq_buf;
140	uint32_t		srq_wq_bufsz;
141	uint32_t		srq_wq_log_wqesz;
142	uint32_t		srq_wq_sgl;
143
144	/* For Work Request ID processing */
145	tavor_wq_lock_t		*srq_wrid_wql;
146	tavor_wrid_list_hdr_t	*srq_wridlist;
147
148	/* For zero-based */
149	uint64_t		srq_desc_off;
150
151	/* Queue Memory for SRQ */
152	struct tavor_qalloc_info_s	srq_wqinfo;
153};
154_NOTE(READ_ONLY_DATA(tavor_sw_srq_s::srq_pdhdl
155    tavor_sw_srq_s::srq_mrhdl
156    tavor_sw_srq_s::srq_srqnum
157    tavor_sw_srq_s::srq_wq_sgl
158    tavor_sw_srq_s::srq_sync
159    tavor_sw_srq_s::srq_srqcrsrcp
160    tavor_sw_srq_s::srq_rsrcp
161    tavor_sw_srq_s::srq_hdlrarg
162    tavor_sw_srq_s::srq_is_umap
163    tavor_sw_srq_s::srq_uarpg))
164_NOTE(DATA_READABLE_WITHOUT_LOCK(tavor_sw_srq_s::srq_wq_bufsz
165    tavor_sw_srq_s::srq_wqinfo
166    tavor_sw_srq_s::srq_wq_buf
167    tavor_sw_srq_s::srq_desc_off
168    tavor_sw_srq_s::srq_wrid_wql))
169_NOTE(MUTEX_PROTECTS_DATA(tavor_sw_srq_s::srq_lock,
170    tavor_sw_srq_s::srq_wq_wqhdr
171    tavor_sw_srq_s::srq_wq_lastwqeindx
172    tavor_sw_srq_s::srq_wridlist
173    tavor_sw_srq_s::srq_wr_limit
174    tavor_sw_srq_s::srq_real_sizes
175    tavor_sw_srq_s::srq_umap_dhp))
176
177/*
178 * The tavor_srq_info_t structure is used internally by the Tavor driver to
179 * pass information to and from the tavor_srq_alloc() routine.  It contains
180 * placeholders for all of the potential inputs and outputs that this routine
181 * can take.
182 */
183typedef struct tavor_srq_info_s {
184	tavor_pdhdl_t		srqi_pd;
185	ibt_srq_hdl_t		srqi_ibt_srqhdl;
186	ibt_srq_sizes_t		*srqi_sizes;
187	ibt_srq_sizes_t		*srqi_real_sizes;
188	tavor_srqhdl_t		*srqi_srqhdl;
189	uint_t			srqi_flags;
190} tavor_srq_info_t;
191
192/*
193 * The tavor_srq_options_t structure is used in the Tavor SRQ allocation
194 * routines to provide additional option functionality.  When a NULL pointer
195 * is passed in place of a pointer to this struct, it is a way of specifying
196 * the "default" behavior.  Using this structure, however, is a way of
197 * controlling any extended behavior.
198 *
199 * Currently, the only defined "extended" behavior is for specifying whether
200 * a given SRQ's work queues should be allocated from kernel system memory
201 * (TAVOR_QUEUE_LOCATION_NORMAL) or should be allocated from local DDR memory
202 * (TAVOR_QUEUE_LOCATION_INDDR).  This defaults today to always allocating
203 * from kernel system memory but can be changed by using the
204 * "tavor_srq_wq_inddr" configuration variable.
205 */
206typedef struct tavor_srq_options_s {
207	uint_t			srqo_wq_loc;
208} tavor_srq_options_t;
209
210int tavor_srq_alloc(tavor_state_t *state, tavor_srq_info_t *srqinfo,
211    uint_t sleepflag, tavor_srq_options_t *op);
212int tavor_srq_free(tavor_state_t *state, tavor_srqhdl_t *srqhdl,
213    uint_t sleepflag);
214int tavor_srq_modify(tavor_state_t *state, tavor_srqhdl_t srq,
215    uint_t size, uint_t *real_size, uint_t sleepflag);
216int tavor_srq_post(tavor_state_t *state, tavor_srqhdl_t srq,
217    ibt_recv_wr_t *wr_p, uint_t num_wr, uint_t *num_posted);
218void tavor_srq_refcnt_inc(tavor_srqhdl_t srq);
219void tavor_srq_refcnt_dec(tavor_srqhdl_t srq);
220tavor_srqhdl_t tavor_srqhdl_from_srqnum(tavor_state_t *state, uint_t srqnum);
221
222#ifdef __cplusplus
223}
224#endif
225
226#endif	/* _SYS_IB_ADAPTERS_TAVOR_SRQ_H */
227