hermon_misc.h revision 9517:b4839b0aa7a4
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef	_SYS_IB_ADAPTERS_HERMON_MISC_H
28#define	_SYS_IB_ADAPTERS_HERMON_MISC_H
29
30/*
31 * hermon_misc.h
32 *    Contains all of the prototypes, #defines, and structures necessary
33 *    for the Hermon Miscellaneous routines - Address Handle, Multicast,
34 *    Protection Domain, port-related, statistics (kstat) routines, and
35 *    extra VTS related routines.
36 *    Many of these functions are called by other parts of the Hermon driver
37 *    (and several routines are directly exposed through the IBTF CI
38 *    interface and/or kstat interface).
39 */
40
41#include <sys/types.h>
42#include <sys/conf.h>
43#include <sys/ddi.h>
44#include <sys/sunddi.h>
45
46#include <sys/ib/adapters/hermon/hermon_typedef.h>
47#include <sys/ib/adapters/hermon/hermon_ioctl.h>
48#include <sys/ib/adapters/hermon/hermon_rsrc.h>
49#include <sys/ib/adapters/hermon/hermon_hw.h>
50
51
52#ifdef __cplusplus
53extern "C" {
54#endif
55
56/*
57 * The following defines specify the default number of Address Handles (AH)
58 * and their size (in the hardware).  By default the maximum number of address
59 * handles is set to 32K.  This value is controllable through the
60 * "hermon_log_num_ah" configuration variable.  Note:  Hermon Address Handles
61 * are also referred to as UD Address Vectors (UDAV).
62 */
63#define	HERMON_NUM_AH_SHIFT		0xF
64#define	HERMON_NUM_AH			(1 << HERMON_NUM_AH_SHIFT)
65#define	HERMON_UDAV_SIZE_SHIFT		0x5
66#define	HERMON_UDAV_SIZE			(1 << HERMON_UDAV_SIZE_SHIFT)
67
68/*
69 * The following macro determines whether the contents of a UDAV need to be
70 * sync'd (with ddi_dma_sync()).  This decision is based on whether the
71 * UDAV is in DDR memory (no sync) or system memory (sync required).
72 */
73
74#define	HERMON_UDAV_IS_SYNC_REQ(state)					\
75	(((&((state)->ts_rsrc_hdl[HERMON_UDAV]))->rsrc_loc ==		\
76	HERMON_IN_DDR) ? 0 : 1)
77
78/*
79 * These defines are used by hermon_get_addr_path() and hermon_set_addr_path()
80 * below.  They indicate the type of hardware context being passed in the
81 * "path" argument.  Because the Hermon hardware formats for the QP address
82 * path and UDAV address path structures is so similar, but not exactly the
83 * same, we use these flags to indicate which type of structure is being
84 * read from or written to.
85 */
86#define	HERMON_ADDRPATH_QP		0x0
87#define	HERMON_ADDRPATH_UDAV		0x1
88
89/*
90 * The following defines specify the default number of Multicast Groups (MCG)
91 * and the maximum number of QP which can be associated with each.  By default
92 * the maximum number of multicast groups is set to 256, and the maximum number
93 * of QP per multicast group is set to 8.  These values are controllable
94 * through the "hermon_log_num_mcg" and "hermon_num_qp_per_mcg" configuration
95 * variables.
96 * We also define a macro below that is used to determine the size of each
97 * individual MCG entry (in hardware) based on the number of QP to be
98 * supported per multicast group.
99 */
100
101
102#define	HERMON_NUM_MCG_SHIFT		0x8
103#define	HERMON_NUM_QP_PER_MCG		8
104#define	HERMON_MCG_SIZE_SHIFT		0x6
105#define	HERMON_MCG_SIZE			(1 << HERMON_MCG_SIZE_SHIFT)
106
107
108/*
109 * Macro to compute the offset of the QP list in a given MCG entry.
110 */
111#define	HERMON_MCGMEM_SZ(state)						\
112	((((state)->hs_cfg_profile->cp_num_qp_per_mcg) + 8) << 2)
113#define	HERMON_MCG_GET_QPLIST_PTR(mcg)					\
114	((hermon_hw_mcg_qp_list_t *)((uintptr_t)(mcg) +			\
115	sizeof (hermon_hw_mcg_t)))
116
117/*
118 * The following defines specify the characteristics of the Hermon multicast
119 * group hash table.  The HERMON_NUM_MCG_HASH_SHIFT defines the size of the
120 * hash table (as a power-of-2), which is set to 16 by default.  This value
121 * is controllable through the "hermon_log_num_mcg_hash" configuration variable,
122 * but serious consideration should be taken before changing this value.  Note:
123 * its appropriate size should be a function of the entire table size (as
124 * defined by "hermon_log_num_mcg" and HERMON_NUM_MCG_SHIFT above).
125 */
126#define	HERMON_NUM_MCG_HASH_SHIFT	0x4
127
128/*
129 * The following defines are used by the multicast routines to determine
130 * if a given "multicast GID" is valid or not (see hermon_mcg_is_mgid_valid
131 * for more details.  These values are pulled from the IBA specification,
132 * rev. 1.1
133 */
134#define	HERMON_MCG_TOPBITS_SHIFT	56
135#define	HERMON_MCG_TOPBITS_MASK		0xFF
136#define	HERMON_MCG_TOPBITS		0xFF
137
138#define	HERMON_MCG_FLAGS_SHIFT		52
139#define	HERMON_MCG_FLAGS_MASK		0xF
140#define	HERMON_MCG_FLAGS_PERM		0x0
141#define	HERMON_MCG_FLAGS_NONPERM	0x1
142
143#define	HERMON_MCG_SCOPE_SHIFT		48
144#define	HERMON_MCG_SCOPE_MASK		0xF
145#define	HERMON_MCG_SCOPE_LINKLOC	0x2
146#define	HERMON_MCG_SCOPE_SITELOC	0x5
147#define	HERMON_MCG_SCOPE_ORGLOC		0x8
148#define	HERMON_MCG_SCOPE_GLOBAL		0xE
149
150
151/*
152 * The following defines specify the default number of Protection Domains (PD).
153 * By default the maximum number of protection domains is set to 64K.  This
154 * value is controllable through the "hermon_log_num_pd" configuration variable.
155 */
156#define	HERMON_NUM_PD_SHIFT		0x10
157
158/*
159 * The following defines specify the default number of Partition Keys (PKey)
160 * per port.  By default the maximum number of PKeys is set to 32 per port, for
161 * a total of 64 (assuming two ports) .  This value is controllable through the
162 * "hermon_log_max_pkeytbl" configuration variable.
163 */
164#define	HERMON_NUM_PKEYTBL_SHIFT		0x5
165#define	HERMON_NUM_PKEYTBL		(1 << HERMON_NUM_PKEYTBL_SHIFT)
166
167/*
168 * The following defines specify the default number of SGIDs per port.  By
169 * default the maximum number of GIDS per port is set to 16.  This value
170 * is controllable through the "hermon_log_max_gidtbl" configuration variable.
171 */
172#define	HERMON_NUM_GIDTBL_SHIFT		0x4
173#define	HERMON_NUM_GIDTBL		(1 << HERMON_NUM_GIDTBL_SHIFT)
174
175/*
176 * Below is a define which is the default number of UAR pages.  By default, the
177 * maximum number of UAR pages is set to 1024 for hermon.  Note that
178 * BlueFlame (if enabled) will  take 1/2 the space behind BAR1 (the UAR BAR)
179 * and therefore we must limit this even further.  This value is controllable
180 * through the "hermon_log_num_uar" configuration variable. NOTE: This value
181 * should not be set larger than 15 (0xF) because the UAR index number is
182 * used as part of the minor number calculation (see hermon_open() for details)
183 * and the minor numbers should not be larger than eighteen bits (i.e. 15 bits
184 * of UAR index, 3 bits of driver instance number).  This is especially true
185 * for 32-bit kernels.
186 */
187
188
189#define	HERMON_NUM_UAR_SHIFT		0xA
190
191/*
192 * A DoorBell record (DBr) will be handled uniquely.  They are not in ICM now,
193 * so they don't need the mapping.  And they just need to be accessible to the
194 * HCA as an address, so we don't need to register the memory.  AND, since
195 * user level (uDAPL, OPEN verbs) won't ever do the unmapping of them we don't
196 * really need to worry about that either.  And the DBrs will have to live in
197 * user mappable memory.  So, we can shortcut a lot of things given these
198 * assumptions.
199 *
200 * Other facts:  the DBrs for Hermon are only two per qp - one for the Receive
201 * side (RQ or SRQ) and one for the CQ.  If a QP is associated with an SRQ, we
202 * only need the ONE for the SRQ.  Also, although the RQ/SRQ DBr is only 4-bytes
203 * while the CQ DBr is 8-bytes, all DBrs will be 8-bytes (see the union below).
204 * Though it may lead to minor wastage, it also means that reuse is easier since
205 * any DBr can be used for either, and we don't have to play allocation games.
206 *
207 * The structure of a page of DBrs looks like this:
208 *
209 *         ------------------------------
210 *         |                            |
211 *         |                            |
212 *         |      HEADER structure      |
213 *         |                            |
214 *         |----------------------------|
215 *         |                            |
216 *         |                            |
217 *         |                            |
218 *         |           DBrs             |  ((PAGESIZE >> 3) - 4) DBrs / page
219 *         |                            |
220 *         |                            |
221 *         |                            |
222 *         |                            |
223 *         |                            |
224 *         |----------------------------|
225 *
226 *
227 * The state structure will hold the pointer to the start of a list of pages
228 * containing DBr's.  As you allocate each page you also allocate a dbr_into
229 * structure, that contains the access information about the page, to minimize
230 * what needs to be in the page itself - what's there is just what's needed
231 * to step through at alloc time
232 */
233
234typedef uint64_t hermon_dbr_t;
235
236typedef struct hermon_dbr_info_s {
237	caddr_t			dbr_page;	/* addr of page */
238	uint64_t		dbr_paddr;	/* paddr of page for HCA */
239	ddi_acc_handle_t	dbr_acchdl;
240	ddi_dma_handle_t	dbr_dmahdl;
241	ddi_umem_cookie_t	dbr_umemcookie;
242} hermon_dbr_info_t;
243
244typedef struct hermon_dbr_header_s {
245	struct hermon_dbr_header_s *next; /* next page in chain */
246					/* (zero means last) */
247	hermon_dbr_info_t *dbr_info;	/* info structure for this page */
248	uint32_t	nfree;		/* #free DBrs in this page */
249	uint32_t	firstfree;	/* idx of first free DBr in this page */
250	hermon_dbr_t	dbr[1];		/* rest ot he page is the DBrs */
251} hermon_dbr_header_t;
252
253#define	HERMON_DBR_HEADER_LEN	/* size in QUADWORDS/DBRs */ \
254	((sizeof (hermon_dbr_header_t) / sizeof (hermon_dbr_t)) - 1)
255
256#define	HERMON_NUM_DBR_PER_PAGE	((PAGESIZE >> 3) - HERMON_DBR_HEADER_LEN)
257
258
259/*
260 * These defines specify some miscellaneous port-related configuration
261 * information.  Specifically, HERMON_MAX_MTU is used to define the maximum
262 * MTU supported for each Hermon port, HERMON_MAX_PORT_WIDTH is used to define
263 * the maximum supported port width, and the HERMON_MAX_VLCAP define is used
264 * to specify the maximum number of VLs supported, excluding VL15.  Both
265 * of these values are controllable and get be set using the "hermon_max_mtu"
266 * and "hermon_max_vlcap" configuration variables.  Note: as with many of the
267 * configurable variables, caution should be exercised when changing these
268 * values.  These values, specifically, should not be set any larger than
269 * they are defined here as these are set to the current Hermon device
270 * maximums.
271 *
272 * Note that:  with Hermon, these capabilities that were formerly retrieved
273 * 	as part of QUERY_DEV_LIM/CAP must now be retrieved with QUERY_PORT.
274 *	The init sequence will have to be altered vis-a-vis the older HCAs to
275 *	accommodate this change.
276 *
277 *	Also, the maximums will be changed here for now.
278 */
279#define	HERMON_MAX_MTU		0x5 /* was 0x4, 2048 but moved to 4096 */
280#define	HERMON_MAX_PORT_WIDTH	0x7 /* was 0x3 (1x/4x) but now 1/4/8x */
281#define	HERMON_MAX_VLCAP	0x8 /* remain the same for now */
282
283/*
284 * These last defines are used by the statistics counting routines (kstats)
285 * for initialization of the structures associated with the IB statistics
286 * access routines.  The HERMON_CNTR_MASK and HERMON_CNTR_SIZE defines are
287 * used to divide the "pcr" register into two 32-bit counters (one for "pic0"
288 * and the other for "pic1")
289 */
290#define	HERMON_CNTR_MASK		0xFFFFFFFF
291#define	HERMON_CNTR_SIZE		32
292#define	HERMON_CNTR_NUMENTRIES	17
293
294
295
296#define	HERMON_QUEUE_LOCATION_NORMAL	0x1
297#define	HERMON_QUEUE_LOCATION_USERLAND	0x2
298
299/*
300 * Minimum number of ticks to delay between successive polls of the CQ in
301 * VTS ioctl loopback test
302 */
303#define	HERMON_VTS_LOOPBACK_MIN_WAIT_DUR	50
304
305/*
306 * UAR software table, layout and associated structures
307 */
308
309/*
310 * Doorbell record table bitmap macros
311 */
312#define	HERMON_IND_BYTE(ind)		((ind) >> 3)
313#define	HERMON_IND_BIT(ind)		(1 << ((ind) & 0x7))
314
315#define	HERMON_BMAP_BIT_SET(bmap, ind)	\
316	((bmap)[HERMON_IND_BYTE(ind)] |= HERMON_IND_BIT(ind))
317#define	HERMON_BMAP_BIT_CLR(bmap, ind)	\
318	((bmap)[HERMON_IND_BYTE(ind)] &= ~HERMON_IND_BIT(ind))
319#define	HERMON_BMAP_BIT_ISSET(bmap, ind)	\
320	((bmap)[HERMON_IND_BYTE(ind)] & HERMON_IND_BIT(ind))
321
322
323/*
324 * User doorbell record page tracking
325 */
326typedef struct hermon_udbr_page_s hermon_udbr_page_t;
327
328struct hermon_udbr_page_s {
329	hermon_udbr_page_t	*upg_link;
330	uint_t			upg_index;
331	uint_t			upg_nfree;
332	uint_t			upg_firstfree;
333	caddr_t			upg_kvaddr;
334	struct buf		*upg_buf;
335	ddi_umem_cookie_t	upg_umemcookie;
336	ddi_dma_handle_t	upg_dmahdl;
337	ddi_dma_cookie_t 	upg_dmacookie;
338};
339
340typedef struct hermon_udbr_mgmt_s hermon_user_dbr_t;
341
342struct hermon_udbr_mgmt_s {
343	hermon_user_dbr_t	*udbr_link;
344	uint_t			udbr_index;	/* same as uarpg */
345	hermon_udbr_page_t	*udbr_pagep;
346};
347
348
349/*
350 * doorbell tracking end
351 */
352
353/*
354 * The hermon_sw_ah_s structure is also referred to using the "hermon_ahhdl_t"
355 * typedef (see hermon_typedef.h).  It encodes all the information necessary
356 * to track the various resources needed to allocate, query, modify, and
357 * free an address handle.
358 *
359 * In specific, it has a lock to ensure single-threaded access. It stores a
360 * pointer to the associated PD handle, and also contains a copy of the
361 * GUID stored into the address handle.  The reason for this extra copy of
362 * the GUID info has to do with Hermon PRM compliance and is fully explained
363 * in hermon_misc.c
364 *
365 * To serve in it's primary function, it also contains a UDAV, which contains
366 * all of the data associated with the UD address vector that is being
367 * utilized by the holder of the address handle. The hardware-specific format
368 * of the UDAV is defined in the hermon_hw.h file.
369 *
370 * It also has the always necessary backpointer to the resource for the AH
371 * handle structure itself.
372 */
373struct hermon_sw_ah_s {
374	kmutex_t	ah_lock;
375	hermon_pdhdl_t	ah_pdhdl;
376	hermon_hw_udav_t *ah_udav;
377	hermon_rsrc_t	*ah_rsrcp;
378	uint64_t	ah_save_guid;
379};
380_NOTE(READ_ONLY_DATA(hermon_sw_ah_s::ah_udav))
381_NOTE(MUTEX_PROTECTS_DATA(hermon_sw_ah_s::ah_lock,
382    hermon_sw_ah_s::ah_pdhdl
383    hermon_sw_ah_s::ah_rsrcp
384    hermon_sw_ah_s::ah_save_guid))
385
386/*
387 * The hermon_sw_mcg_list_s structure is also referred to using the
388 * "hermon_mcghdl_t" typedef (see hermon_typedef.h).  It encodes all the
389 * information necessary to track the various resources needed to for attaching
390 * and detaching QP from multicast groups.
391 *
392 * The Hermon driver keeps an array of these and uses them as a shadow for
393 * the real HW-based MCG table.  They hold all the necessary information
394 * to track the resources and to allow fast access to the MCG table.  First,
395 * it had a 128-bit multicast GID (stored in "mcg_mgid_h" and "mcg_mgid_l".
396 * next if has a field to indicate the index of the next hermon_mcghdl_t in
397 * the current hash chain (zero is the end of the chain).  Note: this very
398 * closely mimics what the hardware MCG entry has. Then it has a field to
399 * indicate how many QP are currently attached to the given MCG.  And, lastly,
400 * it has the obligatory backpointer to the resource for the MCH handle
401 * structure itself.
402 */
403struct hermon_sw_mcg_list_s {
404	uint64_t	mcg_mgid_h;
405	uint64_t	mcg_mgid_l;
406	uint_t		mcg_next_indx;
407	uint_t		mcg_num_qps;
408	hermon_rsrc_t	*mcg_rsrcp;
409};
410
411/*
412 * The hermon_sw_pd_s structure is also referred to using the "hermon_pdhdl_t"
413 * typedef (see hermon_typedef.h).  It encodes all the information necessary
414 * to track the various resources needed to allocate and free protection
415 * domains
416 *
417 * Specifically, it has reference count and a lock to ensure single threaded
418 * access to it.  It has a field for the protection domain number ("pd_pdnum").
419 * And it also has the obligatory backpointer to the resource for the PD
420 * handle structure itself.
421 */
422struct hermon_sw_pd_s {
423	kmutex_t	pd_lock;
424	uint32_t	pd_pdnum;
425	uint32_t	pd_refcnt;
426	hermon_rsrc_t	*pd_rsrcp;
427};
428_NOTE(READ_ONLY_DATA(hermon_sw_pd_s::pd_pdnum
429    hermon_sw_pd_s::pd_rsrcp))
430_NOTE(MUTEX_PROTECTS_DATA(hermon_sw_pd_s::pd_lock,
431    hermon_sw_pd_s::pd_refcnt))
432
433/*
434 * The hermon_qalloc_info_s structure is also referred to using the
435 * "hermon_qalloc_info_t" typedef (see hermon_typedef.h).  It holds all the
436 * information necessary to track the resources for each of the various Hermon
437 * queue types (i.e. Event Queue, Completion Queue, Work Queue).
438 *
439 * Specifically, it has the size, alignment restrictions, and location (in DDR
440 * or in system memory).  And depending on the location, it also has the
441 * ddi_dma_handle_t, ddi_acc_handle_t, and pointers used for reading/writing to
442 * the queue's memory.
443 */
444struct hermon_qalloc_info_s {
445	uint64_t		qa_size;
446	uint64_t		qa_alloc_align;
447	uint64_t		qa_bind_align;
448	uint32_t		*qa_buf_real;
449	uint32_t		*qa_buf_aligned;
450	uint64_t		qa_buf_realsz;
451	uint_t			qa_pgoffs;
452	uint_t			qa_location;
453	ddi_dma_handle_t	qa_dmahdl;
454	ddi_acc_handle_t	qa_acchdl;
455	ddi_umem_cookie_t	qa_umemcookie;
456};
457
458/*
459 * The hermon_ks_mask_t structure encodes all the information necessary for
460 * the individual kstat entries.  The "ks_reg_offset" field contains the
461 * hardware offset for the corresponding counter, and "ks_reg_shift" and
462 * "ks_reg_mask" contain shift and mask registers used by the access routines.
463 * Also the "ks_old_pic0" and "ks_old_pic1" fields contain the most recently
464 * read value for the corresponding port ("pic").  Note:  An array of these
465 * structures is part of the "hermon_ks_info_t" structure below.
466 */
467typedef struct hermon_ks_mask_s {
468	char		*ks_evt_name;
469	uint32_t	ks_old_pic0;
470	uint32_t	ks_old_pic1;
471} hermon_ks_mask_t;
472
473/*
474 * The hermon_ks_info_t structure stores all the information necessary for
475 * tracking the resources associated with each of the various kstats.  In
476 * addition to containing pointers to each of the counter and pic kstats,
477 * this structure also contains "hki_pcr" which is the control register that
478 * determines which of the countable entries (from the "hki_ib_perfcnt[]"
479 * array) is being currently accessed.
480 */
481typedef struct hermon_ks_info_s {
482	struct kstat	*hki_cntr_ksp;
483	struct kstat	*hki_picN_ksp[HERMON_MAX_PORTS];
484	uint64_t	hki_pcr;
485	uint64_t	hki_pic0;
486	uint64_t	hki_pic1;
487	hermon_ks_mask_t	hki_ib_perfcnt[HERMON_CNTR_NUMENTRIES];
488} hermon_ks_info_t;
489
490/*
491 * The hermon_ports_ioctl32_t, hermon_loopback_ioctl32_t, and
492 * hermon_flash_ioctl32_s structures are used internally by the Hermon
493 * driver to accomodate 32-bit applications which need to access the
494 * Hermon ioctls.  They are 32-bit versions of externally available
495 * structures defined in hermon_ioctl.h
496 */
497typedef struct hermon_ports_ioctl32_s {
498	uint_t			ap_revision;
499	caddr32_t		ap_ports;
500	uint8_t			ap_num_ports;
501} hermon_ports_ioctl32_t;
502
503typedef struct hermon_loopback_ioctl32_s {
504	uint_t			alb_revision;
505	caddr32_t		alb_send_buf;
506	caddr32_t		alb_fail_buf;
507	uint_t			alb_buf_sz;
508	uint_t			alb_num_iter;
509	uint_t			alb_pass_done;
510	uint_t			alb_timeout;
511	hermon_loopback_error_t	alb_error_type;
512	uint8_t			alb_port_num;
513	uint8_t			alb_num_retry;
514} hermon_loopback_ioctl32_t;
515
516typedef struct hermon_flash_ioctl32_s {
517	uint32_t	af_type;
518	caddr32_t	af_sector;
519	uint32_t	af_sector_num;
520	uint32_t	af_addr;
521	uint32_t	af_quadlet;
522	uint8_t		af_byte;
523} hermon_flash_ioctl32_t;
524
525/*
526 * The hermon_loopback_comm_t and hermon_loopback_state_t structures below
527 * are used to store all of the relevant state information needed to keep
528 * track of a single VTS ioctl loopback test run.
529 */
530typedef struct hermon_loopback_comm_s {
531	uint8_t			*hlc_buf;
532	size_t			hlc_buf_sz;
533	ibt_mr_desc_t		hlc_mrdesc;
534
535	hermon_mrhdl_t		hlc_mrhdl;
536	hermon_cqhdl_t		hlc_cqhdl[2];
537	hermon_qphdl_t		hlc_qp_hdl;
538
539	ibt_mr_attr_t		hlc_memattr;
540	uint_t			hlc_qp_num;
541	ibt_cq_attr_t		hlc_cq_attr;
542	ibt_qp_alloc_attr_t	hlc_qp_attr;
543	ibt_chan_sizes_t	hlc_chan_sizes;
544	ibt_qp_info_t		hlc_qp_info;
545	ibt_queue_sizes_t	hlc_queue_sizes;
546	ibt_send_wr_t		hlc_wr;
547	ibt_wr_ds_t		hlc_sgl;
548	ibt_wc_t		hlc_wc;
549	uint_t			hlc_num_polled;
550	ibt_status_t		hlc_status;
551	int			hlc_complete;
552	int			hlc_wrid;
553} hermon_loopback_comm_t;
554
555typedef struct hermon_loopback_state_s {
556	uint8_t			hls_port;
557	uint_t			hls_lid;
558	uint8_t			hls_retry;
559	hermon_state_t		*hls_state;
560	ibc_hca_hdl_t		hls_hca_hdl;
561	hermon_pdhdl_t		hls_pd_hdl;
562	hermon_loopback_comm_t	hls_tx;
563	hermon_loopback_comm_t	hls_rx;
564	ibt_status_t		hls_status;
565	int			hls_err;
566	int			hls_pkey_ix;
567	int			hls_timeout;
568} hermon_loopback_state_t;
569
570/*
571 * Mellanox FMR
572 */
573typedef struct hermon_fmr_list_s {
574	avl_node_t			fmr_avlnode;
575	struct hermon_fmr_list_s		*fmr_next;
576
577	hermon_mrhdl_t			fmr;
578	ibt_pmr_desc_t			fmr_desc;
579	hermon_fmrhdl_t			fmr_pool;
580	uint_t				fmr_refcnt;
581	uint_t				fmr_remaps;
582	uint_t				fmr_in_cache;
583} hermon_fmr_list_t;
584
585struct hermon_sw_fmr_s {
586	hermon_state_t			*fmr_state;
587
588	kmutex_t			fmr_lock;
589	ddi_taskq_t			*fmr_taskq;
590
591	ibt_fmr_flush_handler_t		fmr_flush_function;
592	void				*fmr_flush_arg;
593
594	int				fmr_pool_size;
595	int				fmr_max_pages;
596	int				fmr_page_sz;
597	int				fmr_dirty_watermark;
598	int				fmr_dirty_len;
599	int				fmr_flags;
600
601	hermon_fmr_list_t		*fmr_free_list;
602	hermon_fmr_list_t		*fmr_dirty_list;
603
604	int				fmr_cache;
605	avl_tree_t			fmr_cache_avl;
606	kmutex_t			fmr_cachelock;
607};
608_NOTE(MUTEX_PROTECTS_DATA(hermon_sw_fmr_s::fmr_lock,
609    hermon_sw_fmr_s::fmr_state
610    hermon_sw_fmr_s::fmr_pool_size
611    hermon_sw_fmr_s::fmr_max_pages
612    hermon_sw_fmr_s::fmr_page_sz
613    hermon_sw_fmr_s::fmr_dirty_watermark
614    hermon_sw_fmr_s::fmr_dirty_len
615    hermon_sw_fmr_s::fmr_flags
616    hermon_sw_fmr_s::fmr_free_list
617    hermon_sw_fmr_s::fmr_dirty_list
618    hermon_sw_fmr_s::fmr_cache))
619
620_NOTE(MUTEX_PROTECTS_DATA(hermon_sw_fmr_s::fmr_cachelock,
621    hermon_sw_fmr_s::fmr_cache_avl))
622
623#define	HERMON_FMR_MAX_REMAPS		32
624
625/* Hermon doorbell record routines */
626
627int hermon_dbr_page_alloc(hermon_state_t *state, hermon_dbr_info_t **info);
628int hermon_dbr_alloc(hermon_state_t *state, uint_t index,
629    ddi_acc_handle_t *acchdl, hermon_dbr_t **vdbr, uint64_t *pdbr,
630    uint64_t *mapoffset);
631void hermon_dbr_free(hermon_state_t *state, uint_t indx, hermon_dbr_t *record);
632void hermon_dbr_kern_free(hermon_state_t *state);
633
634/* Hermon Fast Memory Registration Routines */
635int hermon_create_fmr_pool(hermon_state_t *state, hermon_pdhdl_t pdhdl,
636    ibt_fmr_pool_attr_t *params, hermon_fmrhdl_t *fmrhdl);
637int hermon_destroy_fmr_pool(hermon_state_t *state, hermon_fmrhdl_t fmrhdl);
638int hermon_flush_fmr_pool(hermon_state_t *state, hermon_fmrhdl_t fmrhdl);
639int hermon_register_physical_fmr(hermon_state_t *state, hermon_fmrhdl_t fmrhdl,
640    ibt_pmr_attr_t *mem_pattr_p, hermon_mrhdl_t *mrhdl,
641    ibt_pmr_desc_t *mem_desc_p);
642int hermon_deregister_fmr(hermon_state_t *state, hermon_mrhdl_t mr);
643
644
645/* Hermon Address Handle routines */
646int hermon_ah_alloc(hermon_state_t *state, hermon_pdhdl_t pd,
647    ibt_adds_vect_t *attr_p, hermon_ahhdl_t *ahhdl, uint_t sleepflag);
648int hermon_ah_free(hermon_state_t *state, hermon_ahhdl_t *ahhdl,
649    uint_t sleepflag);
650int hermon_ah_query(hermon_state_t *state, hermon_ahhdl_t ahhdl,
651    hermon_pdhdl_t *pdhdl, ibt_adds_vect_t *attr_p);
652int hermon_ah_modify(hermon_state_t *state, hermon_ahhdl_t ahhdl,
653    ibt_adds_vect_t *attr_p);
654
655/* Hermon Multicast Group routines */
656int hermon_mcg_attach(hermon_state_t *state, hermon_qphdl_t qphdl, ib_gid_t gid,
657    ib_lid_t lid);
658int hermon_mcg_detach(hermon_state_t *state, hermon_qphdl_t qphdl, ib_gid_t gid,
659    ib_lid_t lid);
660
661/* Hermon Protection Domain routines */
662int hermon_pd_alloc(hermon_state_t *state, hermon_pdhdl_t *pdhdl,
663    uint_t sleepflag);
664int hermon_pd_free(hermon_state_t *state, hermon_pdhdl_t *pdhdl);
665void hermon_pd_refcnt_inc(hermon_pdhdl_t pd);
666void hermon_pd_refcnt_dec(hermon_pdhdl_t pd);
667
668/* Hermon port-related routines */
669int hermon_port_query(hermon_state_t *state, uint_t port,
670    ibt_hca_portinfo_t *pi);
671int hermon_port_modify(hermon_state_t *state, uint8_t port,
672    ibt_port_modify_flags_t flags, uint8_t init_type);
673
674/* Hermon statistics (kstat) routines */
675int hermon_kstat_init(hermon_state_t *state);
676void hermon_kstat_fini(hermon_state_t *state);
677
678/* Miscellaneous routines */
679int hermon_set_addr_path(hermon_state_t *state, ibt_adds_vect_t *av,
680    hermon_hw_addr_path_t *path, uint_t type);
681void hermon_get_addr_path(hermon_state_t *state, hermon_hw_addr_path_t *path,
682    ibt_adds_vect_t *av, uint_t type);
683int hermon_portnum_is_valid(hermon_state_t *state, uint_t portnum);
684int hermon_pkeyindex_is_valid(hermon_state_t *state, uint_t pkeyindx);
685int hermon_queue_alloc(hermon_state_t *state, hermon_qalloc_info_t *qa_info,
686    uint_t sleepflag);
687void hermon_queue_free(hermon_qalloc_info_t *qa_info);
688int hermon_get_dma_cookies(hermon_state_t *state, ibt_phys_buf_t *paddr_list_p,
689    ibt_va_attr_t *va_attrs, uint_t list_len, uint_t *cookiecnt,
690    ibc_ma_hdl_t *ibc_ma_hdl_p);
691int hermon_split_dma_cookies(hermon_state_t *state,
692    ibt_phys_buf_t *paddr_list_p, ib_memlen_t *paddr_offset_p,
693    uint_t list_len, uint_t *cookiecnt, uint_t pagesize);
694int hermon_dma_cookie_shift(ibt_phys_buf_t *paddr_list, int start, int end,
695    int cookiecnt, int num_shift);
696int hermon_free_dma_cookies(ibc_ma_hdl_t ibc_ma_hdl);
697int hermon_log2(long x);
698
699
700#ifdef __cplusplus
701}
702#endif
703
704#endif	/* _SYS_IB_ADAPTERS_HERMON_MISC_H */
705