qlt.h revision 11174:ff18993837d6
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2009 QLogic Corporation. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27/* 28 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 29 * Use is subject to license terms. 30 */ 31 32#ifndef _QLT_H 33#define _QLT_H 34 35#include <stmf_defines.h> 36#include <qlt_regs.h> 37 38#ifdef __cplusplus 39extern "C" { 40#endif 41 42/* 43 * Qlogic logging 44 */ 45extern int enable_extended_logging; 46 47/* 48 * Caution: 1) LOG will be available in debug/non-debug mode 49 * 2) Anything which can potentially flood the log should be under 50 * extended logging, and use QLT_EXT_LOG. 51 * 3) Don't use QLT_EXT_LOG in performance-critical code path, such 52 * as normal SCSI I/O code path. It could hurt system performance. 53 * 4) Use kmdb to change enable_extened_logging in the fly to adjust 54 * tracing 55 */ 56#define QLT_EXT_LOG(log_ident, ...) \ 57 if (enable_extended_logging) { \ 58 stmf_trace(log_ident, __VA_ARGS__); \ 59 } 60 61#define QLT_LOG(log_ident, ...) \ 62 stmf_trace(log_ident, __VA_ARGS__) 63 64/* 65 * Error codes. FSC stands for Failure sub code. 66 */ 67#define QLT_FAILURE FCT_FCA_FAILURE 68#define QLT_SUCCESS FCT_SUCCESS 69#define QLT_FSC(x) ((uint64_t)(x) << 40) 70#define QLT_DMA_STUCK (QLT_FAILURE | QLT_FSC(1)) 71#define QLT_MAILBOX_STUCK (QLT_FAILURE | QLT_FSC(2)) 72#define QLT_ROM_STUCK (QLT_FAILURE | QLT_FSC(3)) 73#define QLT_UNEXPECTED_RESPONSE (QLT_FAILURE | QLT_FSC(4)) 74#define QLT_MBOX_FAILED (QLT_FAILURE | QLT_FSC(5)) 75#define QLT_MBOX_NOT_INITIALIZED (QLT_FAILURE | QLT_FSC(6)) 76#define QLT_MBOX_BUSY (QLT_FAILURE | QLT_FSC(7)) 77#define QLT_MBOX_ABORTED (QLT_FAILURE | QLT_FSC(8)) 78#define QLT_MBOX_TIMEOUT (QLT_FAILURE | QLT_FSC(9)) 79#define QLT_RESP_TIMEOUT (QLT_FAILURE | QLT_FSC(10)) 80#define QLT_FLASH_TIMEOUT (QLT_FAILURE | QLT_FSC(11)) 81#define QLT_FLASH_ACCESS_ERROR (QLT_FAILURE | QLT_FSC(12)) 82#define QLT_BAD_NVRAM_DATA (QLT_FAILURE | QLT_FSC(13)) 83#define QLT_FIRMWARE_ERROR_CODE (QLT_FAILURE | QLT_FSC(14)) 84 85#define QLT_FIRMWARE_ERROR(s, c1, c2) (QLT_FIRMWARE_ERROR_CODE | \ 86 (((uint64_t)s) << 32) | (((uint64_t)c1) << 24) | ((uint64_t)c2)) 87 88extern uint32_t fw2400_code01[]; 89extern uint32_t fw2400_length01; 90extern uint32_t fw2400_addr01; 91extern uint32_t fw2400_code02[]; 92extern uint32_t fw2400_length02; 93extern uint32_t fw2400_addr02; 94 95extern uint32_t fw2500_code01[]; 96extern uint32_t fw2500_length01; 97extern uint32_t fw2500_addr01; 98extern uint32_t fw2500_code02[]; 99extern uint32_t fw2500_length02; 100extern uint32_t fw2500_addr02; 101 102extern uint32_t fw8100_code01[]; 103extern uint32_t fw8100_length01; 104extern uint32_t fw8100_addr01; 105extern uint32_t fw8100_code02[]; 106extern uint32_t fw8100_length02; 107extern uint32_t fw8100_addr02; 108 109typedef enum { 110 MBOX_STATE_UNKNOWN = 0, 111 MBOX_STATE_READY, 112 MBOX_STATE_CMD_RUNNING, 113 MBOX_STATE_CMD_DONE 114} mbox_state_t; 115 116/* 117 * ISP mailbox commands 118 */ 119#define MBC_LOAD_RAM 0x01 /* Load RAM. */ 120#define MBC_EXECUTE_FIRMWARE 0x02 /* Execute firmware. */ 121#define MBC_DUMP_RAM 0x03 /* Dump RAM. */ 122#define MBC_WRITE_RAM_WORD 0x04 /* Write RAM word. */ 123#define MBC_READ_RAM_WORD 0x05 /* Read RAM word. */ 124#define MBC_MAILBOX_REGISTER_TEST 0x06 /* Wrap incoming mailboxes */ 125#define MBC_VERIFY_CHECKSUM 0x07 /* Verify checksum. */ 126#define MBC_ABOUT_FIRMWARE 0x08 /* About Firmware. */ 127#define MBC_DUMP_RISC_RAM 0x0a /* Dump RISC RAM command. */ 128#define MBC_LOAD_RAM_EXTENDED 0x0b /* Load RAM extended. */ 129#define MBC_DUMP_RAM_EXTENDED 0x0c /* Dump RAM extended. */ 130#define MBC_WRITE_RAM_EXTENDED 0x0d /* Write RAM word. */ 131#define MBC_READ_RAM_EXTENDED 0x0f /* Read RAM extended. */ 132#define MBC_SERDES_TRANSMIT_PARAMETERS 0x10 /* Serdes Xmit Parameters */ 133#define MBC_2300_EXECUTE_IOCB 0x12 /* ISP2300 Execute IOCB cmd */ 134#define MBC_GET_IO_STATUS 0x12 /* ISP2422 Get I/O Status */ 135#define MBC_STOP_FIRMWARE 0x14 /* Stop firmware */ 136#define MBC_ABORT_COMMAND_IOCB 0x15 /* Abort IOCB command. */ 137#define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */ 138#define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */ 139#define MBC_RESET 0x18 /* Target reset. */ 140#define MBC_XMIT_PARM 0x19 /* Change default xmit parms */ 141#define MBC_PORT_PARAM 0x1a /* Get/set port speed parms */ 142#define MBC_GET_ID 0x20 /* Get loop id of ISP2200. */ 143#define MBC_GET_TIMEOUT_PARAMETERS 0x22 /* Get Timeout Parameters. */ 144#define MBC_TRACE_CONTROL 0x27 /* Trace control. */ 145#define MBC_GET_FIRMWARE_OPTIONS 0x28 /* Get firmware options */ 146#define MBC_READ_SFP 0x31 /* Read SFP. */ 147 148#define MBC_SET_ADDITIONAL_FIRMWARE_OPT 0x38 /* set firmware options */ 149 150#define OPT_PUREX_ENABLE (BIT_10) 151 152#define MBC_RESET_MENLO 0x3a /* Reset Menlo. */ 153#define MBC_RESTART_MPI 0x3d /* Restart MPI. */ 154#define MBC_FLASH_ACCESS 0x3e /* Flash Access Control */ 155#define MBC_LOOP_PORT_BYPASS 0x40 /* Loop Port Bypass. */ 156#define MBC_LOOP_PORT_ENABLE 0x41 /* Loop Port Enable. */ 157#define MBC_GET_RESOURCE_COUNTS 0x42 /* Get Resource Counts. */ 158#define MBC_NON_PARTICIPATE 0x43 /* Non-Participating Mode. */ 159#define MBC_ECHO 0x44 /* ELS ECHO */ 160#define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Diagnostic loop back. */ 161#define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */ 162#define MBC_ENHANCED_GET_PORT_DATABASE 0x47 /* Get Port Database + login */ 163#define MBC_INITIALIZE_MULTI_ID_FW 0x48 /* Initialize multi-id fw */ 164#define MBC_GET_DCBX_PARAMS 0x51 /* Get DCBX parameters */ 165#define MBC_RESET_LINK_STATUS 0x52 /* Reset Link Error Status */ 166#define MBC_EXECUTE_IOCB 0x54 /* 64 Bit Execute IOCB cmd. */ 167#define MBC_SEND_RNID_ELS 0x57 /* Send RNID ELS request */ 168 169#define MBC_SET_PARAMETERS 0x59 /* Set parameters */ 170 171#define RNID_PARAMS_DF_FMT 0x00 172#define RNID_PARAMS_E0_FMT 0x01 173#define PUREX_ELS_CMDS 0x05 174#define FLOGI_PARAMS 0x06 175 176#define PARAM_TYPE_FIELD_MASK 0xff 177#define PARAM_TYPE_FIELD_SHIFT 8 178#define PARAM_TYPE(type) ((type & PARAM_TYPE_FIELD_MASK) << \ 179 PARAM_TYPE_FIELD_SHIFT) 180 181#define MBC_GET_PARAMETERS 0x5a /* Get RNID parameters */ 182#define MBC_DATA_RATE 0x5d /* Data Rate */ 183#define MBC_INITIALIZE_FIRMWARE 0x60 /* Initialize firmware */ 184#define MBC_INITIATE_LIP 0x62 /* Initiate LIP */ 185#define MBC_GET_FC_AL_POSITION_MAP 0x63 /* Get FC_AL Position Map. */ 186#define MBC_GET_PORT_DATABASE 0x64 /* Get Port Database. */ 187#define MBC_CLEAR_ACA 0x65 /* Clear ACA. */ 188#define MBC_TARGET_RESET 0x66 /* Target Reset. */ 189#define MBC_CLEAR_TASK_SET 0x67 /* Clear Task Set. */ 190#define MBC_ABORT_TASK_SET 0x68 /* Abort Task Set. */ 191#define MBC_GET_FIRMWARE_STATE 0x69 /* Get firmware state. */ 192#define MBC_GET_PORT_NAME 0x6a /* Get port name. */ 193#define MBC_GET_LINK_STATUS 0x6b /* Get Link Status. */ 194#define MBC_LIP_RESET 0x6c /* LIP reset. */ 195#define MBC_GET_STATUS_COUNTS 0x6d /* Get Link Statistics and */ 196 /* Private Data Counts */ 197#define MBC_SEND_SNS_COMMAND 0x6e /* Send Simple Name Server */ 198#define MBC_LOGIN_FABRIC_PORT 0x6f /* Login fabric port. */ 199#define MBC_SEND_CHANGE_REQUEST 0x70 /* Send Change Request. */ 200#define MBC_LOGOUT_FABRIC_PORT 0x71 /* Logout fabric port. */ 201#define MBC_LIP_FULL_LOGIN 0x72 /* Full login LIP. */ 202#define MBC_LOGIN_LOOP_PORT 0x74 /* Login Loop Port. */ 203#define MBC_PORT_NODE_NAME_LIST 0x75 /* Get port/node name list */ 204#define MBC_INITIALIZE_IP 0x77 /* Initialize IP */ 205#define MBC_SEND_FARP_REQ_COMMAND 0x78 /* FARP request. */ 206#define MBC_UNLOAD_IP 0x79 /* Unload IP */ 207#define MBC_GET_XGMAC_STATS 0x7a /* Get XGMAC Statistics. */ 208#define MBC_GET_ID_LIST 0x7c /* Get port ID list. */ 209#define MBC_SEND_LFA_COMMAND 0x7d /* Send Loop Fabric Address */ 210#define MBC_LUN_RESET 0x7e /* Send Task mgmt LUN reset */ 211#define MBC_IDC_REQUEST 0x100 /* IDC request */ 212#define MBC_IDC_ACK 0x101 /* IDC acknowledge */ 213#define MBC_IDC_TIME_EXTEND 0x102 /* IDC extend time */ 214#define MBC_PORT_RESET 0x120 /* Port Reset */ 215#define MBC_SET_PORT_CONFIG 0x122 /* Set port configuration */ 216#define MBC_GET_PORT_CONFIG 0x123 /* Get port configuration */ 217 218#define IOCB_SIZE 64 219 220/* 221 * These should not be constents but should be obtained from fw. 222 */ 223#define QLT_MAX_LOGINS 2048 224#define QLT_MAX_XCHGES 2048 225 226#define MAX_MBOXES 32 227#define MBOX_TIMEOUT (2*1000*1000) 228#define DEREG_RP_TIMEOUT (2*1000*1000) 229 230typedef struct { 231 uint16_t to_fw[MAX_MBOXES]; 232 uint32_t to_fw_mask; 233 uint16_t from_fw[MAX_MBOXES]; 234 uint32_t from_fw_mask; 235 stmf_data_buf_t *dbuf; 236} mbox_cmd_t; 237 238typedef struct qlt_abts_cmd { 239 uint8_t buf[IOCB_SIZE]; 240} qlt_abts_cmd_t; 241 242struct qlt_dmem_bucket; 243 244#define QLT_INTR_FIXED 0x1 245#define QLT_INTR_MSI 0x2 246#define QLT_INTR_MSIX 0x4 247 248typedef struct qlt_el_trace_desc { 249 kmutex_t mutex; 250 uint16_t next; 251 uint32_t trace_buffer_size; 252 char *trace_buffer; 253} qlt_el_trace_desc_t; 254 255typedef struct qlt_state { 256 dev_info_t *dip; 257 char qlt_minor_name[16]; 258 char qlt_port_alias[16]; 259 fct_local_port_t *qlt_port; 260 struct qlt_dmem_bucket **dmem_buckets; 261 262 int instance; 263 uint8_t qlt_state:7, 264 qlt_state_not_acked:1; 265 uint8_t qlt_intr_enabled:1, 266 qlt_25xx_chip:1, 267 qlt_stay_offline:1, 268 qlt_link_up, 269 qlt_81xx_chip:1, 270 qlt_rsvd1:3; 271 uint8_t cur_topology; 272 273 /* Registers */ 274 caddr_t regs; 275 ddi_acc_handle_t regs_acc_handle; 276 ddi_acc_handle_t pcicfg_acc_handle; 277 278 /* Interrupt stuff */ 279 kmutex_t intr_lock; /* Only used by intr routine */ 280 int intr_sneak_counter; 281 ddi_intr_handle_t *htable; 282 int intr_size; 283 int intr_cnt; 284 uint_t intr_pri; 285 int intr_cap; 286 int intr_flags; 287 288 /* Queues */ 289 ddi_dma_handle_t queue_mem_dma_handle; 290 ddi_acc_handle_t queue_mem_acc_handle; 291 caddr_t queue_mem_ptr; 292 ddi_dma_cookie_t queue_mem_cookie; 293 294 kmutex_t req_lock; 295 caddr_t req_ptr; 296 uint32_t req_ndx_to_fw; 297 uint32_t req_ndx_from_fw; 298 uint32_t req_available; 299 300 caddr_t resp_ptr; 301 uint32_t resp_ndx_to_fw; 302 uint32_t resp_ndx_from_fw; 303 304 kmutex_t preq_lock; 305 caddr_t preq_ptr; 306 uint32_t preq_ndx_to_fw; 307 uint32_t preq_ndx_from_fw; 308 309 kcondvar_t rp_dereg_cv; /* for deregister cmd */ 310 uint32_t rp_id_in_dereg; /* remote port in deregistering */ 311 fct_status_t rp_dereg_status; 312 313 caddr_t atio_ptr; 314 uint16_t atio_ndx_to_fw; 315 uint16_t atio_ndx_from_fw; 316 317 kmutex_t dma_mem_lock; 318 319 /* MailBox data */ 320 kmutex_t mbox_lock; 321 kcondvar_t mbox_cv; 322 mbox_state_t mbox_io_state; 323 mbox_cmd_t *mcp; 324 qlt_nvram_t *nvram; 325 326 uint8_t link_speed; /* Cached from intr routine */ 327 uint16_t fw_major; 328 uint16_t fw_minor; 329 uint16_t fw_subminor; 330 uint16_t fw_endaddrlo; 331 uint16_t fw_endaddrhi; 332 uint16_t fw_attr; 333 334 uint32_t fw_addr01; 335 uint32_t fw_length01; 336 uint32_t *fw_code01; 337 uint32_t fw_addr02; 338 uint32_t fw_length02; 339 uint32_t *fw_code02; 340 341 uint32_t qlt_ioctl_flags; 342 kmutex_t qlt_ioctl_lock; 343 caddr_t qlt_fwdump_buf; /* FWDUMP will use ioctl flags/lock */ 344 uint32_t qlt_change_state_flags; /* Cached for ACK handling */ 345 346 qlt_el_trace_desc_t *el_trace_desc; 347 348 /* temp ref & stat counters */ 349 uint32_t qlt_bucketcnt[5]; /* element 0 = 2k */ 350 uint64_t qlt_bufref[5]; /* element 0 = 2k */ 351 uint64_t qlt_nullbufref[5]; /* element 0 = 2k */ 352 uint64_t qlt_bumpbucket; /* bigger buffer supplied */ 353 354} qlt_state_t; 355 356/* 357 * FWDUMP flags (part of IOCTL flags) 358 */ 359#define QLT_FWDUMP_INPROGRESS 0x0100 /* if it's dumping now */ 360#define QLT_FWDUMP_TRIGGERED_BY_USER 0x0200 /* if users triggered it */ 361#define QLT_FWDUMP_FETCHED_BY_USER 0x0400 /* if users have viewed it */ 362#define QLT_FWDUMP_ISVALID 0x0800 363 364/* 365 * IOCTL supporting stuff 366 */ 367#define QLT_IOCTL_FLAG_MASK 0xFF 368#define QLT_IOCTL_FLAG_IDLE 0x00 369#define QLT_IOCTL_FLAG_OPEN 0x01 370#define QLT_IOCTL_FLAG_EXCL 0x02 371 372typedef struct qlt_cmd { 373 stmf_data_buf_t *dbuf; /* dbuf with handle 0 for SCSI cmds */ 374 stmf_data_buf_t *dbuf_rsp_iu; /* dbuf for possible FCP_RSP IU */ 375 uint32_t fw_xchg_addr; 376 uint16_t flags; 377 union { 378 uint16_t resp_offset; 379 uint8_t atio_byte3; 380 } param; 381} qlt_cmd_t; 382 383/* 384 * cmd flags 385 */ 386#define QLT_CMD_ABORTING 1 387#define QLT_CMD_ABORTED 2 388#define QLT_CMD_TYPE_SOLICITED 4 389 390typedef struct { 391 int dummy; 392} qlt_remote_port_t; 393 394#define REQUEST_QUEUE_ENTRIES 2048 395#define RESPONSE_QUEUE_ENTRIES 2048 396#define ATIO_QUEUE_ENTRIES 2048 397#define PRIORITY_QUEUE_ENTRIES 128 398 399#define REQUEST_QUEUE_OFFSET 0 400#define RESPONSE_QUEUE_OFFSET (REQUEST_QUEUE_OFFSET + \ 401 (REQUEST_QUEUE_ENTRIES * IOCB_SIZE)) 402#define ATIO_QUEUE_OFFSET (RESPONSE_QUEUE_OFFSET + \ 403 (RESPONSE_QUEUE_ENTRIES * IOCB_SIZE)) 404#define PRIORITY_QUEUE_OFFSET (ATIO_QUEUE_OFFSET + \ 405 (ATIO_QUEUE_ENTRIES * IOCB_SIZE)) 406#define MBOX_DMA_MEM_SIZE 4096 407#define MBOX_DMA_MEM_OFFSET (PRIORITY_QUEUE_OFFSET + \ 408 (PRIORITY_QUEUE_ENTRIES * IOCB_SIZE)) 409#define TOTAL_DMA_MEM_SIZE (MBOX_DMA_MEM_OFFSET + MBOX_DMA_MEM_SIZE) 410 411#define QLT_MAX_ITERATIONS_PER_INTR 32 412 413#define REG_RD16(qlt, addr) \ 414 ddi_get16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr)) 415#define REG_RD32(qlt, addr) \ 416 ddi_get32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr)) 417#define REG_WR16(qlt, addr, data) \ 418 ddi_put16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr), \ 419 (uint16_t)(data)) 420#define REG_WR32(qlt, addr, data) \ 421 ddi_put32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr), \ 422 (uint32_t)(data)) 423#define PCICFG_RD16(qlt, addr) \ 424 pci_config_get16(qlt->pcicfg_acc_handle, (off_t)(addr)) 425#define PCICFG_RD32(qlt, addr) \ 426 pci_config_get32(qlt->pcicfg_acc_handle, (off_t)(addr)) 427#define PCICFG_WR16(qlt, addr, data) \ 428 pci_config_put16(qlt->pcicfg_acc_handle, (off_t)(addr), \ 429 (uint16_t)(data)) 430#define QMEM_RD16(qlt, addr) \ 431 ddi_get16(qlt->queue_mem_acc_handle, (uint16_t *)(addr)) 432#define DMEM_RD16(qlt, addr) LE_16((uint16_t)(*((uint16_t *)(addr)))) 433#define QMEM_RD32(qlt, addr) \ 434 ddi_get32(qlt->queue_mem_acc_handle, (uint32_t *)(addr)) 435#define DMEM_RD32(qlt, addr) LE_32((uint32_t)(*((uint32_t *)(addr)))) 436/* 437 * #define QMEM_RD64(qlt, addr) \ 438 * ddi_get64(qlt->queue_mem_acc_handle, (uint64_t *)(addr)) 439 */ 440#define QMEM_WR16(qlt, addr, data) \ 441 ddi_put16(qlt->queue_mem_acc_handle, (uint16_t *)(addr), \ 442 (uint16_t)(data)) 443#define DMEM_WR16(qlt, addr, data) (*((uint16_t *)(addr)) = \ 444 (uint16_t)LE_16((uint16_t)(data))) 445#define QMEM_WR32(qlt, addr, data) \ 446 ddi_put32(qlt->queue_mem_acc_handle, (uint32_t *)(addr), \ 447 (uint32_t)(data)) 448#define DMEM_WR32(qlt, addr, data) (*((uint32_t *)(addr)) = \ 449 LE_32((uint32_t)(data))) 450 451/* 452 * [QD]MEM is always little endian so the [QD]MEM_WR64 macro works for 453 * both sparc and x86. 454 */ 455#define QMEM_WR64(qlt, addr, data) \ 456 QMEM_WR32(qlt, addr, (data & 0xffffffff)), \ 457 QMEM_WR32(qlt, (addr)+4, ((uint64_t)data) >> 32) 458 459#define DMEM_WR64(qlt, addr, data) \ 460 DMEM_WR32(qlt, addr, (data & 0xffffffff)), \ 461 DMEM_WR32(qlt, (addr)+4, ((uint64_t)data) >> 32) 462 463/* 464 * Structure used to associate values with strings which describe them. 465 */ 466typedef struct string_table_entry { 467 uint32_t value; 468 char *string; 469} string_table_t; 470 471char *prop_text(int prop_status); 472char *value2string(string_table_t *entry, int value, int delimiter); 473 474#define PROP_STATUS_DELIMITER ((uint32_t)0xFFFF) 475 476#define DDI_PROP_STATUS() \ 477{ \ 478 {DDI_PROP_SUCCESS, "DDI_PROP_SUCCESS"}, \ 479 {DDI_PROP_NOT_FOUND, "DDI_PROP_NOT_FOUND"}, \ 480 {DDI_PROP_UNDEFINED, "DDI_PROP_UNDEFINED"}, \ 481 {DDI_PROP_NO_MEMORY, "DDI_PROP_NO_MEMORY"}, \ 482 {DDI_PROP_INVAL_ARG, "DDI_PROP_INVAL_ARG"}, \ 483 {DDI_PROP_BUF_TOO_SMALL, "DDI_PROP_BUF_TOO_SMALL"}, \ 484 {DDI_PROP_CANNOT_DECODE, "DDI_PROP_CANNOT_DECODE"}, \ 485 {DDI_PROP_CANNOT_ENCODE, "DDI_PROP_CANNOT_ENCODE"}, \ 486 {DDI_PROP_END_OF_DATA, "DDI_PROP_END_OF_DATA"}, \ 487 {PROP_STATUS_DELIMITER, "DDI_PROP_UNKNOWN"} \ 488} 489 490#ifndef TRUE 491#define TRUE B_TRUE 492#endif 493 494#ifndef FALSE 495#define FALSE B_FALSE 496#endif 497 498/* Little endian machine correction defines. */ 499#ifdef _LITTLE_ENDIAN 500#define LITTLE_ENDIAN_16(x) 501#define LITTLE_ENDIAN_24(x) 502#define LITTLE_ENDIAN_32(x) 503#define LITTLE_ENDIAN_64(x) 504#define LITTLE_ENDIAN(bp, bytes) 505#define BIG_ENDIAN_16(x) qlt_chg_endian((uint8_t *)x, 2) 506#define BIG_ENDIAN_24(x) qlt_chg_endian((uint8_t *)x, 3) 507#define BIG_ENDIAN_32(x) qlt_chg_endian((uint8_t *)x, 4) 508#define BIG_ENDIAN_64(x) qlt_chg_endian((uint8_t *)x, 8) 509#define BIG_ENDIAN(bp, bytes) qlt_chg_endian((uint8_t *)bp, bytes) 510#endif /* _LITTLE_ENDIAN */ 511 512/* Big endian machine correction defines. */ 513#ifdef _BIG_ENDIAN 514#define LITTLE_ENDIAN_16(x) qlt_chg_endian((uint8_t *)x, 2) 515#define LITTLE_ENDIAN_24(x) qlt_chg_endian((uint8_t *)x, 3) 516#define LITTLE_ENDIAN_32(x) qlt_chg_endian((uint8_t *)x, 4) 517#define LITTLE_ENDIAN_64(x) qlt_chg_endian((uint8_t *)x, 8) 518#define LITTLE_ENDIAN(bp, bytes) qlt_chg_endian((uint8_t *)bp, bytes) 519#define BIG_ENDIAN_16(x) 520#define BIG_ENDIAN_24(x) 521#define BIG_ENDIAN_32(x) 522#define BIG_ENDIAN_64(x) 523#define BIG_ENDIAN(bp, bytes) 524#endif /* _BIG_ENDIAN */ 525 526#define LSB(x) (uint8_t)(x) 527#define MSB(x) (uint8_t)((uint16_t)(x) >> 8) 528#define MSW(x) (uint16_t)((uint32_t)(x) >> 16) 529#define LSW(x) (uint16_t)(x) 530#define LSD(x) (uint32_t)(x) 531#define MSD(x) (uint32_t)((uint64_t)(x) >> 32) 532 533void qlt_chg_endian(uint8_t *, size_t); 534 535void qlt_el_msg(qlt_state_t *qlt, const char *fn, int ce, ...); 536void qlt_dump_el_trace_buffer(qlt_state_t *qlt); 537#define EL(qlt, ...) qlt_el_msg(qlt, __func__, CE_CONT, __VA_ARGS__); 538#define EL_TRACE_BUF_SIZE 8192 539#define EL_BUFFER_RESERVE 256 540#define DEBUG_STK_DEPTH 24 541#define EL_TRACE_BUF_SIZE 8192 542 543#ifdef __cplusplus 544} 545#endif 546 547#endif /* _QLT_H */ 548