output.hpp revision 5966:e2722a66aba7
1/* 2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25#ifndef SHARE_VM_OPTO_OUTPUT_HPP 26#define SHARE_VM_OPTO_OUTPUT_HPP 27 28#include "opto/block.hpp" 29#include "opto/node.hpp" 30#ifdef TARGET_ARCH_MODEL_x86_32 31# include "adfiles/ad_x86_32.hpp" 32#endif 33#ifdef TARGET_ARCH_MODEL_x86_64 34# include "adfiles/ad_x86_64.hpp" 35#endif 36#ifdef TARGET_ARCH_MODEL_sparc 37# include "adfiles/ad_sparc.hpp" 38#endif 39#ifdef TARGET_ARCH_MODEL_zero 40# include "adfiles/ad_zero.hpp" 41#endif 42#ifdef TARGET_ARCH_MODEL_arm 43# include "adfiles/ad_arm.hpp" 44#endif 45#ifdef TARGET_ARCH_MODEL_ppc_32 46# include "adfiles/ad_ppc_32.hpp" 47#endif 48#ifdef TARGET_ARCH_MODEL_ppc_64 49# include "adfiles/ad_ppc_64.hpp" 50#endif 51 52class Arena; 53class Bundle; 54class Block; 55class Block_Array; 56class Node; 57class Node_Array; 58class Node_List; 59class PhaseCFG; 60class PhaseChaitin; 61class Pipeline_Use_Element; 62class Pipeline_Use; 63 64#ifndef PRODUCT 65#define DEBUG_ARG(x) , x 66#else 67#define DEBUG_ARG(x) 68#endif 69 70// Define the initial sizes for allocation of the resizable code buffer 71enum { 72 initial_code_capacity = 16 * 1024, 73 initial_stub_capacity = 4 * 1024, 74 initial_const_capacity = 4 * 1024, 75 initial_locs_capacity = 3 * 1024 76}; 77 78//------------------------------Scheduling---------------------------------- 79// This class contains all the information necessary to implement instruction 80// scheduling and bundling. 81class Scheduling { 82 83private: 84 // Arena to use 85 Arena *_arena; 86 87 // Control-Flow Graph info 88 PhaseCFG *_cfg; 89 90 // Register Allocation info 91 PhaseRegAlloc *_regalloc; 92 93 // Number of nodes in the method 94 uint _node_bundling_limit; 95 96 // List of scheduled nodes. Generated in reverse order 97 Node_List _scheduled; 98 99 // List of nodes currently available for choosing for scheduling 100 Node_List _available; 101 102 // For each instruction beginning a bundle, the number of following 103 // nodes to be bundled with it. 104 Bundle *_node_bundling_base; 105 106 // Mapping from register to Node 107 Node_List _reg_node; 108 109 // Free list for pinch nodes. 110 Node_List _pinch_free_list; 111 112 // Latency from the beginning of the containing basic block (base 1) 113 // for each node. 114 unsigned short *_node_latency; 115 116 // Number of uses of this node within the containing basic block. 117 short *_uses; 118 119 // Schedulable portion of current block. Skips Region/Phi/CreateEx up 120 // front, branch+proj at end. Also skips Catch/CProj (same as 121 // branch-at-end), plus just-prior exception-throwing call. 122 uint _bb_start, _bb_end; 123 124 // Latency from the end of the basic block as scheduled 125 unsigned short *_current_latency; 126 127 // Remember the next node 128 Node *_next_node; 129 130 // Use this for an unconditional branch delay slot 131 Node *_unconditional_delay_slot; 132 133 // Pointer to a Nop 134 MachNopNode *_nop; 135 136 // Length of the current bundle, in instructions 137 uint _bundle_instr_count; 138 139 // Current Cycle number, for computing latencies and bundling 140 uint _bundle_cycle_number; 141 142 // Bundle information 143 Pipeline_Use_Element _bundle_use_elements[resource_count]; 144 Pipeline_Use _bundle_use; 145 146 // Dump the available list 147 void dump_available() const; 148 149public: 150 Scheduling(Arena *arena, Compile &compile); 151 152 // Destructor 153 NOT_PRODUCT( ~Scheduling(); ) 154 155 // Step ahead "i" cycles 156 void step(uint i); 157 158 // Step ahead 1 cycle, and clear the bundle state (for example, 159 // at a branch target) 160 void step_and_clear(); 161 162 Bundle* node_bundling(const Node *n) { 163 assert(valid_bundle_info(n), "oob"); 164 return (&_node_bundling_base[n->_idx]); 165 } 166 167 bool valid_bundle_info(const Node *n) const { 168 return (_node_bundling_limit > n->_idx); 169 } 170 171 bool starts_bundle(const Node *n) const { 172 return (_node_bundling_limit > n->_idx && _node_bundling_base[n->_idx].starts_bundle()); 173 } 174 175 // Do the scheduling 176 void DoScheduling(); 177 178 // Compute the local latencies walking forward over the list of 179 // nodes for a basic block 180 void ComputeLocalLatenciesForward(const Block *bb); 181 182 // Compute the register antidependencies within a basic block 183 void ComputeRegisterAntidependencies(Block *bb); 184 void verify_do_def( Node *n, OptoReg::Name def, const char *msg ); 185 void verify_good_schedule( Block *b, const char *msg ); 186 void anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ); 187 void anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ); 188 189 // Add a node to the current bundle 190 void AddNodeToBundle(Node *n, const Block *bb); 191 192 // Add a node to the list of available nodes 193 void AddNodeToAvailableList(Node *n); 194 195 // Compute the local use count for the nodes in a block, and compute 196 // the list of instructions with no uses in the block as available 197 void ComputeUseCount(const Block *bb); 198 199 // Choose an instruction from the available list to add to the bundle 200 Node * ChooseNodeToBundle(); 201 202 // See if this Node fits into the currently accumulating bundle 203 bool NodeFitsInBundle(Node *n); 204 205 // Decrement the use count for a node 206 void DecrementUseCounts(Node *n, const Block *bb); 207 208 // Garbage collect pinch nodes for reuse by other blocks. 209 void garbage_collect_pinch_nodes(); 210 // Clean up a pinch node for reuse (helper for above). 211 void cleanup_pinch( Node *pinch ); 212 213 // Information for statistics gathering 214#ifndef PRODUCT 215private: 216 // Gather information on size of nops relative to total 217 uint _branches, _unconditional_delays; 218 219 static uint _total_nop_size, _total_method_size; 220 static uint _total_branches, _total_unconditional_delays; 221 static uint _total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1]; 222 223public: 224 static void print_statistics(); 225 226 static void increment_instructions_per_bundle(uint i) { 227 _total_instructions_per_bundle[i]++; 228 } 229 230 static void increment_nop_size(uint s) { 231 _total_nop_size += s; 232 } 233 234 static void increment_method_size(uint s) { 235 _total_method_size += s; 236 } 237#endif 238 239}; 240 241#endif // SHARE_VM_OPTO_OUTPUT_HPP 242