solaris_sparc.s revision 196:d1605aabd0a1 
13062Sjlahoda!!
23062Sjlahoda!! Copyright 2005-2008 Sun Microsystems, Inc.  All Rights Reserved.
33062Sjlahoda!! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
43062Sjlahoda!!
53062Sjlahoda!! This code is free software; you can redistribute it and/or modify it
63062Sjlahoda!! under the terms of the GNU General Public License version 2 only, as
73062Sjlahoda!! published by the Free Software Foundation.
83062Sjlahoda!!
93062Sjlahoda!! This code is distributed in the hope that it will be useful, but WITHOUT
103062Sjlahoda!! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
113062Sjlahoda!! FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
123062Sjlahoda!! version 2 for more details (a copy is included in the LICENSE file that
133062Sjlahoda!! accompanied this code).
143062Sjlahoda!!
153062Sjlahoda!! You should have received a copy of the GNU General Public License version
163062Sjlahoda!! 2 along with this work; if not, write to the Free Software Foundation,
173062Sjlahoda!! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
183062Sjlahoda!!
193062Sjlahoda!! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
203062Sjlahoda!! CA 95054 USA or visit www.sun.com if you need additional information or
213062Sjlahoda!! have any questions.
223062Sjlahoda!!
233062Sjlahoda
243062Sjlahoda    !! Prototype: int SafeFetch32 (int * adr, int ErrValue)
253062Sjlahoda    !! The "ld" at Fetch32 is potentially faulting instruction.
263062Sjlahoda    !! If the instruction traps the trap handler will arrange
273062Sjlahoda    !! for control to resume at Fetch32Resume.
283062Sjlahoda    !! By convention with the trap handler we ensure there is a non-CTI
293062Sjlahoda    !! instruction in the trap shadow.
303062Sjlahoda    !!
313062Sjlahoda    !! The reader might be tempted to move this service to .il.
323062Sjlahoda    !! Don't.  Sun's CC back-end reads and optimize code emitted
333062Sjlahoda    !! by the .il "call", in some cases optimizing the code, completely eliding it,
343062Sjlahoda    !! or by moving the code from the "call site".
353062Sjlahoda
363062Sjlahoda     !! ASM better know we may use G6 for our own purposes
373062Sjlahoda    .register %g6, #ignore
383062Sjlahoda
393062Sjlahoda    .globl  SafeFetch32
403062Sjlahoda    .align  32
413062Sjlahoda    .global Fetch32PFI, Fetch32Resume
423062SjlahodaSafeFetch32:
433062Sjlahoda    mov     %o0, %g1
443062Sjlahoda    mov     %o1, %o0
453062SjlahodaFetch32PFI:
463062Sjlahoda    ld      [%g1], %o0          !! <-- Potentially faulting instruction
473062SjlahodaFetch32Resume:
483062Sjlahoda    nop
493062Sjlahoda    retl
503062Sjlahoda    nop
513062Sjlahoda
523062Sjlahoda    .globl  SafeFetchN
533062Sjlahoda    .align  32
543062Sjlahoda    .globl  FetchNPFI, FetchNResume
553062SjlahodaSafeFetchN:
563062Sjlahoda    mov     %o0, %g1
573062Sjlahoda    mov     %o1, %o0
583062SjlahodaFetchNPFI:
593062Sjlahoda    ldn     [%g1], %o0
603062SjlahodaFetchNResume:
613062Sjlahoda    nop
623062Sjlahoda    retl
633062Sjlahoda    nop
643062Sjlahoda
653062Sjlahoda    !! Possibilities:
663062Sjlahoda    !! -- membar
673062Sjlahoda    !! -- CAS (SP + BIAS, G0, G0)
683062Sjlahoda    !! -- wr %g0, %asi
693062Sjlahoda
703062Sjlahoda    .global SpinPause
713062Sjlahoda    .align  32
723062SjlahodaSpinPause:
733062Sjlahoda    retl
743062Sjlahoda    mov %g0, %o0
753062Sjlahoda
763062Sjlahoda
773062Sjlahoda
783062Sjlahoda    .globl _Copy_conjoint_jlongs_atomic
793062Sjlahoda    .align 32
803062Sjlahoda    .global   _Copy_conjoint_jlongs_atomic
813062Sjlahoda _Copy_conjoint_jlongs_atomic:
823062Sjlahoda         cmp     %o0, %o1
833062Sjlahoda         bleu    4f
843062Sjlahoda         sll     %o2, 3, %o4
853062Sjlahoda         ba      2f
863062Sjlahoda    1:
873062Sjlahoda         subcc   %o4, 8, %o4
883062Sjlahoda         std     %o2, [%o1]
893062Sjlahoda         add     %o0, 8, %o0
903062Sjlahoda         add     %o1, 8, %o1
913062Sjlahoda    2:
923062Sjlahoda         bge,a   1b
933062Sjlahoda         ldd     [%o0], %o2
943062Sjlahoda         ba      5f
95         nop
96    3:
97         std     %o2, [%o1+%o4]
98    4:
99         subcc   %o4, 8, %o4
100         bge,a   3b
101         ldd     [%o0+%o4], %o2
102    5:
103         retl
104         nop
105
106
107
108    .globl _raw_thread_id
109    .align 32
110 _raw_thread_id:
111    .register %g7, #scratch
112        retl
113        mov     %g7, %o0
114
115
116    .globl _flush_reg_windows
117    .align 32
118 _flush_reg_windows:
119        ta 0x03
120        retl
121        mov     %fp, %o0
122
123
124