solaris_sparc.s revision 0:a61af66fc99e 
1!!
2!! Copyright 2005-2007 Sun Microsystems, Inc.  All Rights Reserved.
3!! DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4!!
5!! This code is free software; you can redistribute it and/or modify it
6!! under the terms of the GNU General Public License version 2 only, as
7!! published by the Free Software Foundation.
8!!
9!! This code is distributed in the hope that it will be useful, but WITHOUT
10!! ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11!! FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12!! version 2 for more details (a copy is included in the LICENSE file that
13!! accompanied this code).
14!!
15!! You should have received a copy of the GNU General Public License version
16!! 2 along with this work; if not, write to the Free Software Foundation,
17!! Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18!!
19!! Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20!! CA 95054 USA or visit www.sun.com if you need additional information or
21!! have any questions.
22!!
23
24    !! Prototype: int SafeFetch32 (int * adr, int ErrValue)
25    !! The "ld" at Fetch32 is potentially faulting instruction.
26    !! If the instruction traps the trap handler will arrange
27    !! for control to resume at Fetch32Resume.
28    !! By convention with the trap handler we ensure there is a non-CTI
29    !! instruction in the trap shadow.
30    !!
31    !! The reader might be tempted to move this service to .il.
32    !! Don't.  Sun's CC back-end reads and optimize code emitted
33    !! by the .il "call", in some cases optimizing the code, completely eliding it,
34    !! or by moving the code from the "call site".
35
36
37    .globl  SafeFetch32
38    .align  32
39    .global Fetch32PFI, Fetch32Resume
40SafeFetch32:
41    mov     %o0, %g1
42    mov     %o1, %o0
43Fetch32PFI:
44    ld      [%g1], %o0          !! <-- Potentially faulting instruction
45Fetch32Resume:
46    nop
47    retl
48    nop
49
50    .globl  SafeFetchN
51    .align  32
52    .globl  FetchNPFI, FetchNResume
53SafeFetchN:
54    mov     %o0, %g1
55    mov     %o1, %o0
56FetchNPFI:
57    ldn     [%g1], %o0
58FetchNResume:
59    nop
60    retl
61    nop
62
63    !! Possibilities:
64    !! -- membar
65    !! -- CAS (SP + BIAS, G0, G0)
66    !! -- wr %g0, %asi
67
68    .global SpinPause
69    .align  32
70SpinPause:
71    retl
72    mov %g0, %o0
73
74
75
76    .globl _Copy_conjoint_jlongs_atomic
77    .align 32
78    .global   _Copy_conjoint_jlongs_atomic
79 _Copy_conjoint_jlongs_atomic:
80         cmp     %o0, %o1
81         bleu    4f
82         sll     %o2, 3, %o4
83         ba      2f
84    1:
85         subcc   %o4, 8, %o4
86         std     %o2, [%o1]
87         add     %o0, 8, %o0
88         add     %o1, 8, %o1
89    2:
90         bge,a   1b
91         ldd     [%o0], %o2
92         ba      5f
93         nop
94    3:
95         std     %o2, [%o1+%o4]
96    4:
97         subcc   %o4, 8, %o4
98         bge,a   3b
99         ldd     [%o0+%o4], %o2
100    5:
101         retl
102         nop
103
104
105
106    .globl _raw_thread_id
107    .align 32
108 _raw_thread_id:
109        retl
110        mov     %g7, %o0
111
112
113    .globl _flush_reg_windows
114    .align 32
115 _flush_reg_windows:
116        ta 0x03
117        retl
118        mov     %fp, %o0
119
120
121