globals_x86.hpp revision 12469:c7a256349729 
1/*
2 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
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7 * published by the Free Software Foundation.
8 *
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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23 */
24
25#ifndef CPU_X86_VM_GLOBALS_X86_HPP
26#define CPU_X86_VM_GLOBALS_X86_HPP
27
28#include "utilities/globalDefinitions.hpp"
29#include "utilities/macros.hpp"
30
31// Sets the default values for platform dependent flags used by the runtime system.
32// (see globals.hpp)
33
34define_pd_global(bool, ShareVtableStubs,         true);
35define_pd_global(bool, NeedsDeoptSuspend,        false); // only register window machines need this
36
37define_pd_global(bool, ImplicitNullChecks,       true);  // Generate code for implicit null checks
38define_pd_global(bool, TrapBasedNullChecks,      false); // Not needed on x86.
39define_pd_global(bool, UncommonNullCast,         true);  // Uncommon-trap NULLs passed to check cast
40
41define_pd_global(uintx, CodeCacheSegmentSize,    64 TIERED_ONLY(+64)); // Tiered compilation has large code-entry alignment.
42// See 4827828 for this change. There is no globals_core_i486.hpp. I can't
43// assign a different value for C2 without touching a number of files. Use
44// #ifdef to minimize the change as it's late in Mantis. -- FIXME.
45// c1 doesn't have this problem because the fix to 4858033 assures us
46// the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
47// the uep and the vep doesn't get real alignment but just slops on by
48// only assured that the entry instruction meets the 5 byte size requirement.
49#if defined(COMPILER2) || INCLUDE_JVMCI
50define_pd_global(intx, CodeEntryAlignment,       32);
51#else
52define_pd_global(intx, CodeEntryAlignment,       16);
53#endif // COMPILER2
54define_pd_global(intx, OptoLoopAlignment,        16);
55define_pd_global(intx, InlineFrequencyCount,     100);
56define_pd_global(intx, InlineSmallCode,          1000);
57
58#define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3))
59#define DEFAULT_STACK_RED_PAGES (1)
60#define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0))
61
62#define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
63#define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
64#define MIN_STACK_RESERVED_PAGES (0)
65
66#ifdef _LP64
67// Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the
68// stack if compiled for unix and LP64. To pass stack overflow tests we need
69// 20 shadow pages.
70#define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(7) DEBUG_ONLY(+2))
71// For those clients that do not use write socket, we allow
72// the min range value to be below that of the default
73#define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(7) DEBUG_ONLY(+2))
74#else
75#define DEFAULT_STACK_SHADOW_PAGES (4 DEBUG_ONLY(+5))
76#define MIN_STACK_SHADOW_PAGES DEFAULT_STACK_SHADOW_PAGES
77#endif // _LP64
78
79define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES);
80define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES);
81define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES);
82define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES);
83
84define_pd_global(bool, RewriteBytecodes,     true);
85define_pd_global(bool, RewriteFrequentPairs, true);
86
87#ifdef _ALLBSD_SOURCE
88define_pd_global(bool, UseMembar,            true);
89#else
90define_pd_global(bool, UseMembar,            false);
91#endif
92
93// GC Ergo Flags
94define_pd_global(size_t, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
95
96define_pd_global(uintx, TypeProfileLevel, 111);
97
98define_pd_global(bool, CompactStrings, true);
99
100define_pd_global(bool, PreserveFramePointer, false);
101
102define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
103
104#define ARCH_FLAGS(develop, \
105                   product, \
106                   diagnostic, \
107                   experimental, \
108                   notproduct, \
109                   range, \
110                   constraint, \
111                   writeable) \
112                                                                            \
113  develop(bool, IEEEPrecision, true,                                        \
114          "Enables IEEE precision (for INTEL only)")                        \
115                                                                            \
116  product(bool, UseStoreImmI16, true,                                       \
117          "Use store immediate 16-bits value instruction on x86")           \
118                                                                            \
119  product(intx, UseAVX, 99,                                                 \
120          "Highest supported AVX instructions set on x86/x64")              \
121          range(0, 99)                                                      \
122                                                                            \
123  product(bool, UseCLMUL, false,                                            \
124          "Control whether CLMUL instructions can be used on x86/x64")      \
125                                                                            \
126  diagnostic(bool, UseIncDec, true,                                         \
127          "Use INC, DEC instructions on x86")                               \
128                                                                            \
129  product(bool, UseNewLongLShift, false,                                    \
130          "Use optimized bitwise shift left")                               \
131                                                                            \
132  product(bool, UseAddressNop, false,                                       \
133          "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
134                                                                            \
135  product(bool, UseXmmLoadAndClearUpper, true,                              \
136          "Load low part of XMM register and clear upper part")             \
137                                                                            \
138  product(bool, UseXmmRegToRegMoveAll, false,                               \
139          "Copy all XMM register bits when moving value between registers") \
140                                                                            \
141  product(bool, UseXmmI2D, false,                                           \
142          "Use SSE2 CVTDQ2PD instruction to convert Integer to Double")     \
143                                                                            \
144  product(bool, UseXmmI2F, false,                                           \
145          "Use SSE2 CVTDQ2PS instruction to convert Integer to Float")      \
146                                                                            \
147  product(bool, UseUnalignedLoadStores, false,                              \
148          "Use SSE2 MOVDQU instruction for Arraycopy")                      \
149                                                                            \
150  product(bool, UseFastStosb, false,                                        \
151          "Use fast-string operation for zeroing: rep stosb")               \
152                                                                            \
153  /* Use Restricted Transactional Memory for lock eliding */                \
154  product(bool, UseRTMLocking, false,                                       \
155          "Enable RTM lock eliding for inflated locks in compiled code")    \
156                                                                            \
157  experimental(bool, UseRTMForStackLocks, false,                            \
158          "Enable RTM lock eliding for stack locks in compiled code")       \
159                                                                            \
160  product(bool, UseRTMDeopt, false,                                         \
161          "Perform deopt and recompilation based on RTM abort ratio")       \
162                                                                            \
163  product(uintx, RTMRetryCount, 5,                                          \
164          "Number of RTM retries on lock abort or busy")                    \
165          range(0, max_uintx)                                               \
166                                                                            \
167  experimental(intx, RTMSpinLoopCount, 100,                                 \
168          "Spin count for lock to become free before RTM retry")            \
169                                                                            \
170  experimental(intx, RTMAbortThreshold, 1000,                               \
171          "Calculate abort ratio after this number of aborts")              \
172                                                                            \
173  experimental(intx, RTMLockingThreshold, 10000,                            \
174          "Lock count at which to do RTM lock eliding without "             \
175          "abort ratio calculation")                                        \
176                                                                            \
177  experimental(intx, RTMAbortRatio, 50,                                     \
178          "Lock abort ratio at which to stop use RTM lock eliding")         \
179                                                                            \
180  experimental(intx, RTMTotalCountIncrRate, 64,                             \
181          "Increment total RTM attempted lock count once every n times")    \
182                                                                            \
183  experimental(intx, RTMLockingCalculationDelay, 0,                         \
184          "Number of milliseconds to wait before start calculating aborts " \
185          "for RTM locking")                                                \
186                                                                            \
187  experimental(bool, UseRTMXendForLockBusy, true,                           \
188          "Use RTM Xend instead of Xabort when lock busy")                  \
189                                                                            \
190  /* assembler */                                                           \
191  product(bool, UseCountLeadingZerosInstruction, false,                     \
192          "Use count leading zeros instruction")                            \
193                                                                            \
194  product(bool, UseCountTrailingZerosInstruction, false,                    \
195          "Use count trailing zeros instruction")                           \
196                                                                            \
197  product(bool, UseSSE42Intrinsics, false,                                  \
198          "SSE4.2 versions of intrinsics")                                  \
199                                                                            \
200  product(bool, UseBMI1Instructions, false,                                 \
201          "Use BMI1 instructions")                                          \
202                                                                            \
203  product(bool, UseBMI2Instructions, false,                                 \
204          "Use BMI2 instructions")                                          \
205                                                                            \
206  diagnostic(bool, UseLibmIntrinsic, true,                                  \
207          "Use Libm Intrinsics")
208#endif // CPU_X86_VM_GLOBALS_X86_HPP
209