assembler_x86.inline.hpp revision 1472:c18cbe5936b8
1/* 2 * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25inline void MacroAssembler::pd_patch_instruction(address branch, address target) { 26 unsigned char op = branch[0]; 27 assert(op == 0xE8 /* call */ || 28 op == 0xE9 /* jmp */ || 29 op == 0xEB /* short jmp */ || 30 (op & 0xF0) == 0x70 /* short jcc */ || 31 op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */, 32 "Invalid opcode at patch point"); 33 34 if (op == 0xEB || (op & 0xF0) == 0x70) { 35 // short offset operators (jmp and jcc) 36 char* disp = (char*) &branch[1]; 37 int imm8 = target - (address) &disp[1]; 38 guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset"); 39 *disp = imm8; 40 } else { 41 int* disp = (int*) &branch[(op == 0x0F)? 2: 1]; 42 int imm32 = target - (address) &disp[1]; 43 *disp = imm32; 44 } 45} 46 47#ifndef PRODUCT 48inline void MacroAssembler::pd_print_patched_instruction(address branch) { 49 const char* s; 50 unsigned char op = branch[0]; 51 if (op == 0xE8) { 52 s = "call"; 53 } else if (op == 0xE9 || op == 0xEB) { 54 s = "jmp"; 55 } else if ((op & 0xF0) == 0x70) { 56 s = "jcc"; 57 } else if (op == 0x0F) { 58 s = "jcc"; 59 } else { 60 s = "????"; 61 } 62 tty->print("%s (unresolved)", s); 63} 64#endif // ndef PRODUCT 65 66#ifndef _LP64 67inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } 68inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } 69 70inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; } 71inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; } 72 73inline void Assembler::prefix(Register reg) {} 74inline void Assembler::prefix(Address adr) {} 75inline void Assembler::prefixq(Address adr) {} 76 77inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} 78inline void Assembler::prefixq(Address adr, Register reg) {} 79 80inline void Assembler::prefix(Address adr, XMMRegister reg) {} 81#else 82inline void Assembler::emit_long64(jlong x) { 83 *(jlong*) _code_pos = x; 84 _code_pos += sizeof(jlong); 85 code_section()->set_end(_code_pos); 86} 87#endif // _LP64 88