vm_version_sparc.hpp revision 7033:63934ec778a2
159632Swollman/* 259632Swollman * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 359632Swollman * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 459632Swollman * 559632Swollman * This code is free software; you can redistribute it and/or modify it 659632Swollman * under the terms of the GNU General Public License version 2 only, as 759632Swollman * published by the Free Software Foundation. 859632Swollman * 959632Swollman * This code is distributed in the hope that it will be useful, but WITHOUT 1059632Swollman * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1159632Swollman * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 1259632Swollman * version 2 for more details (a copy is included in the LICENSE file that 1359632Swollman * accompanied this code). 1459632Swollman * 1559632Swollman * You should have received a copy of the GNU General Public License version 1659632Swollman * 2 along with this work; if not, write to the Free Software Foundation, 1759632Swollman * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18119312Smarkm * 1959632Swollman * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 2059632Swollman * or visit www.oracle.com if you need additional information or have any 21103591Swollman * questions. 2259632Swollman * 2359632Swollman */ 2459632Swollman 2559632Swollman#ifndef CPU_SPARC_VM_VM_VERSION_SPARC_HPP 2659632Swollman#define CPU_SPARC_VM_VM_VERSION_SPARC_HPP 2759632Swollman 2859632Swollman#include "runtime/globals_extension.hpp" 2959632Swollman#include "runtime/vm_version.hpp" 3059632Swollman 3159632Swollmanclass VM_Version: public Abstract_VM_Version { 3259632Swollmanprotected: 3359632Swollman enum Feature_Flag { 3459632Swollman v8_instructions = 0, 3559632Swollman hardware_mul32 = 1, 3659632Swollman hardware_div32 = 2, 37103591Swollman hardware_fsmuld = 3, 38103591Swollman hardware_popc = 4, 39103591Swollman v9_instructions = 5, 4059632Swollman vis1_instructions = 6, 4159632Swollman vis2_instructions = 7, 4259632Swollman sun4v_instructions = 8, 4359632Swollman blk_init_instructions = 9, 4459632Swollman fmaf_instructions = 10, 4559632Swollman fmau_instructions = 11, 46103591Swollman vis3_instructions = 12, 47103591Swollman cbcond_instructions = 13, 4859632Swollman sparc64_family = 14, 4959632Swollman M_family = 15, 5059632Swollman T_family = 16, 5159632Swollman T1_model = 17, 5259632Swollman sparc5_instructions = 18, 5359632Swollman aes_instructions = 19, 5459632Swollman sha1_instruction = 20, 5559632Swollman sha256_instruction = 21, 5659632Swollman sha512_instruction = 22 5759632Swollman }; 5859632Swollman 5959632Swollman enum Feature_Flag_Set { 6059632Swollman unknown_m = 0, 6159632Swollman all_features_m = -1, 62106016Swollman 6359632Swollman v8_instructions_m = 1 << v8_instructions, 6459632Swollman hardware_mul32_m = 1 << hardware_mul32, 6559632Swollman hardware_div32_m = 1 << hardware_div32, 6659632Swollman hardware_fsmuld_m = 1 << hardware_fsmuld, 6759632Swollman hardware_popc_m = 1 << hardware_popc, 6859632Swollman v9_instructions_m = 1 << v9_instructions, 6959632Swollman vis1_instructions_m = 1 << vis1_instructions, 7059632Swollman vis2_instructions_m = 1 << vis2_instructions, 7159632Swollman sun4v_m = 1 << sun4v_instructions, 7259632Swollman blk_init_instructions_m = 1 << blk_init_instructions, 7359632Swollman fmaf_instructions_m = 1 << fmaf_instructions, 7459632Swollman fmau_instructions_m = 1 << fmau_instructions, 7559632Swollman vis3_instructions_m = 1 << vis3_instructions, 7659632Swollman cbcond_instructions_m = 1 << cbcond_instructions, 77103591Swollman sparc64_family_m = 1 << sparc64_family, 78103591Swollman M_family_m = 1 << M_family, 79103591Swollman T_family_m = 1 << T_family, 80103591Swollman T1_model_m = 1 << T1_model, 8159632Swollman sparc5_instructions_m = 1 << sparc5_instructions, 82106016Swollman aes_instructions_m = 1 << aes_instructions, 8359632Swollman sha1_instruction_m = 1 << sha1_instruction, 8459632Swollman sha256_instruction_m = 1 << sha256_instruction, 8559632Swollman sha512_instruction_m = 1 << sha512_instruction, 8659632Swollman 8759632Swollman generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m, 8859632Swollman generic_v9_m = generic_v8_m | v9_instructions_m, 89103591Swollman ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m, 9059632Swollman 9159632Swollman // Temporary until we have something more accurate 92103591Swollman niagara1_unique_m = sun4v_m, 9359632Swollman niagara1_m = generic_v9_m | niagara1_unique_m 94103591Swollman }; 9559632Swollman 9659632Swollman static int _features; 9759632Swollman static const char* _features_str; 98103591Swollman 99103591Swollman static unsigned int _L2_cache_line_size; 100103591Swollman static unsigned int L2_cache_line_size() { return _L2_cache_line_size; } 101103591Swollman 10259632Swollman static void print_features(); 10359632Swollman static int determine_features(); 10459632Swollman static int platform_features(int features); 10559632Swollman 106103591Swollman // Returns true if the platform is in the niagara line (T series) 10759632Swollman static bool is_M_family(int features) { return (features & M_family_m) != 0; } 10859632Swollman static bool is_T_family(int features) { return (features & T_family_m) != 0; } 10959632Swollman static bool is_niagara() { return is_T_family(_features); } 11059632Swollman#ifdef ASSERT 111103591Swollman static bool is_niagara(int features) { 112103591Swollman // 'sun4v_m' may be defined on both Sun/Oracle Sparc CPUs as well as 113103591Swollman // on Fujitsu Sparc64 CPUs, but only Sun/Oracle Sparcs can be 'niagaras'. 114103591Swollman return (features & sun4v_m) != 0 && (features & sparc64_family_m) == 0; 115103591Swollman } 116103591Swollman#endif 117103591Swollman 11859632Swollman // Returns true if it is niagara1 (T1). 119103591Swollman static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); } 12059632Swollman 121103591Swollman static int maximum_niagara1_processor_count() { return 32; } 122103591Swollman 123103591Swollmanpublic: 124289604Sbapt // Initialization 12559632Swollman static void initialize(); 12659632Swollman 12759632Swollman // Instruction support 12859632Swollman static bool has_v8() { return (_features & v8_instructions_m) != 0; } 12959632Swollman static bool has_v9() { return (_features & v9_instructions_m) != 0; } 13059632Swollman static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; } 13159632Swollman static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; } 13259632Swollman static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; } 13359632Swollman static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; } 13459632Swollman static bool has_vis1() { return (_features & vis1_instructions_m) != 0; } 13559632Swollman static bool has_vis2() { return (_features & vis2_instructions_m) != 0; } 136103591Swollman static bool has_vis3() { return (_features & vis3_instructions_m) != 0; } 13759632Swollman static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; } 13859632Swollman static bool has_cbcond() { return (_features & cbcond_instructions_m) != 0; } 13959632Swollman static bool has_sparc5_instr() { return (_features & sparc5_instructions_m) != 0; } 140119312Smarkm static bool has_aes() { return (_features & aes_instructions_m) != 0; } 141103591Swollman static bool has_sha1() { return (_features & sha1_instruction_m) != 0; } 142103591Swollman static bool has_sha256() { return (_features & sha256_instruction_m) != 0; } 143103591Swollman static bool has_sha512() { return (_features & sha512_instruction_m) != 0; } 144103591Swollman 145103591Swollman static bool supports_compare_and_exchange() 14659632Swollman { return has_v9(); } 147103591Swollman 148103591Swollman // Returns true if the platform is in the niagara line (T series) 14959632Swollman // and newer than the niagara1. 150 static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); } 151 152 static bool is_M_series() { return is_M_family(_features); } 153 static bool is_T4() { return is_T_family(_features) && has_cbcond(); } 154 static bool is_T7() { return is_T_family(_features) && has_sparc5_instr(); } 155 156 // Fujitsu SPARC64 157 static bool is_sparc64() { return (_features & sparc64_family_m) != 0; } 158 159 static bool is_sun4v() { return (_features & sun4v_m) != 0; } 160 static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m && !is_sun4v() && !is_sparc64(); } 161 162 static bool has_fast_fxtof() { return is_niagara() || is_sparc64() || has_v9() && !is_ultra3(); } 163 static bool has_fast_idiv() { return is_niagara_plus() || is_sparc64(); } 164 165 // T4 and newer Sparc have fast RDPC instruction. 166 static bool has_fast_rdpc() { return is_T4(); } 167 168 // On T4 and newer Sparc BIS to the beginning of cache line always zeros it. 169 static bool has_block_zeroing() { return has_blk_init() && is_T4(); } 170 171 static const char* cpu_features() { return _features_str; } 172 173 // default prefetch block size on sparc 174 static intx prefetch_data_size() { return L2_cache_line_size(); } 175 176 // Prefetch 177 static intx prefetch_copy_interval_in_bytes() { 178 intx interval = PrefetchCopyIntervalInBytes; 179 return interval >= 0 ? interval : (has_v9() ? 512 : 0); 180 } 181 static intx prefetch_scan_interval_in_bytes() { 182 intx interval = PrefetchScanIntervalInBytes; 183 return interval >= 0 ? interval : (has_v9() ? 512 : 0); 184 } 185 static intx prefetch_fields_ahead() { 186 intx count = PrefetchFieldsAhead; 187 return count >= 0 ? count : (is_ultra3() ? 1 : 0); 188 } 189 190 static intx allocate_prefetch_distance() { 191 // This method should be called before allocate_prefetch_style(). 192 intx count = AllocatePrefetchDistance; 193 if (count < 0) { // default is not defined ? 194 count = 512; 195 } 196 return count; 197 } 198 static intx allocate_prefetch_style() { 199 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); 200 // Return 0 if AllocatePrefetchDistance was not defined. 201 return AllocatePrefetchDistance > 0 ? AllocatePrefetchStyle : 0; 202 } 203 204 // Assembler testing 205 static void allow_all(); 206 static void revert(); 207 208 // Override the Abstract_VM_Version implementation. 209 static uint page_size_count() { return is_sun4v() ? 4 : 2; } 210 211 // Calculates the number of parallel threads 212 static unsigned int calc_parallel_worker_threads(); 213}; 214 215#endif // CPU_SPARC_VM_VM_VERSION_SPARC_HPP 216