icBuffer_sparc.cpp revision 1472:c18cbe5936b8
1/* 2 * Copyright (c) 1997, 2009, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25#include "incls/_precompiled.incl" 26#include "incls/_icBuffer_sparc.cpp.incl" 27 28int InlineCacheBuffer::ic_stub_code_size() { 29#ifdef _LP64 30 if (TraceJumps) return 600 * wordSize; 31 return (NativeMovConstReg::instruction_size + // sethi;add 32 NativeJump::instruction_size + // sethi; jmp; delay slot 33 (1*BytesPerInstWord) + 1); // flush + 1 extra byte 34#else 35 if (TraceJumps) return 300 * wordSize; 36 return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer 37#endif 38} 39 40void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, oop cached_oop, address entry_point) { 41 ResourceMark rm; 42 CodeBuffer code(code_begin, ic_stub_code_size()); 43 MacroAssembler* masm = new MacroAssembler(&code); 44 // note: even though the code contains an embedded oop, we do not need reloc info 45 // because 46 // (1) the oop is old (i.e., doesn't matter for scavenges) 47 // (2) these ICStubs are removed *before* a GC happens, so the roots disappear 48 assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop"); 49 AddressLiteral cached_oop_addrlit(cached_oop, relocInfo::none); 50 // Force the set to generate the fixed sequence so next_instruction_address works 51 masm->patchable_set(cached_oop_addrlit, G5_inline_cache_reg); 52 assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub"); 53 assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub"); 54 AddressLiteral entry(entry_point); 55 masm->JUMP(entry, G3_scratch, 0); 56 masm->delayed()->nop(); 57 masm->flush(); 58} 59 60 61address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) { 62 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object 63 NativeJump* jump = nativeJump_at(move->next_instruction_address()); 64 return jump->jump_destination(); 65} 66 67 68oop InlineCacheBuffer::ic_buffer_cached_oop(address code_begin) { 69 NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object 70 NativeJump* jump = nativeJump_at(move->next_instruction_address()); 71 return (oop)move->data(); 72} 73