regmask.hpp revision 2073:b92c45f2bc75
1/* 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25#ifndef SHARE_VM_OPTO_REGMASK_HPP 26#define SHARE_VM_OPTO_REGMASK_HPP 27 28#include "code/vmreg.hpp" 29#include "libadt/port.hpp" 30#include "opto/optoreg.hpp" 31#ifdef TARGET_ARCH_MODEL_x86_32 32# include "adfiles/adGlobals_x86_32.hpp" 33#endif 34#ifdef TARGET_ARCH_MODEL_x86_64 35# include "adfiles/adGlobals_x86_64.hpp" 36#endif 37#ifdef TARGET_ARCH_MODEL_sparc 38# include "adfiles/adGlobals_sparc.hpp" 39#endif 40#ifdef TARGET_ARCH_MODEL_zero 41# include "adfiles/adGlobals_zero.hpp" 42#endif 43#ifdef TARGET_ARCH_MODEL_arm 44# include "adfiles/adGlobals_arm.hpp" 45#endif 46#ifdef TARGET_ARCH_MODEL_ppc 47# include "adfiles/adGlobals_ppc.hpp" 48#endif 49 50// Some fun naming (textual) substitutions: 51// 52// RegMask::get_low_elem() ==> RegMask::find_first_elem() 53// RegMask::Special ==> RegMask::Empty 54// RegMask::_flags ==> RegMask::is_AllStack() 55// RegMask::operator<<=() ==> RegMask::Insert() 56// RegMask::operator>>=() ==> RegMask::Remove() 57// RegMask::Union() ==> RegMask::OR 58// RegMask::Inter() ==> RegMask::AND 59// 60// OptoRegister::RegName ==> OptoReg::Name 61// 62// OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version 63// 64// numregs in chaitin ==> proper degree in chaitin 65 66//-------------Non-zero bit search methods used by RegMask--------------------- 67// Find lowest 1, or return 32 if empty 68int find_lowest_bit( uint32 mask ); 69// Find highest 1, or return 32 if empty 70int find_hihghest_bit( uint32 mask ); 71 72//------------------------------RegMask---------------------------------------- 73// The ADL file describes how to print the machine-specific registers, as well 74// as any notion of register classes. We provide a register mask, which is 75// just a collection of Register numbers. 76 77// The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. 78// RM_SIZE is the size of a register mask in words. 79// FORALL_BODY replicates a BODY macro once per word in the register mask. 80// The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. 81// However, it means the ADLC can redefine the unroll macro and all loops 82// over register masks will be unrolled by the correct amount. 83 84class RegMask VALUE_OBJ_CLASS_SPEC { 85 union { 86 double _dummy_force_double_alignment[RM_SIZE>>1]; 87 // Array of Register Mask bits. This array is large enough to cover 88 // all the machine registers and all parameters that need to be passed 89 // on the stack (stack registers) up to some interesting limit. Methods 90 // that need more parameters will NOT be compiled. On Intel, the limit 91 // is something like 90+ parameters. 92 int _A[RM_SIZE]; 93 }; 94 95 enum { 96 _WordBits = BitsPerInt, 97 _LogWordBits = LogBitsPerInt, 98 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef 99 }; 100 101public: 102 enum { CHUNK_SIZE = RM_SIZE*_WordBits }; 103 104 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. 105 // Also, consider the maximum alignment size for a normally allocated 106 // value. Since we allocate register pairs but not register quads (at 107 // present), this alignment is SlotsPerLong (== 2). A normally 108 // aligned allocated register is either a single register, or a pair 109 // of adjacent registers, the lower-numbered being even. 110 // See also is_aligned_Pairs() below, and the padding added before 111 // Matcher::_new_SP to keep allocated pairs aligned properly. 112 // If we ever go to quad-word allocations, SlotsPerQuad will become 113 // the controlling alignment constraint. Note that this alignment 114 // requirement is internal to the allocator, and independent of any 115 // particular platform. 116 enum { SlotsPerLong = 2 }; 117 118 // A constructor only used by the ADLC output. All mask fields are filled 119 // in directly. Calls to this look something like RM(1,2,3,4); 120 RegMask( 121# define BODY(I) int a##I, 122 FORALL_BODY 123# undef BODY 124 int dummy = 0 ) { 125# define BODY(I) _A[I] = a##I; 126 FORALL_BODY 127# undef BODY 128 } 129 130 // Handy copying constructor 131 RegMask( RegMask *rm ) { 132# define BODY(I) _A[I] = rm->_A[I]; 133 FORALL_BODY 134# undef BODY 135 } 136 137 // Construct an empty mask 138 RegMask( ) { Clear(); } 139 140 // Construct a mask with a single bit 141 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } 142 143 // Check for register being in mask 144 int Member( OptoReg::Name reg ) const { 145 assert( reg < CHUNK_SIZE, "" ); 146 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); 147 } 148 149 // The last bit in the register mask indicates that the mask should repeat 150 // indefinitely with ONE bits. Returns TRUE if mask is infinite or 151 // unbounded in size. Returns FALSE if mask is finite size. 152 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } 153 154 // Work around an -xO3 optimization problme in WS6U1. The old way: 155 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } 156 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() 157 // follows an Insert() loop, like the one found in init_spill_mask(). Using 158 // Insert() instead works because the index into _A in computed instead of 159 // constant. See bug 4665841. 160 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } 161 162 // Test for being a not-empty mask. 163 int is_NotEmpty( ) const { 164 int tmp = 0; 165# define BODY(I) tmp |= _A[I]; 166 FORALL_BODY 167# undef BODY 168 return tmp; 169 } 170 171 // Find lowest-numbered register from mask, or BAD if mask is empty. 172 OptoReg::Name find_first_elem() const { 173 int base, bits; 174# define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else 175 FORALL_BODY 176# undef BODY 177 { base = OptoReg::Bad; bits = 1<<0; } 178 return OptoReg::Name(base + find_lowest_bit(bits)); 179 } 180 // Get highest-numbered register from mask, or BAD if mask is empty. 181 OptoReg::Name find_last_elem() const { 182 int base, bits; 183# define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else 184 FORALL_BODY 185# undef BODY 186 { base = OptoReg::Bad; bits = 1<<0; } 187 return OptoReg::Name(base + find_hihghest_bit(bits)); 188 } 189 190 // Find the lowest-numbered register pair in the mask. Return the 191 // HIGHEST register number in the pair, or BAD if no pairs. 192 // Assert that the mask contains only bit pairs. 193 OptoReg::Name find_first_pair() const; 194 195 // Clear out partial bits; leave only aligned adjacent bit pairs. 196 void ClearToPairs(); 197 // Smear out partial bits; leave only aligned adjacent bit pairs. 198 void SmearToPairs(); 199 // Verify that the mask contains only aligned adjacent bit pairs 200 void VerifyPairs() const { assert( is_aligned_Pairs(), "mask is not aligned, adjacent pairs" ); } 201 // Test that the mask contains only aligned adjacent bit pairs 202 bool is_aligned_Pairs() const; 203 204 // mask is a pair of misaligned registers 205 bool is_misaligned_Pair() const { return Size()==2 && !is_aligned_Pairs();} 206 // Test for single register 207 int is_bound1() const; 208 // Test for a single adjacent pair 209 int is_bound2() const; 210 211 // Fast overlap test. Non-zero if any registers in common. 212 int overlap( const RegMask &rm ) const { 213 return 214# define BODY(I) (_A[I] & rm._A[I]) | 215 FORALL_BODY 216# undef BODY 217 0 ; 218 } 219 220 // Special test for register pressure based splitting 221 // UP means register only, Register plus stack, or stack only is DOWN 222 bool is_UP() const; 223 224 // Clear a register mask 225 void Clear( ) { 226# define BODY(I) _A[I] = 0; 227 FORALL_BODY 228# undef BODY 229 } 230 231 // Fill a register mask with 1's 232 void Set_All( ) { 233# define BODY(I) _A[I] = -1; 234 FORALL_BODY 235# undef BODY 236 } 237 238 // Insert register into mask 239 void Insert( OptoReg::Name reg ) { 240 assert( reg < CHUNK_SIZE, "" ); 241 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); 242 } 243 244 // Remove register from mask 245 void Remove( OptoReg::Name reg ) { 246 assert( reg < CHUNK_SIZE, "" ); 247 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); 248 } 249 250 // OR 'rm' into 'this' 251 void OR( const RegMask &rm ) { 252# define BODY(I) this->_A[I] |= rm._A[I]; 253 FORALL_BODY 254# undef BODY 255 } 256 257 // AND 'rm' into 'this' 258 void AND( const RegMask &rm ) { 259# define BODY(I) this->_A[I] &= rm._A[I]; 260 FORALL_BODY 261# undef BODY 262 } 263 264 // Subtract 'rm' from 'this' 265 void SUBTRACT( const RegMask &rm ) { 266# define BODY(I) _A[I] &= ~rm._A[I]; 267 FORALL_BODY 268# undef BODY 269 } 270 271 // Compute size of register mask: number of bits 272 uint Size() const; 273 274#ifndef PRODUCT 275 void print() const { dump(); } 276 void dump() const; // Print a mask 277#endif 278 279 static const RegMask Empty; // Common empty mask 280 281 static bool can_represent(OptoReg::Name reg) { 282 // NOTE: -1 in computation reflects the usage of the last 283 // bit of the regmask as an infinite stack flag. 284 return (int)reg < (int)(CHUNK_SIZE-1); 285 } 286}; 287 288// Do not use this constant directly in client code! 289#undef RM_SIZE 290 291#endif // SHARE_VM_OPTO_REGMASK_HPP 292