postaloc.cpp revision 605:98cb887364d3
1/* 2 * Copyright 1998-2008 Sun Microsystems, Inc. All Rights Reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 20 * CA 95054 USA or visit www.sun.com if you need additional information or 21 * have any questions. 22 * 23 */ 24 25#include "incls/_precompiled.incl" 26#include "incls/_postaloc.cpp.incl" 27 28// see if this register kind does not requires two registers 29static bool is_single_register(uint x) { 30#ifdef _LP64 31 return (x != Op_RegD && x != Op_RegL && x != Op_RegP); 32#else 33 return (x != Op_RegD && x != Op_RegL); 34#endif 35} 36 37//---------------------------may_be_copy_of_callee----------------------------- 38// Check to see if we can possibly be a copy of a callee-save value. 39bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { 40 // Short circuit if there are no callee save registers 41 if (_matcher.number_of_saved_registers() == 0) return false; 42 43 // Expect only a spill-down and reload on exit for callee-save spills. 44 // Chains of copies cannot be deep. 45 // 5008997 - This is wishful thinking. Register allocator seems to 46 // be splitting live ranges for callee save registers to such 47 // an extent that in large methods the chains can be very long 48 // (50+). The conservative answer is to return true if we don't 49 // know as this prevents optimizations from occurring. 50 51 const int limit = 60; 52 int i; 53 for( i=0; i < limit; i++ ) { 54 if( def->is_Proj() && def->in(0)->is_Start() && 55 _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) ) 56 return true; // Direct use of callee-save proj 57 if( def->is_Copy() ) // Copies carry value through 58 def = def->in(def->is_Copy()); 59 else if( def->is_Phi() ) // Phis can merge it from any direction 60 def = def->in(1); 61 else 62 break; 63 guarantee(def != NULL, "must not resurrect dead copy"); 64 } 65 // If we reached the end and didn't find a callee save proj 66 // then this may be a callee save proj so we return true 67 // as the conservative answer. If we didn't reach then end 68 // we must have discovered that it was not a callee save 69 // else we would have returned. 70 return i == limit; 71} 72 73 74 75//------------------------------yank_if_dead----------------------------------- 76// Removed an edge from 'old'. Yank if dead. Return adjustment counts to 77// iterators in the current block. 78int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { 79 int blk_adjust=0; 80 while (old->outcnt() == 0 && old != C->top()) { 81 Block *oldb = _cfg._bbs[old->_idx]; 82 oldb->find_remove(old); 83 // Count 1 if deleting an instruction from the current block 84 if( oldb == current_block ) blk_adjust++; 85 _cfg._bbs.map(old->_idx,NULL); 86 OptoReg::Name old_reg = lrgs(n2lidx(old)).reg(); 87 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? 88 value->map(old_reg,NULL); // Yank from value/regnd maps 89 regnd->map(old_reg,NULL); // This register's value is now unknown 90 } 91 Node *tmp = old->req() > 1 ? old->in(1) : NULL; 92 old->disconnect_inputs(NULL); 93 if( !tmp ) break; 94 old = tmp; 95 } 96 return blk_adjust; 97} 98 99//------------------------------use_prior_register----------------------------- 100// Use the prior value instead of the current value, in an effort to make 101// the current value go dead. Return block iterator adjustment, in case 102// we yank some instructions from this block. 103int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { 104 // No effect? 105 if( def == n->in(idx) ) return 0; 106 // Def is currently dead and can be removed? Do not resurrect 107 if( def->outcnt() == 0 ) return 0; 108 109 // Not every pair of physical registers are assignment compatible, 110 // e.g. on sparc floating point registers are not assignable to integer 111 // registers. 112 const LRG &def_lrg = lrgs(n2lidx(def)); 113 OptoReg::Name def_reg = def_lrg.reg(); 114 const RegMask &use_mask = n->in_RegMask(idx); 115 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) 116 : (use_mask.is_AllStack() != 0)); 117 // Check for a copy to or from a misaligned pair. 118 can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair(); 119 120 if (!can_use) 121 return 0; 122 123 // Capture the old def in case it goes dead... 124 Node *old = n->in(idx); 125 126 // Save-on-call copies can only be elided if the entire copy chain can go 127 // away, lest we get the same callee-save value alive in 2 locations at 128 // once. We check for the obvious trivial case here. Although it can 129 // sometimes be elided with cooperation outside our scope, here we will just 130 // miss the opportunity. :-( 131 if( may_be_copy_of_callee(def) ) { 132 if( old->outcnt() > 1 ) return 0; // We're the not last user 133 int idx = old->is_Copy(); 134 assert( idx, "chain of copies being removed" ); 135 Node *old2 = old->in(idx); // Chain of copies 136 if( old2->outcnt() > 1 ) return 0; // old is not the last user 137 int idx2 = old2->is_Copy(); 138 if( !idx2 ) return 0; // Not a chain of 2 copies 139 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies 140 } 141 142 // Use the new def 143 n->set_req(idx,def); 144 _post_alloc++; 145 146 // Is old def now dead? We successfully yanked a copy? 147 return yank_if_dead(old,current_block,&value,®nd); 148} 149 150 151//------------------------------skip_copies------------------------------------ 152// Skip through any number of copies (that don't mod oop-i-ness) 153Node *PhaseChaitin::skip_copies( Node *c ) { 154 int idx = c->is_Copy(); 155 uint is_oop = lrgs(n2lidx(c))._is_oop; 156 while (idx != 0) { 157 guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); 158 if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop) 159 break; // casting copy, not the same value 160 c = c->in(idx); 161 idx = c->is_Copy(); 162 } 163 return c; 164} 165 166//------------------------------elide_copy------------------------------------- 167// Remove (bypass) copies along Node n, edge k. 168int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { 169 int blk_adjust = 0; 170 171 uint nk_idx = n2lidx(n->in(k)); 172 OptoReg::Name nk_reg = lrgs(nk_idx ).reg(); 173 174 // Remove obvious same-register copies 175 Node *x = n->in(k); 176 int idx; 177 while( (idx=x->is_Copy()) != 0 ) { 178 Node *copy = x->in(idx); 179 guarantee(copy != NULL, "must not resurrect dead copy"); 180 if( lrgs(n2lidx(copy)).reg() != nk_reg ) break; 181 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); 182 if( n->in(k) != copy ) break; // Failed for some cutout? 183 x = copy; // Progress, try again 184 } 185 186 // Phis and 2-address instructions cannot change registers so easily - their 187 // outputs must match their input. 188 if( !can_change_regs ) 189 return blk_adjust; // Only check stupid copies! 190 191 // Loop backedges won't have a value-mapping yet 192 if( &value == NULL ) return blk_adjust; 193 194 // Skip through all copies to the _value_ being used. Do not change from 195 // int to pointer. This attempts to jump through a chain of copies, where 196 // intermediate copies might be illegal, i.e., value is stored down to stack 197 // then reloaded BUT survives in a register the whole way. 198 Node *val = skip_copies(n->in(k)); 199 200 if( val == x ) return blk_adjust; // No progress? 201 202 bool single = is_single_register(val->ideal_reg()); 203 uint val_idx = n2lidx(val); 204 OptoReg::Name val_reg = lrgs(val_idx).reg(); 205 206 // See if it happens to already be in the correct register! 207 // (either Phi's direct register, or the common case of the name 208 // never-clobbered original-def register) 209 if( value[val_reg] == val && 210 // Doubles check both halves 211 ( single || value[val_reg-1] == val ) ) { 212 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); 213 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying 214 return blk_adjust; 215 } 216 217 // See if we can skip the copy by changing registers. Don't change from 218 // using a register to using the stack unless we know we can remove a 219 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill 220 // ops reading from memory instead of just loading once and using the 221 // register. 222 223 // Also handle duplicate copies here. 224 const Type *t = val->is_Con() ? val->bottom_type() : NULL; 225 226 // Scan all registers to see if this value is around already 227 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { 228 if (reg == (uint)nk_reg) { 229 // Found ourselves so check if there is only one user of this 230 // copy and keep on searching for a better copy if so. 231 bool ignore_self = true; 232 x = n->in(k); 233 DUIterator_Fast imax, i = x->fast_outs(imax); 234 Node* first = x->fast_out(i); i++; 235 while (i < imax && ignore_self) { 236 Node* use = x->fast_out(i); i++; 237 if (use != first) ignore_self = false; 238 } 239 if (ignore_self) continue; 240 } 241 242 Node *vv = value[reg]; 243 if( !single ) { // Doubles check for aligned-adjacent pair 244 if( (reg&1)==0 ) continue; // Wrong half of a pair 245 if( vv != value[reg-1] ) continue; // Not a complete pair 246 } 247 if( vv == val || // Got a direct hit? 248 (t && vv && vv->bottom_type() == t && vv->is_Mach() && 249 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? 250 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); 251 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR 252 OptoReg::is_reg(reg) || // turning into a register use OR 253 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use 254 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); 255 if( n->in(k) == regnd[reg] ) // Success! Quit trying 256 return blk_adjust; 257 } // End of if not degrading to a stack 258 } // End of if found value in another register 259 } // End of scan all machine registers 260 return blk_adjust; 261} 262 263 264// 265// Check if nreg already contains the constant value val. Normal copy 266// elimination doesn't doesn't work on constants because multiple 267// nodes can represent the same constant so the type and rule of the 268// MachNode must be checked to ensure equivalence. 269// 270bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, 271 Block *current_block, 272 Node_List& value, Node_List& regnd, 273 OptoReg::Name nreg, OptoReg::Name nreg2) { 274 if (value[nreg] != val && val->is_Con() && 275 value[nreg] != NULL && value[nreg]->is_Con() && 276 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && 277 value[nreg]->bottom_type() == val->bottom_type() && 278 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { 279 // This code assumes that two MachNodes representing constants 280 // which have the same rule and the same bottom type will produce 281 // identical effects into a register. This seems like it must be 282 // objectively true unless there are hidden inputs to the nodes 283 // but if that were to change this code would need to updated. 284 // Since they are equivalent the second one if redundant and can 285 // be removed. 286 // 287 // n will be replaced with the old value but n might have 288 // kills projections associated with it so remove them now so that 289 // yank_if_dead will be able to eliminate the copy once the uses 290 // have been transferred to the old[value]. 291 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 292 Node* use = n->fast_out(i); 293 if (use->is_Proj() && use->outcnt() == 0) { 294 // Kill projections have no users and one input 295 use->set_req(0, C->top()); 296 yank_if_dead(use, current_block, &value, ®nd); 297 --i; --imax; 298 } 299 } 300 _post_alloc++; 301 return true; 302 } 303 return false; 304} 305 306 307//------------------------------post_allocate_copy_removal--------------------- 308// Post-Allocation peephole copy removal. We do this in 1 pass over the 309// basic blocks. We maintain a mapping of registers to Nodes (an array of 310// Nodes indexed by machine register or stack slot number). NULL means that a 311// register is not mapped to any Node. We can (want to have!) have several 312// registers map to the same Node. We walk forward over the instructions 313// updating the mapping as we go. At merge points we force a NULL if we have 314// to merge 2 different Nodes into the same register. Phi functions will give 315// us a new Node if there is a proper value merging. Since the blocks are 316// arranged in some RPO, we will visit all parent blocks before visiting any 317// successor blocks (except at loops). 318// 319// If we find a Copy we look to see if the Copy's source register is a stack 320// slot and that value has already been loaded into some machine register; if 321// so we use machine register directly. This turns a Load into a reg-reg 322// Move. We also look for reloads of identical constants. 323// 324// When we see a use from a reg-reg Copy, we will attempt to use the copy's 325// source directly and make the copy go dead. 326void PhaseChaitin::post_allocate_copy_removal() { 327 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) 328 ResourceMark rm; 329 330 // Need a mapping from basic block Node_Lists. We need a Node_List to 331 // map from register number to value-producing Node. 332 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); 333 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); 334 // Need a mapping from basic block Node_Lists. We need a Node_List to 335 // map from register number to register-defining Node. 336 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1); 337 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) ); 338 339 // We keep unused Node_Lists on a free_list to avoid wasting 340 // memory. 341 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16); 342 343 // For all blocks 344 for( uint i = 0; i < _cfg._num_blocks; i++ ) { 345 uint j; 346 Block *b = _cfg._blocks[i]; 347 348 // Count of Phis in block 349 uint phi_dex; 350 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) { 351 Node *phi = b->_nodes[phi_dex]; 352 if( !phi->is_Phi() ) 353 break; 354 } 355 356 // If any predecessor has not been visited, we do not know the state 357 // of registers at the start. Check for this, while updating copies 358 // along Phi input edges 359 bool missing_some_inputs = false; 360 Block *freed = NULL; 361 for( j = 1; j < b->num_preds(); j++ ) { 362 Block *pb = _cfg._bbs[b->pred(j)->_idx]; 363 // Remove copies along phi edges 364 for( uint k=1; k<phi_dex; k++ ) 365 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false ); 366 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge? 367 // See if this predecessor's mappings have been used by everybody 368 // who wants them. If so, free 'em. 369 uint k; 370 for( k=0; k<pb->_num_succs; k++ ) { 371 Block *pbsucc = pb->_succs[k]; 372 if( !blk2value[pbsucc->_pre_order] && pbsucc != b ) 373 break; // Found a future user 374 } 375 if( k >= pb->_num_succs ) { // No more uses, free! 376 freed = pb; // Record last block freed 377 free_list.push(blk2value[pb->_pre_order]); 378 free_list.push(blk2regnd[pb->_pre_order]); 379 } 380 } else { // This block has unvisited (loopback) inputs 381 missing_some_inputs = true; 382 } 383 } 384 385 386 // Extract Node_List mappings. If 'freed' is non-zero, we just popped 387 // 'freed's blocks off the list 388 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); 389 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); 390 assert( !freed || blk2value[freed->_pre_order] == &value, "" ); 391 value.map(_max_reg,NULL); 392 regnd.map(_max_reg,NULL); 393 // Set mappings as OUR mappings 394 blk2value[b->_pre_order] = &value; 395 blk2regnd[b->_pre_order] = ®nd; 396 397 // Initialize value & regnd for this block 398 if( missing_some_inputs ) { 399 // Some predecessor has not yet been visited; zap map to empty 400 for( uint k = 0; k < (uint)_max_reg; k++ ) { 401 value.map(k,NULL); 402 regnd.map(k,NULL); 403 } 404 } else { 405 if( !freed ) { // Didn't get a freebie prior block 406 // Must clone some data 407 freed = _cfg._bbs[b->pred(1)->_idx]; 408 Node_List &f_value = *blk2value[freed->_pre_order]; 409 Node_List &f_regnd = *blk2regnd[freed->_pre_order]; 410 for( uint k = 0; k < (uint)_max_reg; k++ ) { 411 value.map(k,f_value[k]); 412 regnd.map(k,f_regnd[k]); 413 } 414 } 415 // Merge all inputs together, setting to NULL any conflicts. 416 for( j = 1; j < b->num_preds(); j++ ) { 417 Block *pb = _cfg._bbs[b->pred(j)->_idx]; 418 if( pb == freed ) continue; // Did self already via freelist 419 Node_List &p_regnd = *blk2regnd[pb->_pre_order]; 420 for( uint k = 0; k < (uint)_max_reg; k++ ) { 421 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? 422 value.map(k,NULL); // Then no value handy 423 regnd.map(k,NULL); 424 } 425 } 426 } 427 } 428 429 // For all Phi's 430 for( j = 1; j < phi_dex; j++ ) { 431 uint k; 432 Node *phi = b->_nodes[j]; 433 uint pidx = n2lidx(phi); 434 OptoReg::Name preg = lrgs(n2lidx(phi)).reg(); 435 436 // Remove copies remaining on edges. Check for junk phi. 437 Node *u = NULL; 438 for( k=1; k<phi->req(); k++ ) { 439 Node *x = phi->in(k); 440 if( phi != x && u != x ) // Found a different input 441 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input 442 } 443 if( u != NodeSentinel ) { // Junk Phi. Remove 444 b->_nodes.remove(j--); phi_dex--; 445 _cfg._bbs.map(phi->_idx,NULL); 446 phi->replace_by(u); 447 phi->disconnect_inputs(NULL); 448 continue; 449 } 450 // Note that if value[pidx] exists, then we merged no new values here 451 // and the phi is useless. This can happen even with the above phi 452 // removal for complex flows. I cannot keep the better known value here 453 // because locally the phi appears to define a new merged value. If I 454 // keep the better value then a copy of the phi, being unable to use the 455 // global flow analysis, can't "peek through" the phi to the original 456 // reaching value and so will act like it's defining a new value. This 457 // can lead to situations where some uses are from the old and some from 458 // the new values. Not illegal by itself but throws the over-strong 459 // assert in scheduling. 460 if( pidx ) { 461 value.map(preg,phi); 462 regnd.map(preg,phi); 463 OptoReg::Name preg_lo = OptoReg::add(preg,-1); 464 if( !is_single_register(phi->ideal_reg()) ) { 465 value.map(preg_lo,phi); 466 regnd.map(preg_lo,phi); 467 } 468 } 469 } 470 471 // For all remaining instructions 472 for( j = phi_dex; j < b->_nodes.size(); j++ ) { 473 Node *n = b->_nodes[j]; 474 475 if( n->outcnt() == 0 && // Dead? 476 n != C->top() && // (ignore TOP, it has no du info) 477 !n->is_Proj() ) { // fat-proj kills 478 j -= yank_if_dead(n,b,&value,®nd); 479 continue; 480 } 481 482 // Improve reaching-def info. Occasionally post-alloc's liveness gives 483 // up (at loop backedges, because we aren't doing a full flow pass). 484 // The presence of a live use essentially asserts that the use's def is 485 // alive and well at the use (or else the allocator fubar'd). Take 486 // advantage of this info to set a reaching def for the use-reg. 487 uint k; 488 for( k = 1; k < n->req(); k++ ) { 489 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE 490 guarantee(def != NULL, "no disconnected nodes at this point"); 491 uint useidx = n2lidx(def); // useidx is the live range index for this USE 492 493 if( useidx ) { 494 OptoReg::Name ureg = lrgs(useidx).reg(); 495 if( !value[ureg] ) { 496 int idx; // Skip occasional useless copy 497 while( (idx=def->is_Copy()) != 0 && 498 def->in(idx) != NULL && // NULL should not happen 499 ureg == lrgs(n2lidx(def->in(idx))).reg() ) 500 def = def->in(idx); 501 Node *valdef = skip_copies(def); // tighten up val through non-useless copies 502 value.map(ureg,valdef); // record improved reaching-def info 503 regnd.map(ureg, def); 504 // Record other half of doubles 505 OptoReg::Name ureg_lo = OptoReg::add(ureg,-1); 506 if( !is_single_register(def->ideal_reg()) && 507 ( !RegMask::can_represent(ureg_lo) || 508 lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent 509 !value[ureg_lo] ) { 510 value.map(ureg_lo,valdef); // record improved reaching-def info 511 regnd.map(ureg_lo, def); 512 } 513 } 514 } 515 } 516 517 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; 518 519 // Remove copies along input edges 520 for( k = 1; k < n->req(); k++ ) 521 j -= elide_copy( n, k, b, value, regnd, two_adr!=k ); 522 523 // Unallocated Nodes define no registers 524 uint lidx = n2lidx(n); 525 if( !lidx ) continue; 526 527 // Update the register defined by this instruction 528 OptoReg::Name nreg = lrgs(lidx).reg(); 529 // Skip through all copies to the _value_ being defined. 530 // Do not change from int to pointer 531 Node *val = skip_copies(n); 532 533 uint n_ideal_reg = n->ideal_reg(); 534 if( is_single_register(n_ideal_reg) ) { 535 // If Node 'n' does not change the value mapped by the register, 536 // then 'n' is a useless copy. Do not update the register->node 537 // mapping so 'n' will go dead. 538 if( value[nreg] != val ) { 539 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) { 540 n->replace_by(regnd[nreg]); 541 j -= yank_if_dead(n,b,&value,®nd); 542 } else { 543 // Update the mapping: record new Node defined by the register 544 regnd.map(nreg,n); 545 // Update mapping for defined *value*, which is the defined 546 // Node after skipping all copies. 547 value.map(nreg,val); 548 } 549 } else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) { 550 assert( n->is_Copy(), "" ); 551 n->replace_by(regnd[nreg]); 552 j -= yank_if_dead(n,b,&value,®nd); 553 } 554 } else { 555 // If the value occupies a register pair, record same info 556 // in both registers. 557 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); 558 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or 559 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent 560 // Sparc occasionally has non-adjacent pairs. 561 // Find the actual other value 562 RegMask tmp = lrgs(lidx).mask(); 563 tmp.Remove(nreg); 564 nreg_lo = tmp.find_first_elem(); 565 } 566 if( value[nreg] != val || value[nreg_lo] != val ) { 567 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) { 568 n->replace_by(regnd[nreg]); 569 j -= yank_if_dead(n,b,&value,®nd); 570 } else { 571 regnd.map(nreg , n ); 572 regnd.map(nreg_lo, n ); 573 value.map(nreg ,val); 574 value.map(nreg_lo,val); 575 } 576 } else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) { 577 assert( n->is_Copy(), "" ); 578 n->replace_by(regnd[nreg]); 579 j -= yank_if_dead(n,b,&value,®nd); 580 } 581 } 582 583 // Fat projections kill many registers 584 if( n_ideal_reg == MachProjNode::fat_proj ) { 585 RegMask rm = n->out_RegMask(); 586 // wow, what an expensive iterator... 587 nreg = rm.find_first_elem(); 588 while( OptoReg::is_valid(nreg)) { 589 rm.Remove(nreg); 590 value.map(nreg,n); 591 regnd.map(nreg,n); 592 nreg = rm.find_first_elem(); 593 } 594 } 595 596 } // End of for all instructions in the block 597 598 } // End for all blocks 599} 600