output.hpp revision 5776:de6a9e811145 
1/*
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
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23 */
24
25#ifndef SHARE_VM_OPTO_OUTPUT_HPP
26#define SHARE_VM_OPTO_OUTPUT_HPP
27
28#include "opto/block.hpp"
29#include "opto/node.hpp"
30#ifdef TARGET_ARCH_MODEL_x86_32
31# include "adfiles/ad_x86_32.hpp"
32#endif
33#ifdef TARGET_ARCH_MODEL_x86_64
34# include "adfiles/ad_x86_64.hpp"
35#endif
36#ifdef TARGET_ARCH_MODEL_sparc
37# include "adfiles/ad_sparc.hpp"
38#endif
39#ifdef TARGET_ARCH_MODEL_zero
40# include "adfiles/ad_zero.hpp"
41#endif
42#ifdef TARGET_ARCH_MODEL_arm
43# include "adfiles/ad_arm.hpp"
44#endif
45#ifdef TARGET_ARCH_MODEL_ppc
46# include "adfiles/ad_ppc.hpp"
47#endif
48
49class Arena;
50class Bundle;
51class Block;
52class Block_Array;
53class Node;
54class Node_Array;
55class Node_List;
56class PhaseCFG;
57class PhaseChaitin;
58class Pipeline_Use_Element;
59class Pipeline_Use;
60
61#ifndef PRODUCT
62#define DEBUG_ARG(x) , x
63#else
64#define DEBUG_ARG(x)
65#endif
66
67// Define the initial sizes for allocation of the resizable code buffer
68enum {
69  initial_code_capacity  =  16 * 1024,
70  initial_stub_capacity  =   4 * 1024,
71  initial_const_capacity =   4 * 1024,
72  initial_locs_capacity  =   3 * 1024
73};
74
75//------------------------------Scheduling----------------------------------
76// This class contains all the information necessary to implement instruction
77// scheduling and bundling.
78class Scheduling {
79
80private:
81  // Arena to use
82  Arena *_arena;
83
84  // Control-Flow Graph info
85  PhaseCFG *_cfg;
86
87  // Register Allocation info
88  PhaseRegAlloc *_regalloc;
89
90  // Number of nodes in the method
91  uint _node_bundling_limit;
92
93  // List of scheduled nodes. Generated in reverse order
94  Node_List _scheduled;
95
96  // List of nodes currently available for choosing for scheduling
97  Node_List _available;
98
99  // For each instruction beginning a bundle, the number of following
100  // nodes to be bundled with it.
101  Bundle *_node_bundling_base;
102
103  // Mapping from register to Node
104  Node_List _reg_node;
105
106  // Free list for pinch nodes.
107  Node_List _pinch_free_list;
108
109  // Latency from the beginning of the containing basic block (base 1)
110  // for each node.
111  unsigned short *_node_latency;
112
113  // Number of uses of this node within the containing basic block.
114  short *_uses;
115
116  // Schedulable portion of current block.  Skips Region/Phi/CreateEx up
117  // front, branch+proj at end.  Also skips Catch/CProj (same as
118  // branch-at-end), plus just-prior exception-throwing call.
119  uint _bb_start, _bb_end;
120
121  // Latency from the end of the basic block as scheduled
122  unsigned short *_current_latency;
123
124  // Remember the next node
125  Node *_next_node;
126
127  // Use this for an unconditional branch delay slot
128  Node *_unconditional_delay_slot;
129
130  // Pointer to a Nop
131  MachNopNode *_nop;
132
133  // Length of the current bundle, in instructions
134  uint _bundle_instr_count;
135
136  // Current Cycle number, for computing latencies and bundling
137  uint _bundle_cycle_number;
138
139  // Bundle information
140  Pipeline_Use_Element _bundle_use_elements[resource_count];
141  Pipeline_Use         _bundle_use;
142
143  // Dump the available list
144  void dump_available() const;
145
146public:
147  Scheduling(Arena *arena, Compile &compile);
148
149  // Destructor
150  NOT_PRODUCT( ~Scheduling(); )
151
152  // Step ahead "i" cycles
153  void step(uint i);
154
155  // Step ahead 1 cycle, and clear the bundle state (for example,
156  // at a branch target)
157  void step_and_clear();
158
159  Bundle* node_bundling(const Node *n) {
160    assert(valid_bundle_info(n), "oob");
161    return (&_node_bundling_base[n->_idx]);
162  }
163
164  bool valid_bundle_info(const Node *n) const {
165    return (_node_bundling_limit > n->_idx);
166  }
167
168  bool starts_bundle(const Node *n) const {
169    return (_node_bundling_limit > n->_idx && _node_bundling_base[n->_idx].starts_bundle());
170  }
171
172  // Do the scheduling
173  void DoScheduling();
174
175  // Compute the local latencies walking forward over the list of
176  // nodes for a basic block
177  void ComputeLocalLatenciesForward(const Block *bb);
178
179  // Compute the register antidependencies within a basic block
180  void ComputeRegisterAntidependencies(Block *bb);
181  void verify_do_def( Node *n, OptoReg::Name def, const char *msg );
182  void verify_good_schedule( Block *b, const char *msg );
183  void anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def );
184  void anti_do_use( Block *b, Node *use, OptoReg::Name use_reg );
185
186  // Add a node to the current bundle
187  void AddNodeToBundle(Node *n, const Block *bb);
188
189  // Add a node to the list of available nodes
190  void AddNodeToAvailableList(Node *n);
191
192  // Compute the local use count for the nodes in a block, and compute
193  // the list of instructions with no uses in the block as available
194  void ComputeUseCount(const Block *bb);
195
196  // Choose an instruction from the available list to add to the bundle
197  Node * ChooseNodeToBundle();
198
199  // See if this Node fits into the currently accumulating bundle
200  bool NodeFitsInBundle(Node *n);
201
202  // Decrement the use count for a node
203 void DecrementUseCounts(Node *n, const Block *bb);
204
205  // Garbage collect pinch nodes for reuse by other blocks.
206  void garbage_collect_pinch_nodes();
207  // Clean up a pinch node for reuse (helper for above).
208  void cleanup_pinch( Node *pinch );
209
210  // Information for statistics gathering
211#ifndef PRODUCT
212private:
213  // Gather information on size of nops relative to total
214  uint _branches, _unconditional_delays;
215
216  static uint _total_nop_size, _total_method_size;
217  static uint _total_branches, _total_unconditional_delays;
218  static uint _total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
219
220public:
221  static void print_statistics();
222
223  static void increment_instructions_per_bundle(uint i) {
224    _total_instructions_per_bundle[i]++;
225  }
226
227  static void increment_nop_size(uint s) {
228    _total_nop_size += s;
229  }
230
231  static void increment_method_size(uint s) {
232    _total_method_size += s;
233  }
234#endif
235
236};
237
238#endif // SHARE_VM_OPTO_OUTPUT_HPP
239