machnode.hpp revision 1915:2f644f85485d
1/*
2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25#ifndef SHARE_VM_OPTO_MACHNODE_HPP
26#define SHARE_VM_OPTO_MACHNODE_HPP
27
28#include "opto/callnode.hpp"
29#include "opto/matcher.hpp"
30#include "opto/multnode.hpp"
31#include "opto/node.hpp"
32#include "opto/regmask.hpp"
33
34class BufferBlob;
35class CodeBuffer;
36class JVMState;
37class MachCallDynamicJavaNode;
38class MachCallJavaNode;
39class MachCallLeafNode;
40class MachCallNode;
41class MachCallRuntimeNode;
42class MachCallStaticJavaNode;
43class MachEpilogNode;
44class MachIfNode;
45class MachNullCheckNode;
46class MachOper;
47class MachProjNode;
48class MachPrologNode;
49class MachReturnNode;
50class MachSafePointNode;
51class MachSpillCopyNode;
52class Matcher;
53class PhaseRegAlloc;
54class RegMask;
55class State;
56
57//---------------------------MachOper------------------------------------------
58class MachOper : public ResourceObj {
59public:
60  // Allocate right next to the MachNodes in the same arena
61  void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); }
62
63  // Opcode
64  virtual uint opcode() const = 0;
65
66  // Number of input edges.
67  // Generally at least 1
68  virtual uint num_edges() const { return 1; }
69  // Array of Register masks
70  virtual const RegMask *in_RegMask(int index) const;
71
72  // Methods to output the encoding of the operand
73
74  // Negate conditional branches.  Error for non-branch Nodes
75  virtual void negate();
76
77  // Return the value requested
78  // result register lookup, corresponding to int_format
79  virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
80  // input register lookup, corresponding to ext_format
81  virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
82
83  // helpers for MacroAssembler generation from ADLC
84  Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
85    return ::as_Register(reg(ra_, node));
86  }
87  Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
88    return ::as_Register(reg(ra_, node, idx));
89  }
90  FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
91    return ::as_FloatRegister(reg(ra_, node));
92  }
93  FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
94    return ::as_FloatRegister(reg(ra_, node, idx));
95  }
96
97#if defined(IA32) || defined(AMD64)
98  XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
99    return ::as_XMMRegister(reg(ra_, node));
100  }
101  XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
102    return ::as_XMMRegister(reg(ra_, node, idx));
103  }
104#endif
105
106  virtual intptr_t  constant() const;
107  virtual bool constant_is_oop() const;
108  virtual jdouble constantD() const;
109  virtual jfloat  constantF() const;
110  virtual jlong   constantL() const;
111  virtual TypeOopPtr *oop() const;
112  virtual int  ccode() const;
113  // A zero, default, indicates this value is not needed.
114  // May need to lookup the base register, as done in int_ and ext_format
115  virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
116  virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
117  virtual int  scale() const;
118  // Parameters needed to support MEMORY_INTERFACE access to stackSlot
119  virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
120  // Check for PC-Relative displacement
121  virtual bool disp_is_oop() const;
122  virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
123  virtual int  base_position()  const;  // base edge position, or -1
124  virtual int  index_position() const;  // index edge position, or -1
125
126  // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
127  // Only returns non-null value for i486.ad's indOffset32X
128  virtual const TypePtr *disp_as_type() const { return NULL; }
129
130  // Return the label
131  virtual Label *label() const;
132
133  // Return the method's address
134  virtual intptr_t  method() const;
135
136  // Hash and compare over operands are currently identical
137  virtual uint  hash() const;
138  virtual uint  cmp( const MachOper &oper ) const;
139
140  // Virtual clone, since I do not know how big the MachOper is.
141  virtual MachOper *clone(Compile* C) const = 0;
142
143  // Return ideal Type from simple operands.  Fail for complex operands.
144  virtual const Type *type() const;
145
146  // Set an integer offset if we have one, or error otherwise
147  virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
148
149#ifndef PRODUCT
150  // Return name of operand
151  virtual const char    *Name() const { return "???";}
152
153  // Methods to output the text version of the operand
154  virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
155  virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
156
157  virtual void dump_spec(outputStream *st) const; // Print per-operand info
158#endif
159};
160
161//------------------------------MachNode---------------------------------------
162// Base type for all machine specific nodes.  All node classes generated by the
163// ADLC inherit from this class.
164class MachNode : public Node {
165public:
166  MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
167    init_class_id(Class_Mach);
168  }
169  // Required boilerplate
170  virtual uint size_of() const { return sizeof(MachNode); }
171  virtual int  Opcode() const;          // Always equal to MachNode
172  virtual uint rule() const = 0;        // Machine-specific opcode
173  // Number of inputs which come before the first operand.
174  // Generally at least 1, to skip the Control input
175  virtual uint oper_input_base() const { return 1; }
176
177  // Copy inputs and operands to new node of instruction.
178  // Called from cisc_version() and short_branch_version().
179  // !!!! The method's body is defined in ad_<arch>.cpp file.
180  void fill_new_machnode(MachNode *n, Compile* C) const;
181
182  // Return an equivalent instruction using memory for cisc_operand position
183  virtual MachNode *cisc_version(int offset, Compile* C);
184  // Modify this instruction's register mask to use stack version for cisc_operand
185  virtual void use_cisc_RegMask();
186
187  // Support for short branches
188  virtual MachNode *short_branch_version(Compile* C) { return NULL; }
189  bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
190
191  // First index in _in[] corresponding to operand, or -1 if there is none
192  int  operand_index(uint operand) const;
193
194  // Register class input is expected in
195  virtual const RegMask &in_RegMask(uint) const;
196
197  // cisc-spillable instructions redefine for use by in_RegMask
198  virtual const RegMask *cisc_RegMask() const { return NULL; }
199
200  // If this instruction is a 2-address instruction, then return the
201  // index of the input which must match the output.  Not nessecary
202  // for instructions which bind the input and output register to the
203  // same singleton regiser (e.g., Intel IDIV which binds AX to be
204  // both an input and an output).  It is nessecary when the input and
205  // output have choices - but they must use the same choice.
206  virtual uint two_adr( ) const { return 0; }
207
208  // Array of complex operand pointers.  Each corresponds to zero or
209  // more leafs.  Must be set by MachNode constructor to point to an
210  // internal array of MachOpers.  The MachOper array is sized by
211  // specific MachNodes described in the ADL.
212  uint _num_opnds;
213  MachOper **_opnds;
214  uint  num_opnds() const { return _num_opnds; }
215
216  // Emit bytes into cbuf
217  virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
218  // Size of instruction in bytes
219  virtual uint  size(PhaseRegAlloc *ra_) const;
220  // Helper function that computes size by emitting code
221  virtual uint  emit_size(PhaseRegAlloc *ra_) const;
222
223  // Return the alignment required (in units of relocInfo::addr_unit())
224  // for this instruction (must be a power of 2)
225  virtual int   alignment_required() const { return 1; }
226
227  // Return the padding (in bytes) to be emitted before this
228  // instruction to properly align it.
229  virtual int   compute_padding(int current_offset) const { return 0; }
230
231  // Return number of relocatable values contained in this instruction
232  virtual int   reloc() const { return 0; }
233
234  // Hash and compare over operands.  Used to do GVN on machine Nodes.
235  virtual uint  hash() const;
236  virtual uint  cmp( const Node &n ) const;
237
238  // Expand method for MachNode, replaces nodes representing pseudo
239  // instructions with a set of nodes which represent real machine
240  // instructions and compute the same value.
241  virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
242
243  // Bottom_type call; value comes from operand0
244  virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
245  virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
246
247  // If this is a memory op, return the base pointer and fixed offset.
248  // If there are no such, return NULL.  If there are multiple addresses
249  // or the address is indeterminate (rare cases) then return (Node*)-1,
250  // which serves as node bottom.
251  // If the offset is not statically determined, set it to Type::OffsetBot.
252  // This method is free to ignore stack slots if that helps.
253  #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
254  // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
255  const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
256
257  // Helper for get_base_and_disp: find the base and index input nodes.
258  // Returns the MachOper as determined by memory_operand(), for use, if
259  // needed by the caller. If (MachOper *)-1 is returned, base and index
260  // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
261  // index are set to NULL.
262  const MachOper* memory_inputs(Node* &base, Node* &index) const;
263
264  // Helper for memory_inputs:  Which operand carries the necessary info?
265  // By default, returns NULL, which means there is no such operand.
266  // If it returns (MachOper*)-1, this means there are multiple memories.
267  virtual const MachOper* memory_operand() const { return NULL; }
268
269  // Call "get_base_and_disp" to decide which category of memory is used here.
270  virtual const class TypePtr *adr_type() const;
271
272  // Negate conditional branches.  Error for non-branch Nodes
273  virtual void negate();
274
275  // Apply peephole rule(s) to this instruction
276  virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
277
278  // Check for PC-Relative addressing
279  bool is_pc_relative() const { return (flags() & Flag_is_pc_relative) != 0; }
280
281  // Top-level ideal Opcode matched
282  virtual int ideal_Opcode()     const { return Op_Node; }
283
284  // Set the branch inside jump MachNodes.  Error for non-branch Nodes.
285  virtual void label_set( Label& label, uint block_num );
286
287  // Adds the label for the case
288  virtual void add_case_label( int switch_val, Label* blockLabel);
289
290  // Set the absolute address for methods
291  virtual void method_set( intptr_t addr );
292
293  // Should we clone rather than spill this instruction?
294  bool rematerialize() const;
295
296  // Get the pipeline info
297  static const Pipeline *pipeline_class();
298  virtual const Pipeline *pipeline() const;
299
300#ifndef PRODUCT
301  virtual const char *Name() const = 0; // Machine-specific name
302  virtual void dump_spec(outputStream *st) const; // Print per-node info
303  void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
304#endif
305};
306
307//------------------------------MachIdealNode----------------------------
308// Machine specific versions of nodes that must be defined by user.
309// These are not converted by matcher from ideal nodes to machine nodes
310// but are inserted into the code by the compiler.
311class MachIdealNode : public MachNode {
312public:
313  MachIdealNode( ) {}
314
315  // Define the following defaults for non-matched machine nodes
316  virtual uint oper_input_base() const { return 0; }
317  virtual uint rule()            const { return 9999999; }
318  virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
319};
320
321//------------------------------MachTypeNode----------------------------
322// Machine Nodes that need to retain a known Type.
323class MachTypeNode : public MachNode {
324  virtual uint size_of() const { return sizeof(*this); } // Size is bigger
325public:
326  const Type *_bottom_type;
327
328  virtual const class Type *bottom_type() const { return _bottom_type; }
329#ifndef PRODUCT
330  virtual void dump_spec(outputStream *st) const;
331#endif
332};
333
334//------------------------------MachBreakpointNode----------------------------
335// Machine breakpoint or interrupt Node
336class MachBreakpointNode : public MachIdealNode {
337public:
338  MachBreakpointNode( ) {}
339  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
340  virtual uint size(PhaseRegAlloc *ra_) const;
341
342#ifndef PRODUCT
343  virtual const char *Name() const { return "Breakpoint"; }
344  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
345#endif
346};
347
348//------------------------------MachConstantBaseNode--------------------------
349// Machine node that represents the base address of the constant table.
350class MachConstantBaseNode : public MachIdealNode {
351public:
352  static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
353
354public:
355  MachConstantBaseNode() : MachIdealNode() {
356    init_class_id(Class_MachConstantBase);
357  }
358  virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
359  virtual uint ideal_reg() const { return Op_RegP; }
360  virtual uint oper_input_base() const { return 1; }
361
362  virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
363  virtual uint size(PhaseRegAlloc* ra_) const;
364  virtual bool pinned() const { return UseRDPCForConstantTableBase; }
365
366  static const RegMask& static_out_RegMask() { return _out_RegMask; }
367  virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
368
369#ifndef PRODUCT
370  virtual const char* Name() const { return "MachConstantBaseNode"; }
371  virtual void format(PhaseRegAlloc*, outputStream* st) const;
372#endif
373};
374
375//------------------------------MachConstantNode-------------------------------
376// Machine node that holds a constant which is stored in the constant table.
377class MachConstantNode : public MachNode {
378protected:
379  Compile::Constant _constant;  // This node's constant.
380
381public:
382  MachConstantNode() : MachNode() {
383    init_class_id(Class_MachConstant);
384  }
385
386  virtual void eval_constant(Compile* C) {
387#ifdef ASSERT
388    tty->print("missing MachConstantNode eval_constant function: ");
389    dump();
390#endif
391    ShouldNotCallThis();
392  }
393
394  virtual const RegMask &in_RegMask(uint idx) const {
395    if (idx == mach_constant_base_node_input())
396      return MachConstantBaseNode::static_out_RegMask();
397    return MachNode::in_RegMask(idx);
398  }
399
400  // Input edge of MachConstantBaseNode.
401  uint mach_constant_base_node_input() const { return req() - 1; }
402
403  int  constant_offset();
404  int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
405};
406
407//------------------------------MachUEPNode-----------------------------------
408// Machine Unvalidated Entry Point Node
409class MachUEPNode : public MachIdealNode {
410public:
411  MachUEPNode( ) {}
412  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
413  virtual uint size(PhaseRegAlloc *ra_) const;
414
415#ifndef PRODUCT
416  virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
417  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
418#endif
419};
420
421//------------------------------MachPrologNode--------------------------------
422// Machine function Prolog Node
423class MachPrologNode : public MachIdealNode {
424public:
425  MachPrologNode( ) {}
426  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
427  virtual uint size(PhaseRegAlloc *ra_) const;
428  virtual int reloc() const;
429
430#ifndef PRODUCT
431  virtual const char *Name() const { return "Prolog"; }
432  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
433#endif
434};
435
436//------------------------------MachEpilogNode--------------------------------
437// Machine function Epilog Node
438class MachEpilogNode : public MachIdealNode {
439public:
440  MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
441  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
442  virtual uint size(PhaseRegAlloc *ra_) const;
443  virtual int reloc() const;
444  virtual const Pipeline *pipeline() const;
445
446private:
447  bool _do_polling;
448
449public:
450  bool do_polling() const { return _do_polling; }
451
452  // Offset of safepoint from the beginning of the node
453  int safepoint_offset() const;
454
455#ifndef PRODUCT
456  virtual const char *Name() const { return "Epilog"; }
457  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
458#endif
459};
460
461//------------------------------MachNopNode-----------------------------------
462// Machine function Nop Node
463class MachNopNode : public MachIdealNode {
464private:
465  int _count;
466public:
467  MachNopNode( ) : _count(1) {}
468  MachNopNode( int count ) : _count(count) {}
469  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
470  virtual uint size(PhaseRegAlloc *ra_) const;
471
472  virtual const class Type *bottom_type() const { return Type::CONTROL; }
473
474  virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
475  virtual const Pipeline *pipeline() const;
476#ifndef PRODUCT
477  virtual const char *Name() const { return "Nop"; }
478  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
479  virtual void dump_spec(outputStream *st) const { } // No per-operand info
480#endif
481};
482
483//------------------------------MachSpillCopyNode------------------------------
484// Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
485// location (stack or register).
486class MachSpillCopyNode : public MachIdealNode {
487  const RegMask *_in;           // RegMask for input
488  const RegMask *_out;          // RegMask for output
489  const Type *_type;
490public:
491  MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
492    MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
493    init_class_id(Class_MachSpillCopy);
494    init_flags(Flag_is_Copy);
495    add_req(NULL);
496    add_req(n);
497  }
498  virtual uint size_of() const { return sizeof(*this); }
499  void set_out_RegMask(const RegMask &out) { _out = &out; }
500  void set_in_RegMask(const RegMask &in) { _in = &in; }
501  virtual const RegMask &out_RegMask() const { return *_out; }
502  virtual const RegMask &in_RegMask(uint) const { return *_in; }
503  virtual const class Type *bottom_type() const { return _type; }
504  virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; }
505  virtual uint oper_input_base() const { return 1; }
506  uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
507
508  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
509  virtual uint size(PhaseRegAlloc *ra_) const;
510
511#ifndef PRODUCT
512  virtual const char *Name() const { return "MachSpillCopy"; }
513  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
514#endif
515};
516
517//------------------------------MachNullChkNode--------------------------------
518// Machine-dependent null-pointer-check Node.  Points a real MachNode that is
519// also some kind of memory op.  Turns the indicated MachNode into a
520// conditional branch with good latency on the ptr-not-null path and awful
521// latency on the pointer-is-null path.
522
523class MachNullCheckNode : public MachIdealNode {
524public:
525  const uint _vidx;             // Index of memop being tested
526  MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachIdealNode(), _vidx(vidx) {
527    init_class_id(Class_MachNullCheck);
528    init_flags(Flag_is_Branch | Flag_is_pc_relative);
529    add_req(ctrl);
530    add_req(memop);
531  }
532
533  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
534  virtual bool pinned() const { return true; };
535  virtual void negate() { }
536  virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
537  virtual uint ideal_reg() const { return NotAMachineReg; }
538  virtual const RegMask &in_RegMask(uint) const;
539  virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
540#ifndef PRODUCT
541  virtual const char *Name() const { return "NullCheck"; }
542  virtual void format( PhaseRegAlloc *, outputStream *st ) const;
543#endif
544};
545
546//------------------------------MachProjNode----------------------------------
547// Machine-dependent Ideal projections (how is that for an oxymoron).  Really
548// just MachNodes made by the Ideal world that replicate simple projections
549// but with machine-dependent input & output register masks.  Generally
550// produced as part of calling conventions.  Normally I make MachNodes as part
551// of the Matcher process, but the Matcher is ill suited to issues involving
552// frame handling, so frame handling is all done in the Ideal world with
553// occasional callbacks to the machine model for important info.
554class MachProjNode : public ProjNode {
555public:
556  MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {}
557  RegMask _rout;
558  const uint  _ideal_reg;
559  enum projType {
560    unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
561    fat_proj       = 999        // Projs killing many regs, defined by _rout
562  };
563  virtual int   Opcode() const;
564  virtual const Type *bottom_type() const;
565  virtual const TypePtr *adr_type() const;
566  virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
567  virtual const RegMask &out_RegMask() const { return _rout; }
568  virtual uint  ideal_reg() const { return _ideal_reg; }
569  // Need size_of() for virtual ProjNode::clone()
570  virtual uint  size_of() const { return sizeof(MachProjNode); }
571#ifndef PRODUCT
572  virtual void dump_spec(outputStream *st) const;
573#endif
574};
575
576//------------------------------MachIfNode-------------------------------------
577// Machine-specific versions of IfNodes
578class MachIfNode : public MachNode {
579  virtual uint size_of() const { return sizeof(*this); } // Size is bigger
580public:
581  float _prob;                  // Probability branch goes either way
582  float _fcnt;                  // Frequency counter
583  MachIfNode() : MachNode() {
584    init_class_id(Class_MachIf);
585  }
586#ifndef PRODUCT
587  virtual void dump_spec(outputStream *st) const;
588#endif
589};
590
591//------------------------------MachFastLockNode-------------------------------------
592// Machine-specific versions of FastLockNodes
593class MachFastLockNode : public MachNode {
594  virtual uint size_of() const { return sizeof(*this); } // Size is bigger
595public:
596  BiasedLockingCounters* _counters;
597
598  MachFastLockNode() : MachNode() {}
599};
600
601//------------------------------MachReturnNode--------------------------------
602// Machine-specific versions of subroutine returns
603class MachReturnNode : public MachNode {
604  virtual uint size_of() const; // Size is bigger
605public:
606  RegMask *_in_rms;             // Input register masks, set during allocation
607  ReallocMark _nesting;         // assertion check for reallocations
608  const TypePtr* _adr_type;     // memory effects of call or return
609  MachReturnNode() : MachNode() {
610    init_class_id(Class_MachReturn);
611    _adr_type = TypePtr::BOTTOM; // the default: all of memory
612  }
613
614  void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
615
616  virtual const RegMask &in_RegMask(uint) const;
617  virtual bool pinned() const { return true; };
618  virtual const TypePtr *adr_type() const;
619};
620
621//------------------------------MachSafePointNode-----------------------------
622// Machine-specific versions of safepoints
623class MachSafePointNode : public MachReturnNode {
624public:
625  OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
626  JVMState*       _jvms;        // Pointer to list of JVM State Objects
627  uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
628  OopMap*         oop_map() const { return _oop_map; }
629  void            set_oop_map(OopMap* om) { _oop_map = om; }
630
631  MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
632    init_class_id(Class_MachSafePoint);
633    init_flags(Flag_is_safepoint_node);
634  }
635
636  virtual JVMState* jvms() const { return _jvms; }
637  void set_jvms(JVMState* s) {
638    _jvms = s;
639  }
640  bool is_safepoint_node() const { return (flags() & Flag_is_safepoint_node) != 0; }
641  virtual const Type    *bottom_type() const;
642
643  virtual const RegMask &in_RegMask(uint) const;
644
645  // Functionality from old debug nodes
646  Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
647  Node *frameptr () const { return in(TypeFunc::FramePtr); }
648
649  Node *local(const JVMState* jvms, uint idx) const {
650    assert(verify_jvms(jvms), "jvms must match");
651    return in(_jvmadj + jvms->locoff() + idx);
652  }
653  Node *stack(const JVMState* jvms, uint idx) const {
654    assert(verify_jvms(jvms), "jvms must match");
655    return in(_jvmadj + jvms->stkoff() + idx);
656 }
657  Node *monitor_obj(const JVMState* jvms, uint idx) const {
658    assert(verify_jvms(jvms), "jvms must match");
659    return in(_jvmadj + jvms->monitor_obj_offset(idx));
660  }
661  Node *monitor_box(const JVMState* jvms, uint idx) const {
662    assert(verify_jvms(jvms), "jvms must match");
663    return in(_jvmadj + jvms->monitor_box_offset(idx));
664  }
665  void  set_local(const JVMState* jvms, uint idx, Node *c) {
666    assert(verify_jvms(jvms), "jvms must match");
667    set_req(_jvmadj + jvms->locoff() + idx, c);
668  }
669  void  set_stack(const JVMState* jvms, uint idx, Node *c) {
670    assert(verify_jvms(jvms), "jvms must match");
671    set_req(_jvmadj + jvms->stkoff() + idx, c);
672  }
673  void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
674    assert(verify_jvms(jvms), "jvms must match");
675    set_req(_jvmadj + jvms->monoff() + idx, c);
676  }
677};
678
679//------------------------------MachCallNode----------------------------------
680// Machine-specific versions of subroutine calls
681class MachCallNode : public MachSafePointNode {
682protected:
683  virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
684  virtual uint cmp( const Node &n ) const;
685  virtual uint size_of() const = 0; // Size is bigger
686public:
687  const TypeFunc *_tf;        // Function type
688  address      _entry_point;  // Address of the method being called
689  float        _cnt;          // Estimate of number of times called
690  uint         _argsize;      // Size of argument block on stack
691
692  const TypeFunc* tf()        const { return _tf; }
693  const address entry_point() const { return _entry_point; }
694  const float   cnt()         const { return _cnt; }
695  uint argsize()              const { return _argsize; }
696
697  void set_tf(const TypeFunc* tf) { _tf = tf; }
698  void set_entry_point(address p) { _entry_point = p; }
699  void set_cnt(float c)           { _cnt = c; }
700  void set_argsize(int s)         { _argsize = s; }
701
702  MachCallNode() : MachSafePointNode() {
703    init_class_id(Class_MachCall);
704    init_flags(Flag_is_Call);
705  }
706
707  virtual const Type *bottom_type() const;
708  virtual bool  pinned() const { return false; }
709  virtual const Type *Value( PhaseTransform *phase ) const;
710  virtual const RegMask &in_RegMask(uint) const;
711  virtual int ret_addr_offset() { return 0; }
712
713  bool returns_long() const { return tf()->return_type() == T_LONG; }
714  bool return_value_is_used() const;
715#ifndef PRODUCT
716  virtual void dump_spec(outputStream *st) const;
717#endif
718};
719
720//------------------------------MachCallJavaNode------------------------------
721// "Base" class for machine-specific versions of subroutine calls
722class MachCallJavaNode : public MachCallNode {
723protected:
724  virtual uint cmp( const Node &n ) const;
725  virtual uint size_of() const; // Size is bigger
726public:
727  ciMethod* _method;             // Method being direct called
728  int        _bci;               // Byte Code index of call byte code
729  bool       _optimized_virtual; // Tells if node is a static call or an optimized virtual
730  bool       _method_handle_invoke;   // Tells if the call has to preserve SP
731  MachCallJavaNode() : MachCallNode() {
732    init_class_id(Class_MachCallJava);
733  }
734
735  virtual const RegMask &in_RegMask(uint) const;
736
737#ifndef PRODUCT
738  virtual void dump_spec(outputStream *st) const;
739#endif
740};
741
742//------------------------------MachCallStaticJavaNode------------------------
743// Machine-specific versions of monomorphic subroutine calls
744class MachCallStaticJavaNode : public MachCallJavaNode {
745  virtual uint cmp( const Node &n ) const;
746  virtual uint size_of() const; // Size is bigger
747public:
748  const char *_name;            // Runtime wrapper name
749  MachCallStaticJavaNode() : MachCallJavaNode() {
750    init_class_id(Class_MachCallStaticJava);
751  }
752
753  // If this is an uncommon trap, return the request code, else zero.
754  int uncommon_trap_request() const;
755
756  virtual int ret_addr_offset();
757#ifndef PRODUCT
758  virtual void dump_spec(outputStream *st) const;
759  void dump_trap_args(outputStream *st) const;
760#endif
761};
762
763//------------------------------MachCallDynamicJavaNode------------------------
764// Machine-specific versions of possibly megamorphic subroutine calls
765class MachCallDynamicJavaNode : public MachCallJavaNode {
766public:
767  int _vtable_index;
768  MachCallDynamicJavaNode() : MachCallJavaNode() {
769    init_class_id(Class_MachCallDynamicJava);
770    DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
771  }
772  virtual int ret_addr_offset();
773#ifndef PRODUCT
774  virtual void dump_spec(outputStream *st) const;
775#endif
776};
777
778//------------------------------MachCallRuntimeNode----------------------------
779// Machine-specific versions of subroutine calls
780class MachCallRuntimeNode : public MachCallNode {
781  virtual uint cmp( const Node &n ) const;
782  virtual uint size_of() const; // Size is bigger
783public:
784  const char *_name;            // Printable name, if _method is NULL
785  MachCallRuntimeNode() : MachCallNode() {
786    init_class_id(Class_MachCallRuntime);
787  }
788  virtual int ret_addr_offset();
789#ifndef PRODUCT
790  virtual void dump_spec(outputStream *st) const;
791#endif
792};
793
794class MachCallLeafNode: public MachCallRuntimeNode {
795public:
796  MachCallLeafNode() : MachCallRuntimeNode() {
797    init_class_id(Class_MachCallLeaf);
798  }
799};
800
801//------------------------------MachHaltNode-----------------------------------
802// Machine-specific versions of halt nodes
803class MachHaltNode : public MachReturnNode {
804public:
805  virtual JVMState* jvms() const;
806};
807
808
809//------------------------------MachTempNode-----------------------------------
810// Node used by the adlc to construct inputs to represent temporary registers
811class MachTempNode : public MachNode {
812private:
813  MachOper *_opnd_array[1];
814
815public:
816  virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
817  virtual uint rule() const { return 9999999; }
818  virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
819
820  MachTempNode(MachOper* oper) {
821    init_class_id(Class_MachTemp);
822    _num_opnds = 1;
823    _opnds = _opnd_array;
824    add_req(NULL);
825    _opnds[0] = oper;
826  }
827  virtual uint size_of() const { return sizeof(MachTempNode); }
828
829#ifndef PRODUCT
830  virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
831  virtual const char *Name() const { return "MachTemp";}
832#endif
833};
834
835
836
837//------------------------------labelOper--------------------------------------
838// Machine-independent version of label operand
839class labelOper : public MachOper {
840private:
841  virtual uint           num_edges() const { return 0; }
842public:
843  // Supported for fixed size branches
844  Label* _label;                // Label for branch(es)
845
846  uint _block_num;
847
848  labelOper() : _block_num(0), _label(0) {}
849
850  labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
851
852  labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
853
854  virtual MachOper *clone(Compile* C) const;
855
856  virtual Label *label() const { return _label; }
857
858  virtual uint           opcode() const;
859
860  virtual uint           hash()   const;
861  virtual uint           cmp( const MachOper &oper ) const;
862#ifndef PRODUCT
863  virtual const char    *Name()   const { return "Label";}
864
865  virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
866  virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
867#endif
868};
869
870
871//------------------------------methodOper--------------------------------------
872// Machine-independent version of method operand
873class methodOper : public MachOper {
874private:
875  virtual uint           num_edges() const { return 0; }
876public:
877  intptr_t _method;             // Address of method
878  methodOper() :   _method(0) {}
879  methodOper(intptr_t method) : _method(method)  {}
880
881  virtual MachOper *clone(Compile* C) const;
882
883  virtual intptr_t method() const { return _method; }
884
885  virtual uint           opcode() const;
886
887  virtual uint           hash()   const;
888  virtual uint           cmp( const MachOper &oper ) const;
889#ifndef PRODUCT
890  virtual const char    *Name()   const { return "Method";}
891
892  virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
893  virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
894#endif
895};
896
897#endif // SHARE_VM_OPTO_MACHNODE_HPP
898